1 /* 2 * linux/drivers/block/triton.c Version 1.02 Oct 13, 1995 3 * 4 * Copyright (c) 1995 Mark Lord 5 * May be copied or modified under the terms of the GNU General Public License 6 */ 7 8 /* 9 * This module provides support for the Bus Master IDE DMA function 10 * of the Intel PCI Triton chipset (82371FB). 11 * 12 * DMA is currently supported only for hard disk drives (not cdroms). 13 * 14 * Support for cdroms will likely be added at a later date, 15 * after broader experience has been obtained with hard disks. 16 * 17 * Up to four drives may be enabled for DMA, and the Triton chipset will 18 * (hopefully) arbitrate the PCI bus among them. Note that the 82371FB chip 19 * provides a single "line buffer" for the BM IDE function, so performance of 20 * multiple (two) drives doing DMA simultaneously will suffer somewhat, 21 * as they contest for that resource bottleneck. This is handled transparently 22 * inside the 82371FB chip. 23 * 24 * By default, DMA support is prepared for use, but is currently enabled only 25 * for drives which support multi-word DMA mode2 (mword2), or which are 26 * recognized as "good" (see table below). Drives with only mode0 or mode1 27 * (single or multi) DMA should also work with this chipset/driver (eg. MC2112A) 28 * but are not enabled by default. Use "hdparm -i" to view modes supported 29 * by a given drive. 30 * 31 * The hdparm-2.4 (or later) utility can be used for manually enabling/disabling 32 * DMA support, but must be (re-)compiled against this kernel version or later. 33 * 34 * To enable DMA, use "hdparm -d1 /dev/hd?" on a per-drive basis after booting. 35 * If problems arise, ide.c will disable DMA operation after a few retries. 36 * This error recovery mechanism works and has been extremely well exercised. 37 * 38 * IDE drives, depending on their vintage, may support several different modes 39 * of DMA operation. The boot-time modes are indicated with a "*" in 40 * the "hdparm -i" listing, and can be changed with *knowledgeable* use of 41 * the "hdparm -X" feature. There is seldom a need to do this, as drives 42 * normally power-up with their "best" PIO/DMA modes enabled. 43 * 44 * Testing was done with an ASUS P55TP4XE/100 system and the following drives: 45 * 46 * Quantum Fireball 1080A (1Gig w/83kB buffer), DMA mode2, PIO mode4. 47 * - DMA mode2 works well (7.4MB/sec), despite the tiny on-drive buffer. 48 * - This drive also does PIO mode4, at about the same speed as DMA mode2. 49 * An awesome drive for the price! 50 * 51 * Fujitsu M1606TA (1Gig w/256kB buffer), DMA mode2, PIO mode4. 52 * - DMA mode2 gives horrible performance (1.6MB/sec), despite the good 53 * size of the on-drive buffer and a boasted 10ms average access time. 54 * - PIO mode4 was better, but peaked at a mere 4.5MB/sec. 55 * 56 * Micropolis MC2112A (1Gig w/508kB buffer), drive pre-dates EIDE and ATA2. 57 * - DMA works fine (2.2MB/sec), probably due to the large on-drive buffer. 58 * - This older drive can also be tweaked for fastPIO (3.7MB/sec) by using 59 * maximum clock settings (5,4) and setting all flags except prefetch. 60 * 61 * Western Digital AC31000H (1Gig w/128kB buffer), DMA mode1, PIO mode3. 62 * - DMA does not work reliably. The drive appears to be somewhat tardy 63 * in deasserting DMARQ at the end of a sector. This is evident in 64 * the observation that WRITEs work most of the time, depending on 65 * cache-buffer occupancy, but multi-sector reads seldom work. 66 * 67 * Drives like the AC31000H could likely be made to work if all DMA were done 68 * one sector at a time, but that would likely negate any advantage over PIO. 69 * 70 * If you have any drive models to add, email your results to: mlord@bnr.ca 71 * Keep an eye on /var/adm/messages for "DMA disabled" messages. 72 */ 73 #define _TRITON_C 74 #include <linux/config.h> 75 #ifndef CONFIG_BLK_DEV_TRITON 76 #define CONFIG_BLK_DEV_TRITON y 77 #endif 78 #include <linux/types.h> 79 #include <linux/kernel.h> 80 #include <linux/timer.h> 81 #include <linux/mm.h> 82 #include <linux/ioport.h> 83 #include <linux/interrupt.h> 84 #include <linux/blkdev.h> 85 #include <linux/hdreg.h> 86 #include <linux/pci.h> 87 #include <linux/bios32.h> 88 89 #include <asm/io.h> 90 #include <asm/dma.h> 91 92 #include "ide.h" 93 94 /* 95 * good_dma_drives() lists the model names (from "hdparm -i") 96 * of drives which do not support mword2 DMA but which are 97 * known to work fine with this interface under Linux. 98 */ 99 const char *good_dma_drives[] = {"Micropolis 2112A"}; 100 101 /* 102 * Our Physical Region Descriptor (PRD) table should be large enough 103 * to handle the biggest I/O request we are likely to see. Since requests 104 * can have no more than 256 sectors, and since the typical blocksize is 105 * two sectors, we can get by with a limit of 128 entries here for the 106 * usual worst case. Most requests seem to include some contiguous blocks, 107 * further reducing the number of table entries required. 108 * 109 * Note that the driver reverts to PIO mode for individual requests that exceed 110 * this limit (possible with 512 byte blocksizes, eg. MSDOS f/s), so handling 111 * 100% of all crazy scenarios here is not necessary. 112 * 113 * As it turns out, though, we must allocate a full 4KB page for this, 114 * so the two PRD tables (ide0 & ide1) will each get half of that, 115 * allowing each to have about 256 entries (8 bytes each) from this. 116 */ 117 #define PRD_BYTES 8 118 #define PRD_ENTRIES (PAGE_SIZE / (2 * PRD_BYTES)) 119 120 /* 121 * dma_intr() is the handler for disk read/write DMA interrupts 122 */ 123 static void dma_intr (ide_drive_t *drive) /* */ 124 { 125 byte stat, dma_stat; 126 int i; 127 struct request *rq = HWGROUP(drive)->rq; 128 unsigned short dma_base = HWIF(drive)->dma_base; 129 130 dma_stat = inb(dma_base+2); /* get DMA status */ 131 outb(inb(dma_base)&~1, dma_base); /* stop DMA operation */ 132 stat = GET_STAT(); /* get drive status */ 133 if (OK_STAT(stat,DRIVE_READY,drive->bad_wstat|DRQ_STAT)) { 134 if ((dma_stat & 7) == 4) { /* verify good DMA status */ 135 rq = HWGROUP(drive)->rq; 136 for (i = rq->nr_sectors; i > 0;) { 137 i -= rq->current_nr_sectors; 138 ide_end_request(1, HWGROUP(drive)); 139 } 140 IDE_DO_REQUEST; 141 return; 142 } 143 printk("%s: bad DMA status: 0x%02x\n", drive->name, dma_stat); 144 } 145 sti(); 146 if (!ide_error(drive, "dma_intr", stat)) 147 IDE_DO_REQUEST; 148 } 149 150 /* 151 * build_dmatable() prepares a dma request. 152 * Returns 0 if all went okay, returns 1 otherwise. 153 */ 154 static int build_dmatable (ide_drive_t *drive) /* */ 155 { 156 struct request *rq = HWGROUP(drive)->rq; 157 struct buffer_head *bh = rq->bh; 158 unsigned long size, addr, *table = HWIF(drive)->dmatable; 159 unsigned int count = 0; 160 161 do { 162 /* 163 * Determine addr and size of next buffer area. We assume that 164 * individual virtual buffers are always composed linearly in 165 * physical memory. For example, we assume that any 8kB buffer 166 * is always composed of two adjacent physical 4kB pages rather 167 * than two possibly non-adjacent physical 4kB pages. 168 */ 169 if (bh == NULL) { /* paging requests have (rq->bh == NULL) */ 170 addr = virt_to_bus (rq->buffer); 171 size = rq->nr_sectors << 9; 172 } else { 173 /* group sequential buffers into one large buffer */ 174 addr = virt_to_bus (bh->b_data); 175 size = bh->b_size; 176 while ((bh = bh->b_reqnext) != NULL) { 177 if ((addr + size) != virt_to_bus (bh->b_data)) 178 break; 179 size += bh->b_size; 180 } 181 } 182 183 /* 184 * Fill in the dma table, without crossing any 64kB boundaries. 185 * We assume 16-bit alignment of all blocks. 186 */ 187 while (size) { 188 if (++count >= PRD_ENTRIES) { 189 printk("%s: DMA table too small\n", drive->name); 190 return 1; /* revert to PIO for this request */ 191 } else { 192 unsigned long bcount = 0x10000 - (addr & 0xffff); 193 if (bcount > size) 194 bcount = size; 195 *table++ = addr; 196 *table++ = bcount; 197 addr += bcount; 198 size -= bcount; 199 } 200 } 201 } while (bh != NULL); 202 if (count) { 203 *--table |= 0x80000000; /* set End-Of-Table (EOT) bit */ 204 return 0; 205 } 206 printk("%s: empty DMA table?\n", drive->name); 207 return 1; /* let the PIO routines handle this weirdness */ 208 } 209 210 static int config_drive_for_dma (ide_drive_t *drive) /* */ 211 { 212 const char **list; 213 214 struct hd_driveid *id = drive->id; 215 if (id && (id->capability & 1)) { 216 /* Enable DMA on any drive that supports mword2 DMA */ 217 if ((id->field_valid & 2) && (id->dma_mword & 0x404) == 0x404) { 218 drive->using_dma = 1; 219 return 0; /* DMA enabled */ 220 } 221 /* Consult the list of known "good" drives */ 222 list = good_dma_drives; 223 while (*list) { 224 if (!strcmp(*list++,id->model)) { 225 drive->using_dma = 1; 226 return 0; /* DMA enabled */ 227 } 228 } 229 } 230 return 1; /* DMA not enabled */ 231 } 232 233 /* 234 * triton_dmaproc() initiates/aborts DMA read/write operations on a drive. 235 * 236 * The caller is assumed to have selected the drive and programmed the drive's 237 * sector address using CHS or LBA. All that remains is to prepare for DMA 238 * and then issue the actual read/write DMA/PIO command to the drive. 239 * 240 * Returns 0 if all went well. 241 * Returns 1 if DMA read/write could not be started, in which case 242 * the caller should revert to PIO for the current request. 243 */ 244 static int triton_dmaproc (ide_dma_action_t func, ide_drive_t *drive) /* */ 245 { 246 unsigned long dma_base = HWIF(drive)->dma_base; 247 unsigned int reading = (1 << 3); 248 249 switch (func) { 250 case ide_dma_abort: 251 outb(inb(dma_base)&~1, dma_base); /* stop DMA */ 252 return 0; 253 case ide_dma_check: 254 return config_drive_for_dma (drive); 255 case ide_dma_write: 256 reading = 0; 257 case ide_dma_read: 258 break; 259 default: 260 printk("triton_dmaproc: unsupported func: %d\n", func); 261 return 1; 262 } 263 if (build_dmatable (drive)) 264 return 1; 265 outl(virt_to_bus (HWIF(drive)->dmatable), dma_base + 4); /* PRD table */ 266 outb(reading, dma_base); /* specify r/w */ 267 outb(0x26, dma_base+2); /* clear status bits */ 268 ide_set_handler (drive, &dma_intr); /* issue cmd to drive */ 269 OUT_BYTE(reading ? WIN_READDMA : WIN_WRITEDMA, IDE_COMMAND_REG); 270 outb(inb(dma_base)|1, dma_base); /* begin DMA */ 271 return 0; 272 } 273 274 /* 275 * print_triton_drive_flags() displays the currently programmed options 276 * in the Triton chipset for a given drive. 277 * 278 * If fastDMA is "no", then slow ISA timings are used for DMA data xfers. 279 * If fastPIO is "no", then slow ISA timings are used for PIO data xfers. 280 * If IORDY is "no", then IORDY is assumed to always be asserted. 281 * If PreFetch is "no", then data pre-fetch/post are not used. 282 * 283 * When "fastPIO" and/or "fastDMA" are "yes", then faster PCI timings and 284 * back-to-back 16-bit data transfers are enabled, using the sample_CLKs 285 * and recovery_CLKs (PCI clock cycles) timing parameters for that interface. 286 */ 287 static void print_triton_drive_flags (unsigned int unit, byte flags) /* */ 288 { 289 printk(" %s ", unit ? "slave :" : "master:"); 290 printk( "fastDMA=%s", (flags&9) ? "on " : "off"); 291 printk(" PreFetch=%s", (flags&4) ? "on " : "off"); 292 printk(" IORDY=%s", (flags&2) ? "on " : "off"); 293 printk(" fastPIO=%s\n", ((flags&9)==1) ? "on " : "off"); 294 } 295 296 /* 297 * ide_init_triton() prepares the IDE driver for DMA operation. 298 * This routine is called once, from ide.c during driver initialization, 299 * for each triton chipset which is found (unlikely to be more than one). 300 */ 301 void ide_init_triton (byte bus, byte fn) /* */ 302 { 303 int rc = 0, h; 304 unsigned short bmiba, pcicmd; 305 unsigned int timings; 306 unsigned char *dmatable = NULL; 307 extern ide_hwif_t ide_hwifs[]; 308 309 /* 310 * See if IDE and BM-DMA features are enabled: 311 */ 312 if ((rc = pcibios_read_config_word(bus, fn, 0x04, &pcicmd))) 313 goto quit; 314 if ((pcicmd & 5) != 5) { 315 if ((pcicmd & 1) == 0) 316 printk("ide: Triton IDE ports are not enabled\n"); 317 else 318 printk("ide: Triton BM-DMA feature is not enabled\n"); 319 goto quit; 320 } 321 #if 0 322 (void) pcibios_write_config_word(bus, fn, 0x42, 0x8037); /* for my MC2112A */ 323 #endif 324 /* 325 * See if ide port(s) are enabled 326 */ 327 if ((rc = pcibios_read_config_dword(bus, fn, 0x40, &timings))) 328 goto quit; 329 if (!(timings & 0x80008000)) { 330 printk("ide: Triton IDE ports are not enabled\n"); 331 goto quit; 332 } 333 printk("ide: Triton BM-IDE on PCI bus %d function %d\n", bus, fn); 334 335 /* 336 * Get the bmiba base address 337 */ 338 if ((rc = pcibios_read_config_word(bus, fn, 0x20, &bmiba))) 339 goto quit; 340 bmiba &= 0xfff0; /* extract port base address */ 341 342 /* 343 * Save the dma_base port addr for each interface 344 */ 345 for (h = 0; h < MAX_HWIFS; ++h) { 346 ide_hwif_t *hwif = &ide_hwifs[h]; 347 unsigned short base, time; 348 if (hwif->io_base == 0x1f0 && (timings & 0x8000)) { 349 time = timings & 0xffff; 350 base = bmiba; 351 } else if (hwif->io_base == 0x170 && (timings & 0x80000000)) { 352 time = timings >> 16; 353 base = bmiba + 8; 354 } else 355 continue; 356 printk(" %s: BusMaster DMA at 0x%04x-0x%04x", hwif->name, base, base+7); 357 if (check_region(base, 8)) { 358 printk(" -- ERROR, PORTS ALREADY IN USE"); 359 } else { 360 request_region(base, 8, hwif->name); 361 hwif->dma_base = base; 362 if (dmatable == NULL) { 363 /* 364 * Since we know we are on a PCI bus, we could 365 * actually use __get_free_pages() here instead 366 * of __get_dma_pages() -- no ISA limitations. 367 */ 368 dmatable = (void *) __get_dma_pages(GFP_KERNEL, 0); 369 } 370 if (dmatable != NULL) { 371 hwif->dmatable = (unsigned long *) dmatable; 372 dmatable += (PRD_ENTRIES * PRD_BYTES); 373 outl(virt_to_bus(hwif->dmatable), base + 4); 374 hwif->dmaproc = &triton_dmaproc; 375 } 376 } 377 printk("\n %s timing: (0x%04x) sample_CLKs=%d, recovery_CLKs=%d\n", 378 hwif->name, time, ((~time>>12)&3)+2, ((~time>>8)&3)+1); 379 print_triton_drive_flags (0, time & 0xf); 380 print_triton_drive_flags (1, (time >> 4) & 0xf); 381 } 382 383 quit: if (rc) printk("ide: pcibios access failed - %s\n", pcibios_strerror(rc)); 384 } 385