taglinefilesource code
QIC02_CTL_PORT462drivers/char/tpqic02.coutb_p(ctlbits, QIC02_CTL_PORT);
QIC02_CTL_PORT466drivers/char/tpqic02.coutb_p(ctlbits, QIC02_CTL_PORT);
QIC02_CTL_PORT471drivers/char/tpqic02.coutb_p(ctlbits, QIC02_CTL_PORT);
QIC02_CTL_PORT624drivers/char/tpqic02.coutb_p(ctlbits & ~MTN_QIC02_CTL_RESET_NOT, QIC02_CTL_PORT);
QIC02_CTL_PORT626drivers/char/tpqic02.coutb_p(ctlbits | QIC02_CTL_RESET, QIC02_CTL_PORT);
QIC02_CTL_PORT641drivers/char/tpqic02.coutb_p(ctlbits | MTN_QIC02_CTL_RESET_NOT, QIC02_CTL_PORT);
QIC02_CTL_PORT643drivers/char/tpqic02.coutb_p(ctlbits & ~QIC02_CTL_RESET, QIC02_CTL_PORT);
QIC02_CTL_PORT688drivers/char/tpqic02.coutb_p(ctlbits | QIC02_CTL_REQUEST, QIC02_CTL_PORT);  /* set request bit */
QIC02_CTL_PORT702drivers/char/tpqic02.coutb_p(ctlbits & ~QIC02_CTL_REQUEST, QIC02_CTL_PORT); /* reset request bit */
QIC02_CTL_PORT898drivers/char/tpqic02.coutb_p(ctlbits | QIC02_CTL_REQUEST, QIC02_CTL_PORT);  /* set request */
QIC02_CTL_PORT904drivers/char/tpqic02.coutb_p(ctlbits & ~QIC02_CTL_REQUEST, QIC02_CTL_PORT);  /* un-set request */
QIC02_CTL_PORT1534drivers/char/tpqic02.coutb_p(WT_CTL_ONLINE, QIC02_CTL_PORT);  /* back to normal */
QIC02_CTL_PORT1538drivers/char/tpqic02.coutb_p(ctlbits, QIC02_CTL_PORT);
QIC02_CTL_PORT1548drivers/char/tpqic02.coutb_p(WT_CTL_DMA | WT_CTL_ONLINE, QIC02_CTL_PORT); /* trigger DMA transfer */
QIC02_CTL_PORT1551drivers/char/tpqic02.coutb_p(AR_CTL_IEN | AR_CTL_DNIEN, QIC02_CTL_PORT);  /* enable interrupts again */
QIC02_CTL_PORT1557drivers/char/tpqic02.coutb_p(ctlbits | (MTN_CTL_EXC_IEN | MTN_CTL_DNIEN), QIC02_CTL_PORT);
QIC02_CTL_PORT1705drivers/char/tpqic02.coutb_p(WT_CTL_ONLINE, QIC02_CTL_PORT);  /* back to normal */
QIC02_CTL_PORT1719drivers/char/tpqic02.coutb_p(ctlbits, QIC02_CTL_PORT);
QIC02_CTL_PORT2473drivers/char/tpqic02.cQIC02_CTL_PORT = QIC02_TAPE_PORT;
QIC02_CTL_PORT2509drivers/char/tpqic02.cQIC02_CTL_PORT = QIC02_TAPE_PORT+1;
QIC02_CTL_PORT2528drivers/char/tpqic02.cQIC02_CTL_PORT = QIC02_TAPE_PORT+1;