tag | line | file | source code |
wr | 919 | drivers/char/scc.c | wr(scc,R12,tc & 255); /* brg rate LOW */ |
wr | 920 | drivers/char/scc.c | wr(scc,R13,tc >> 8); /* brg rate HIGH */ |
wr | 936 | drivers/char/scc.c | wr(scc, R14, BRSRC); /* BRG source = PCLK */ |
wr | 948 | drivers/char/scc.c | wr(scc,R1,0); /* no W/REQ operation */ |
wr | 949 | drivers/char/scc.c | wr(scc,R3,Rx8|RxCRC_ENAB); /* RX 8 bits/char, CRC, disabled */ |
wr | 950 | drivers/char/scc.c | wr(scc,R4,X1CLK|SDLC); /* *1 clock, SDLC mode */ |
wr | 951 | drivers/char/scc.c | wr(scc,R5,Tx8|DTR|TxCRC_ENAB); /* TX 8 bits/char, disabled, DTR */ |
wr | 952 | drivers/char/scc.c | wr(scc,R6,0); /* SDLC address zero (not used) */ |
wr | 953 | drivers/char/scc.c | wr(scc,R7,FLAG); /* SDLC flag value */ |
wr | 954 | drivers/char/scc.c | wr(scc,R10,(scc->modem.nrz? NRZ : NRZI)|CRCPS|ABUNDER); /* abort on underrun, preset CRC generator, NRZ(I) */ |
wr | 955 | drivers/char/scc.c | wr(scc,R14, 0); |
wr | 987 | drivers/char/scc.c | wr(scc, R11, RCDPLL|TCDPLL|TRxCOI|TRxCDP); |
wr | 992 | drivers/char/scc.c | wr(scc, R11, ((Board & BAYCOM)? TRxCDP : TRxCBR) | RCDPLL|TCRTxCP|TRxCOI); |
wr | 997 | drivers/char/scc.c | wr(scc, R11, (Board & BAYCOM)? RCTRxCP|TCRTxCP : RCRTxCP|TCTRxCP); |
wr | 1004 | drivers/char/scc.c | wr(scc,R15,((Board & BAYCOM) ? 0 : CTSIE)|BRKIE|DCDIE|TxUIE); |
wr | 1009 | drivers/char/scc.c | wr(scc,R7,AUTOEOM); |
wr | 1066 | drivers/char/scc.c | wr(scc, R11, RCDPLL|TCBR|TRxCOI|TRxCBR); |
wr | 1075 | drivers/char/scc.c | wr(scc, R11, RCDPLL|TCDPLL|TRxCOI|TRxCDP); |
wr | 1663 | drivers/char/scc.c | wr(scc, R2, chip*16); /* interrupt vector */ |
wr | 1664 | drivers/char/scc.c | wr(scc, R9, VIS); /* vector includes status */ |
wr | 1781 | drivers/char/scc.c | wr(scc,R1,0); /* disable interrupts */ |
wr | 1782 | drivers/char/scc.c | wr(scc,R3,0); |
wr | 60 | include/asm-sparc/winmacro.h | wr %scratch, 0x0, %y; |