arch/sparc/kernel/probe.c

/* */
This source file includes following definitions.
find_mmu_num_contexts
probe_cpu
probe_vac
probe_mmu
probe_clock
probe_auxio
probe_devices
   1 /* $Id: probe.c,v 1.39 1995/11/26 00:54:37 davem Exp $
   2  * probe.c: Preliminary device tree probing routines...
   3  *
   4  * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
   5  */
   6 
   7 #include <linux/kernel.h>
   8 #include <linux/mm.h>
   9 #include <linux/sched.h>
  10 #include <linux/string.h>
  11 
  12 #include <asm/oplib.h>
  13 #include <asm/vac-ops.h>
  14 #include <asm/idprom.h>
  15 #include <asm/machines.h>
  16 #include <asm/io.h>
  17 #include <asm/vaddrs.h>
  18 #include <asm/param.h>
  19 #include <asm/timer.h>
  20 #include <asm/mostek.h>
  21 #include <asm/auxio.h>
  22 #include <asm/system.h>
  23 #include <asm/mp.h>
  24 #include <asm/mbus.h>
  25 
  26 /* #define DEBUG_PROBING */
  27 
  28 /* XXX Grrr, this stuff should have it's own file, only generic stuff goes
  29  * XXX here.  Possibly clock.c and timer.c?  This file should get smaller
  30  * XXX and smaller as time goes on...
  31  */
  32 enum sparc_clock_type sp_clock_typ;
  33 struct mostek48t02 *mstk48t02_regs = 0;
  34 struct mostek48t08 *mstk48t08_regs = 0;
  35 volatile unsigned int *master_l10_limit = 0;
  36 volatile unsigned int *master_l10_counter = 0;
  37 struct sun4m_timer_regs *sun4m_timers;
  38 
  39 static char node_str[128];
  40 
  41 /* Cpu-type information and manufacturer strings */
  42 
  43 struct cpu_iu_info {
  44   int psr_impl;
  45   int psr_vers;
  46   char* cpu_name;   /* should be enough I hope... */
  47 };
  48 
  49 struct cpu_fp_info {
  50   int psr_impl;
  51   int fp_vers;
  52   char* fp_name;
  53 };
  54 
  55 /* In order to get the fpu type correct, you need to take the IDPROM's
  56  * machine type value into consideration too.  I will fix this.
  57  */
  58 struct cpu_fp_info linux_sparc_fpu[] = {
  59   { 0, 0, "Fujitsu MB86910 or Weitek WTL1164/5"},
  60   { 0, 1, "Fujitsu MB86911 or Weitek WTL1164/5 or LSI L64831"},
  61   { 0, 2, "LSI Logic L64802 or Texas Instruments ACT8847"},
  62   /* SparcStation SLC, SparcStation1 */
  63   { 0, 3, "Weitek WTL3170/2"},
  64   /* SPARCstation-5 */
  65   { 0, 4, "Lsi Logic/Meiko L64804 or compatible"},
  66   { 0, 5, "reserved"},
  67   { 0, 6, "reserved"},
  68   { 0, 7, "No FPU"},
  69   { 1, 0, "ROSS HyperSparc combined IU/FPU"},
  70   { 1, 1, "Lsi Logic L64814"},
  71   { 1, 2, "Texas Instruments TMS390-C602A"},
  72   { 1, 3, "Cypress CY7C602 FPU"},
  73   { 1, 4, "reserved"},
  74   { 1, 5, "reserved"},
  75   { 1, 6, "reserved"},
  76   { 1, 7, "No FPU"},
  77   { 2, 0, "BIT B5010 or B5110/20 or B5210"},
  78   { 2, 1, "reserved"},
  79   { 2, 2, "reserved"},
  80   { 2, 3, "reserved"},
  81   { 2, 4, "reserved"},
  82   { 2, 5, "reserved"},
  83   { 2, 6, "reserved"},
  84   { 2, 7, "No FPU"},
  85   /* SuperSparc 50 module */
  86   { 4, 0, "SuperSparc on-chip FPU"},
  87   /* SparcClassic */
  88   { 4, 4, "TI MicroSparc on chip FPU"},
  89   { 5, 0, "Matsushita MN10501"},
  90   { 5, 1, "reserved"},
  91   { 5, 2, "reserved"},
  92   { 5, 3, "reserved"},
  93   { 5, 4, "reserved"},
  94   { 5, 5, "reserved"},
  95   { 5, 6, "reserved"},
  96   { 5, 7, "No FPU"},
  97 };
  98 
  99 #define NSPARCFPU  (sizeof(linux_sparc_fpu)/sizeof(struct cpu_fp_info))
 100 
 101 struct cpu_iu_info linux_sparc_chips[] = {
 102   /* Sun4/100, 4/200, SLC */
 103   { 0, 0, "Fujitsu  MB86900/1A or LSI L64831 SparcKIT-40"},
 104   /* borned STP1012PGA */
 105   { 0, 4, "Fujitsu  MB86904"},
 106   /* SparcStation2, SparcServer 490 & 690 */
 107   { 1, 0, "LSI Logic Corporation - L64811"},
 108   /* SparcStation2 */
 109   { 1, 1, "Cypress/ROSS CY7C601"},
 110   /* Embedded controller */
 111   { 1, 3, "Cypress/ROSS CY7C611"},
 112   /* Ross Technologies HyperSparc */
 113   { 1, 0xf, "ROSS HyperSparc RT620"},
 114   { 1, 0xe, "ROSS HyperSparc RT625"},
 115   /* ECL Implementation, CRAY S-MP Supercomputer... AIEEE! */
 116   /* Someone please write the code to support this beast! ;) */
 117   { 2, 0, "Bipolar Integrated Technology - B5010"},
 118   { 3, 0, "LSI Logic Corporation - unknown-type"},
 119   { 4, 0, "Texas Instruments, Inc. - SuperSparc 50"},
 120   /* SparcClassic  --  borned STP1010TAB-50*/
 121   { 4, 1, "Texas Instruments, Inc. - MicroSparc"},
 122   { 4, 2, "Texas Instruments, Inc. - MicroSparc II"},
 123   { 4, 3, "Texas Instruments, Inc. - SuperSparc 51"},
 124   { 4, 4, "Texas Instruments, Inc. - SuperSparc 61"},
 125   { 4, 5, "Texas Instruments, Inc. - unknown"},
 126   { 5, 0, "Matsushita - MN10501"},
 127   { 6, 0, "Philips Corporation - unknown"},
 128   { 7, 0, "Harvest VLSI Design Center, Inc. - unknown"},
 129   /* Gallium arsenide 200MHz, BOOOOGOOOOMIPS!!! */
 130   { 8, 0, "Systems and Processes Engineering Corporation (SPEC)"},
 131   { 9, 0, "Fujitsu #3"},
 132   { 0xa, 0, "UNKNOWN CPU-VENDOR/TYPE"},
 133   { 0xb, 0, "UNKNOWN CPU-VENDOR/TYPE"},
 134   { 0xc, 0, "UNKNOWN CPU-VENDOR/TYPE"},
 135   { 0xd, 0, "UNKNOWN CPU-VENDOR/TYPE"},
 136   { 0xe, 0, "UNKNOWN CPU-VENDOR/TYPE"},
 137   { 0xf, 0, "UNKNOWN CPU-VENDOR/TYPE"},
 138 };
 139 
 140 #define NSPARCCHIPS  (sizeof(linux_sparc_chips)/sizeof(struct cpu_iu_info))
 141 
 142 char *sparc_cpu_type[NCPUS] = { "cpu-oops", "cpu-oops1", "cpu-oops2", "cpu-oops3" };
 143 char *sparc_fpu_type[NCPUS] = { "fpu-oops", "fpu-oops1", "fpu-oops2", "fpu-oops3" };
 144 
 145 static inline int find_mmu_num_contexts(int cpu)
     /*  */
 146 {
 147         return prom_getintdefault(cpu, "mmu-nctx", 0x8);
 148 }
 149 
 150 unsigned int fsr_storage;
 151 
 152 void
 153 probe_cpu(void)
     /*  */
 154 {
 155         int psr_impl, psr_vers, fpu_vers;
 156         int i, cpuid;
 157 
 158         cpuid = get_cpuid();
 159 
 160         psr_impl = ((get_psr()>>28)&0xf);
 161         psr_vers = ((get_psr()>>24)&0xf);
 162 
 163         fpu_vers = ((get_fsr()>>17)&0x7);
 164 
 165         for(i = 0; i<NSPARCCHIPS; i++) {
 166                 if(linux_sparc_chips[i].psr_impl == psr_impl)
 167                         if(linux_sparc_chips[i].psr_vers == psr_vers) {
 168                                 sparc_cpu_type[cpuid] = linux_sparc_chips[i].cpu_name;
 169                                 break;
 170                         }
 171         }
 172 
 173         if(i==NSPARCCHIPS)
 174                 printk("DEBUG: psr.impl = 0x%x   psr.vers = 0x%x\n", psr_impl, 
 175                             psr_vers);
 176 
 177         for(i = 0; i<NSPARCFPU; i++) {
 178                 if(linux_sparc_fpu[i].psr_impl == psr_impl)
 179                         if(linux_sparc_fpu[i].fp_vers == fpu_vers) {
 180                                 sparc_fpu_type[cpuid] = linux_sparc_fpu[i].fp_name;
 181                                 break;
 182                         }
 183         }
 184 
 185         if(i == NSPARCFPU) {
 186                 printk("DEBUG: psr.impl = 0x%x  fsr.vers = 0x%x\n", psr_impl,
 187                             fpu_vers);
 188                 sparc_fpu_type[cpuid] = linux_sparc_fpu[31].fp_name;
 189         }
 190 
 191         printk("cpu%d CPU: %s \n", cpuid, sparc_cpu_type[cpuid]);
 192         printk("cpu%d FPU: %s \n", cpuid, sparc_fpu_type[cpuid]);
 193 }
 194 
 195 void
 196 probe_vac(void)
     /*  */
 197 {
 198         int propval;
 199 
 200         sun4c_disable_vac();
 201         sun4c_vacinfo.num_bytes = prom_getintdefault(prom_root_node,
 202                                                      "vac-size", 65536);
 203         sun4c_vacinfo.linesize = prom_getintdefault(prom_root_node,
 204                                                     "vac-linesize", 16);
 205         sun4c_vacinfo.num_lines =
 206                 (sun4c_vacinfo.num_bytes / sun4c_vacinfo.linesize);
 207         switch(sun4c_vacinfo.linesize) {
 208         case 16:
 209                 sun4c_vacinfo.log2lsize = 4;
 210                 break;
 211         case 32:
 212                 sun4c_vacinfo.log2lsize = 5;
 213                 break;
 214         default:
 215                 printk("probe_vac: Didn't expect vac-linesize of %d, halting\n",
 216                             sun4c_vacinfo.linesize);
 217         };
 218 
 219         propval = prom_getintdefault(prom_root_node, "vac_hwflush", -1);
 220         sun4c_vacinfo.do_hwflushes = (propval == -1 ?
 221                                       prom_getintdefault(prom_root_node,
 222                                                          "vac-hwflush", 0) :
 223                                       propval);
 224 
 225         printk("SUN4C: VAC size %d line size %d using %s flushes ",
 226                sun4c_vacinfo.num_bytes, sun4c_vacinfo.linesize,
 227                (sun4c_vacinfo.do_hwflushes ? "hardware" : "software"));
 228         if(sun4c_vacinfo.num_bytes != 65536) {
 229                 printk("WEIRD Sun4C VAC cache size, tell davem");
 230                 prom_halt();
 231         }
 232 
 233         /* setup the low-level assembly routine ptrs */
 234         if(sun4c_vacinfo.do_hwflushes) {
 235                 if(sun4c_vacinfo.linesize == 16) {
 236                         sun4c_ctxflush = (unsigned long)sun4c_ctxflush_hw64KB16B;
 237                         sun4c_segflush = (unsigned long)sun4c_segflush_hw64KB16B;
 238                         sun4c_pgflush = (unsigned long)sun4c_pgflush_hw64KB16B;
 239                 } else if(sun4c_vacinfo.linesize == 32) {
 240                         sun4c_ctxflush = (unsigned long)sun4c_ctxflush_hw64KB32B;
 241                         sun4c_segflush = (unsigned long)sun4c_segflush_hw64KB32B;
 242                         sun4c_pgflush = (unsigned long)sun4c_pgflush_hw64KB32B;
 243                 } else {
 244                         printk("WEIRD Sun4C VAC cache line size, tell davem\n");
 245                         prom_halt();
 246                 }
 247         } else {
 248                 if(sun4c_vacinfo.linesize == 16) {
 249                         sun4c_ctxflush = (unsigned long)sun4c_ctxflush_sw64KB16B;
 250                         sun4c_segflush = (unsigned long)sun4c_segflush_sw64KB16B;
 251                         sun4c_pgflush = (unsigned long)sun4c_pgflush_sw64KB16B;
 252                 } else if(sun4c_vacinfo.linesize == 32) {
 253                         sun4c_ctxflush = (unsigned long)sun4c_ctxflush_sw64KB32B;
 254                         sun4c_segflush = (unsigned long)sun4c_segflush_sw64KB32B;
 255                         sun4c_pgflush = (unsigned long)sun4c_pgflush_sw64KB32B;
 256                 } else {
 257                         printk("WEIRD Sun4C VAC cache line size, tell davem\n");
 258                         prom_halt();
 259                 }
 260         }
 261 
 262 
 263         sun4c_flush_all();
 264         sun4c_enable_vac();
 265         printk("enabled\n");
 266 
 267         return;
 268 }
 269 
 270 extern int num_segmaps, num_contexts;
 271 
 272 /* XXX Only called on sun4c XXX */
 273 void
 274 probe_mmu(void)
     /*  */
 275 {
 276         int cpuid;
 277 
 278         /* who are we? */
 279         cpuid = get_cpuid();
 280         switch(sparc_cpu_model) {
 281         case sun4:
 282         case sun4c:
 283         case sun4e:
 284                 /* A sun4, sun4c or sun4e. */
 285                 num_segmaps = prom_getintdefault(prom_root_node, "mmu-npmg", 128);
 286                 num_contexts = find_mmu_num_contexts(prom_root_node);
 287 
 288                 printk("cpu%d MMU segmaps: %d     MMU contexts: %d\n", cpuid,
 289                             num_segmaps, num_contexts);
 290                 break;
 291         default:
 292                 printk("cpu%d probe_mmu: sparc_cpu_model botch\n", cpuid);
 293                 break;
 294         };
 295 }
 296 
 297 /* Clock probing, we probe the timers here also. */
 298 volatile unsigned int foo_limit;
 299 
 300 void
 301 probe_clock(int fchild)
     /*  */
 302 {
 303         register int node, type;
 304         struct linux_prom_registers clk_reg[2];
 305 
 306         /* This will basically traverse the node-tree of the prom to see
 307          * which timer chip is on this machine.
 308          */
 309 
 310         node = 0;
 311         if(sparc_cpu_model == sun4) {
 312                 printk("probe_clock: No SUN4 Clock/Timer support yet...\n");
 313                 return;
 314         }
 315         if(sparc_cpu_model == sun4c) node=prom_getchild(prom_root_node);
 316         else
 317                 if(sparc_cpu_model == sun4m)
 318                         node=prom_getchild(prom_searchsiblings(prom_getchild(prom_root_node), "obio"));
 319         type = 0;
 320         sp_clock_typ = MSTK_INVALID;
 321         for(;;) {
 322                 prom_getstring(node, "model", node_str, sizeof(node_str));
 323                 if(strcmp(node_str, "mk48t02") == 0) {
 324                         sp_clock_typ = MSTK48T02;
 325                         if(prom_getproperty(node, "reg", (char *) clk_reg, sizeof(clk_reg)) == -1) {
 326                                 printk("probe_clock: FAILED!\n");
 327                                 halt();
 328                         }
 329                         prom_apply_obio_ranges(clk_reg, 1);
 330                         /* Map the clock register io area read-only */
 331                         mstk48t02_regs = (struct mostek48t02 *) 
 332                                 sparc_alloc_io((void *) clk_reg[0].phys_addr,
 333                                                (void *) 0, sizeof(*mstk48t02_regs),
 334                                                "clock", 0x0, 0x0);
 335                         mstk48t08_regs = 0;  /* To catch weirdness */
 336                         break;
 337                 }
 338 
 339                 if(strcmp(node_str, "mk48t08") == 0) {
 340                         sp_clock_typ = MSTK48T08;
 341                         if(prom_getproperty(node, "reg", (char *) clk_reg,
 342                                             sizeof(clk_reg)) == -1) {
 343                                 printk("probe_clock: FAILED!\n");
 344                                 halt();
 345                         }
 346                         prom_apply_obio_ranges(clk_reg, 1);
 347                         /* Map the clock register io area read-only */
 348                         mstk48t08_regs = (struct mostek48t08 *)
 349                                 sparc_alloc_io((void *) clk_reg[0].phys_addr,
 350                                                (void *) 0, sizeof(*mstk48t08_regs),
 351                                                "clock", 0x0, 0x0);
 352 
 353                         mstk48t02_regs = &mstk48t08_regs->regs;
 354                         break;
 355                 }
 356 
 357                 node = prom_getsibling(node);
 358                 if(node == 0) {
 359                         printk("Aieee, could not find timer chip type\n");
 360                         return;
 361                 }
 362         }
 363 
 364         if(sparc_cpu_model == sun4c) {
 365                 /* Map the Timer chip, this is implemented in hardware inside
 366                  * the cache chip on the sun4c.
 367                  */
 368                 sparc_alloc_io ((void *) SUN4C_TIMER_PHYSADDR, (void *) TIMER_VADDR,
 369                                 sizeof (*SUN4C_TIMER_STRUCT), "timer", 0x0, 0x0);
 370 
 371                 /* Have the level 10 timer tick at 100HZ.  We don't touch the
 372                  * level 14 timer limit since we are letting the prom handle
 373                  * them until we have a real console driver so L1-A works.
 374                  */
 375                 SUN4C_TIMER_STRUCT->timer_limit10 = (((1000000/HZ) + 1) << 10);
 376                 master_l10_limit = &(SUN4C_TIMER_STRUCT->timer_limit10);
 377                 master_l10_counter = &(SUN4C_TIMER_STRUCT->cur_count10);
 378         } else {
 379                 int reg_count;
 380                 struct linux_prom_registers cnt_regs[PROMREG_MAX];
 381                 int obio_node, cnt_node;
 382 
 383                 cnt_node = 0;
 384                 if((obio_node =
 385                     prom_searchsiblings (prom_getchild(prom_root_node), "obio")) == 0 ||
 386                    (obio_node = prom_getchild (obio_node)) == 0 ||
 387                    (cnt_node = prom_searchsiblings (obio_node, "counter")) == 0) {
 388                         printk ("Cannot find /obio/counter node\n");
 389                         prom_halt ();
 390                 }
 391                 reg_count = prom_getproperty(cnt_node, "reg",
 392                                              (void *) cnt_regs, sizeof(cnt_regs));
 393                 reg_count = (reg_count/sizeof(struct linux_prom_registers));
 394 
 395                 /* Apply the obio ranges to the timer registers. */
 396                 prom_apply_obio_ranges(cnt_regs, reg_count);
 397 
 398                 /* Map the per-cpu Counter registers. */
 399                 sparc_alloc_io(cnt_regs[0].phys_addr, (void *) TIMER_VADDR,
 400                                PAGE_SIZE*NCPUS, "counters_percpu",
 401                                cnt_regs[0].which_io, 0x0);
 402 
 403                 /* Map the system Counter register. */
 404                 sparc_alloc_io(cnt_regs[reg_count-1].phys_addr,
 405                                (void *) TIMER_VADDR+(NCPUS*PAGE_SIZE),
 406                                cnt_regs[reg_count-1].reg_size,
 407                                "counters_system", cnt_regs[reg_count-1].which_io, 0x0);
 408                 sun4m_timers = (struct sun4m_timer_regs *) TIMER_VADDR;
 409 
 410                 /* Avoid interrupt bombs... */
 411                 foo_limit = (volatile) sun4m_timers->l10_timer_limit;
 412 
 413                 /* Must set the master pointer first or we will lose badly. */
 414                 master_l10_limit =
 415                         &(((struct sun4m_timer_regs *)TIMER_VADDR)->l10_timer_limit);
 416                 master_l10_counter =
 417                         &(((struct sun4m_timer_regs *)TIMER_VADDR)->l10_cur_count);
 418 
 419                 ((struct sun4m_timer_regs *)TIMER_VADDR)->l10_timer_limit =
 420                         (((1000000/HZ) + 1) << 10);
 421         }
 422 }
 423 
 424 /* Probe and map in the Auxiliaary I/O register */
 425 void
 426 probe_auxio(void)
     /*  */
 427 {
 428         int node, auxio_nd;
 429         struct linux_prom_registers auxregs[1];
 430 
 431         node = prom_getchild(prom_root_node);
 432         auxio_nd = prom_searchsiblings(node, "auxiliary-io");
 433         if(!auxio_nd) {
 434                 node = prom_searchsiblings(node, "obio");
 435                 node = prom_getchild(node);
 436                 auxio_nd = prom_searchsiblings(node, "auxio");
 437                 if(!auxio_nd) {
 438                         printk("Cannot find auxio node, cannot continue...\n");
 439                         prom_halt();
 440                 }
 441         }
 442         prom_getproperty(auxio_nd, "reg", (char *) auxregs, sizeof(auxregs));
 443         prom_apply_obio_ranges(auxregs, 0x1);
 444         /* Map the register both read and write */
 445         sparc_alloc_io(auxregs[0].phys_addr, (void *) AUXIO_VADDR,
 446                        auxregs[0].reg_size, "auxilliaryIO", auxregs[0].which_io, 0x0);
 447         printk("Mapped AUXIO at paddr %08lx vaddr %08lx\n",
 448                     (unsigned long) auxregs[0].phys_addr,
 449                     (unsigned long) AUXIO_VADDR);
 450 }
 451 
 452 extern unsigned long probe_memory(void);
 453 extern struct sparc_phys_banks sp_banks[SPARC_PHYS_BANKS];
 454 unsigned int phys_bytes_of_ram, end_of_phys_memory;
 455 extern void probe_mbus(void);
 456 
 457 /* #define DEBUG_PROBE_DEVICES */
 458 struct prom_cpuinfo linux_cpus[NCPUS];
 459 int linux_num_cpus;
 460 
 461 unsigned long
 462 probe_devices(unsigned long mem_start)
     /*  */
 463 {
 464         int nd, i, prom_node_cpu, thismid;
 465         int cpu_nds[NCPUS];  /* One node for each cpu */
 466         int cpu_ctr = 0;
 467 
 468         prom_getstring(prom_root_node, "device_type", node_str, sizeof(node_str));
 469         if(strcmp(node_str, "cpu") == 0) {
 470                 cpu_nds[0] = prom_root_node;
 471                 cpu_ctr++;
 472         } else {
 473                 int scan;
 474                 scan = prom_getchild(prom_root_node);
 475                 nd = 0;
 476                 while((scan = prom_getsibling(scan)) != 0) {
 477                         prom_getstring(scan, "device_type", node_str, sizeof(node_str));
 478                         if(strcmp(node_str, "cpu") == 0) {
 479                                 cpu_nds[cpu_ctr] = scan;
 480                                 linux_cpus[cpu_ctr].prom_node = scan;
 481                                 prom_getproperty(scan, "mid", (char *) &thismid, sizeof(thismid));
 482                                 linux_cpus[cpu_ctr].mid = thismid;
 483                                 cpu_ctr++;
 484                         }
 485                 };
 486                 if(cpu_ctr == 0) {
 487                         printk("No CPU nodes found, cannot continue.\n");
 488                         /* Probably a sun4d or sun4e, Sun is trying to trick us ;-) */
 489                         halt();
 490                 }
 491                 printk("Found %d CPU prom device tree node(s).\n", cpu_ctr);
 492         };
 493         prom_node_cpu = cpu_nds[0];
 494 
 495         linux_num_cpus = cpu_ctr;
 496         for(i=0; i<cpu_ctr; i++) {
 497                 prom_getstring(cpu_nds[i], "name", node_str, sizeof(node_str));
 498                 printk("cpu%d: %s \n", i, node_str);
 499         }
 500 
 501         probe_cpu();
 502         probe_auxio();
 503         if(sparc_cpu_model != sun4c) probe_mbus();
 504 
 505         return mem_start;
 506 }
/* */
root/arch/sparc/kernel/probe.c

DEFINITIONS
