arch/sparc/kernel/head.S

/* */
   1 /* $Id: head.S,v 1.39 1995/11/25 00:58:01 davem Exp $
   2  * head.S: The initial boot code for the Sparc port of Linux.
   3  *
   4  * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
   5  * Copyright (C) 1995 Peter Zaitcev   (Zaitcev@ipmce.su)
   6  */
   7 
   8 #include <linux/version.h>
   9 
  10 #include <asm/cprefix.h>
  11 #include <asm/head.h>
  12 #include <asm/asi.h>
  13 #include <asm/contregs.h>
  14 #include <asm/ptrace.h>
  15 #include <asm/psr.h>
  16 #include <asm/page.h>
  17 #include <asm/kdebug.h>
  18 #include <asm/winmacro.h>
  19 
  20         .data
  21 /* 
  22  * The following are used with the prom_vector node-ops to figure out
  23  * the cpu-type 
  24  */
  25 
  26         .align 4
  27         .globl  C_LABEL(cputyp)
  28 C_LABEL(cputyp):
  29         .word   1
  30 
  31         .align 4
  32         .globl C_LABEL(cputypval)
  33 C_LABEL(cputypval):
  34         .asciz "sun4c"
  35         .ascii "     "
  36 
  37 C_LABEL(cputypvalend):
  38 C_LABEL(cputypvallen) = C_LABEL(cputypvar) - C_LABEL(cputypval)
  39 
  40         .align 4
  41 /*
  42  * Sun people can't spell worth damn. "compatability" indeed.
  43  * At least we *know* we can't spell, and use a spell-checker.
  44  */
  45 
  46 /* Uh, actually Linus it is I who cannot spell. Too much murky
  47  * Sparc assembly will do this to ya.
  48  */
  49 C_LABEL(cputypvar):
  50         .asciz "compatability"
  51 
  52 /* Tested on SS-5, SS-10. Probably someone at Sun applied a spell-checker. --P3 */
  53         .align 4
  54 C_LABEL(cputypvar_sun4m):
  55         .asciz "compatible"
  56 
  57         .align 4
  58 sun4_notsup:
  59         .asciz  "Sparc-Linux sun4 support not implemented yet\n\n"
  60         .align 4
  61 
  62 sun4d_notsup:
  63         .asciz  "Sparc-Linux sun4d support does not exist\n\n"
  64         .align 4
  65 
  66 sun4e_notsup:
  67         .asciz  "Sparc-Linux sun4e support does not exist\n\n"
  68         .align 4
  69 
  70 sun4u_notsup:
  71         .asciz  "Sparc-Linux sun4u support does not exist\n\n"
  72         .align 4
  73 
  74         /* The Sparc trap table, bootloader gives us control at _start. */
  75         .text
  76         .globl  start, _stext, _start, __stext
  77         .globl  C_LABEL(trapbase)
  78 _start:   /* danger danger */
  79 __stext:
  80 _stext:
  81 start:
  82 C_LABEL(trapbase):
  83 /* We get control passed to us here at t_zero. */
  84 t_zero: b gokernel; nop; nop; nop;
  85 t_tflt: TRAP_ENTRY(0x1, sparc_fault)        /* Inst. Access Exception        */
  86 t_bins: TRAP_ENTRY(0x2, bad_instruction)    /* Illegal Instruction           */
  87 t_pins: TRAP_ENTRY(0x3, priv_instruction)   /* Privileged Instruction        */
  88 t_fpd:  TRAP_ENTRY(0x4, fpd_trap_handler)   /* Floating Point Disabled       */
  89 t_wovf: WINDOW_SPILL                        /* Window Overflow               */
  90 t_wunf: WINDOW_FILL                         /* Window Underflow              */
  91 t_mna:  TRAP_ENTRY(0x7, mna_handler)        /* Memory Address Not Aligned    */
  92 t_fpe:  TRAP_ENTRY(0x8, fpe_trap_handler)   /* Floating Point Exception      */
  93 t_dflt: TRAP_ENTRY(0x9, sparc_fault)        /* Data Miss Exception           */
  94 t_tio:  TRAP_ENTRY(0xa, do_tag_overflow)    /* Tagged Instruction Ovrflw     */
  95 t_wpt:  TRAP_ENTRY(0xb, do_watchpoint)      /* Watchpoint Detected           */
  96 t_badc: BAD_TRAP(0xc) BAD_TRAP(0xd) BAD_TRAP(0xe) BAD_TRAP(0xf) BAD_TRAP(0x10)
  97 t_irq1: TRAP_ENTRY_SOFTINT(1)               /* IRQ Software/SBUS Level 1     */
  98 t_irq2: TRAP_ENTRY_INTERRUPT(2)             /* IRQ SBUS Level 2              */
  99 t_irq3: TRAP_ENTRY_INTERRUPT(3)             /* IRQ SCSI/DMA/SBUS Level 3     */
 100 t_irq4: TRAP_ENTRY_SOFTINT(4)               /* IRQ Software Level 4          */
 101 t_irq5: TRAP_ENTRY_INTERRUPT(5)             /* IRQ SBUS/Ethernet Level 5     */
 102 t_irq6: TRAP_ENTRY_SOFTINT(6)               /* IRQ Software Level 6          */
 103 t_irq7: TRAP_ENTRY_INTERRUPT(7)             /* IRQ Video/SBUS Level 5        */
 104 t_irq8: TRAP_ENTRY_INTERRUPT(8)             /* IRQ SBUS Level 6              */
 105 t_irq9: TRAP_ENTRY_INTERRUPT(9)             /* IRQ SBUS Level 7              */
 106 t_irq10:TRAP_ENTRY_INTERRUPT(10)            /* IRQ Timer #1 (one we use)     */
 107 t_irq11:TRAP_ENTRY_INTERRUPT(11)            /* IRQ Floppy Intr.              */
 108 t_irq12:TRAP_ENTRY_INTERRUPT(12)            /* IRQ Zilog serial chip         */
 109 t_irq13:TRAP_ENTRY_INTERRUPT(13)            /* IRQ Audio Intr.               */
 110 t_irq14:TRAP_ENTRY_INTERRUPT(14)            /* IRQ Timer #2                  */
 111 t_nmi:  NMI_TRAP                            /* Level 15 (NMI)                */
 112 t_racc: TRAP_ENTRY(0x20, do_reg_access)     /* General Register Access Error */
 113 t_iacce:TRAP_ENTRY(0x21, sparc_fault)       /* Instr Access Error    */
 114 t_bad22:BAD_TRAP(0x22) BAD_TRAP(0x23)
 115 t_cpdis:TRAP_ENTRY(0x24, do_cp_disabled)    /* Co-Processor Disabled         */
 116 t_uflsh:TRAP_ENTRY(0x25, do_bad_flush)      /* Unimplemented FLUSH inst.     */
 117 t_bad26:BAD_TRAP(0x26) BAD_TRAP(0x27)
 118 t_cpexc:TRAP_ENTRY(0x28, do_cp_exception)   /* Co-Processor Exception        */
 119 t_dacce:TRAP_ENTRY(0x29, sparc_fault)       /* Data Access Error     */
 120 t_hwdz: TRAP_ENTRY(0x2a, do_hw_divzero)     /* Division by zero, you lose... */
 121 t_dserr:TRAP_ENTRY(0x2b, sparc_fault)       /* Data Store Error      */
 122 t_daccm:TRAP_ENTRY(0x2c, sparc_fault)       /* Data Access MMU-Miss  */
 123 t_bad2d:BAD_TRAP(0x2d) BAD_TRAP(0x2e) BAD_TRAP(0x2f) BAD_TRAP(0x30) BAD_TRAP(0x31)
 124 t_bad32:BAD_TRAP(0x32) BAD_TRAP(0x33) BAD_TRAP(0x34) BAD_TRAP(0x35) BAD_TRAP(0x36)
 125 t_bad37:BAD_TRAP(0x37) BAD_TRAP(0x38) BAD_TRAP(0x39) BAD_TRAP(0x3a) BAD_TRAP(0x3b)
 126 t_iaccm:TRAP_ENTRY(0x3c, sparc_fault)       /* Instr Access MMU-Miss */
 127 t_bad3d:BAD_TRAP(0x3d) BAD_TRAP(0x3e) BAD_TRAP(0x3f) BAD_TRAP(0x40) BAD_TRAP(0x41)
 128 t_bad42:BAD_TRAP(0x42) BAD_TRAP(0x43) BAD_TRAP(0x44) BAD_TRAP(0x45) BAD_TRAP(0x46)
 129 t_bad47:BAD_TRAP(0x47) BAD_TRAP(0x48) BAD_TRAP(0x49) BAD_TRAP(0x4a) BAD_TRAP(0x4b)
 130 t_bad4c:BAD_TRAP(0x4c) BAD_TRAP(0x4d) BAD_TRAP(0x4e) BAD_TRAP(0x4f) BAD_TRAP(0x50)
 131 t_bad51:BAD_TRAP(0x51) BAD_TRAP(0x52) BAD_TRAP(0x53) BAD_TRAP(0x54) BAD_TRAP(0x55)
 132 t_bad56:BAD_TRAP(0x56) BAD_TRAP(0x57) BAD_TRAP(0x58) BAD_TRAP(0x59) BAD_TRAP(0x5a)
 133 t_bad5b:BAD_TRAP(0x5b) BAD_TRAP(0x5c) BAD_TRAP(0x5d) BAD_TRAP(0x5e) BAD_TRAP(0x5f)
 134 t_bad60:BAD_TRAP(0x60) BAD_TRAP(0x61) BAD_TRAP(0x62) BAD_TRAP(0x63) BAD_TRAP(0x64)
 135 t_bad65:BAD_TRAP(0x65) BAD_TRAP(0x66) BAD_TRAP(0x67) BAD_TRAP(0x68) BAD_TRAP(0x69)
 136 t_bad6a:BAD_TRAP(0x6a) BAD_TRAP(0x6b) BAD_TRAP(0x6c) BAD_TRAP(0x6d) BAD_TRAP(0x6e)
 137 t_bad6f:BAD_TRAP(0x6f) BAD_TRAP(0x70) BAD_TRAP(0x71) BAD_TRAP(0x72) BAD_TRAP(0x73)
 138 t_bad74:BAD_TRAP(0x74) BAD_TRAP(0x75) BAD_TRAP(0x76) BAD_TRAP(0x77) BAD_TRAP(0x78)
 139 t_bad79:BAD_TRAP(0x79) BAD_TRAP(0x7a) BAD_TRAP(0x7b) BAD_TRAP(0x7c) BAD_TRAP(0x7d)
 140 t_bad7e:BAD_TRAP(0x7e) BAD_TRAP(0x7f)
 141 t_sunos:SUNOS_SYSCALL_TRAP                  /* SunOS System Call             */
 142 t_sbkpt:BAD_TRAP(0x81)                      /* Software Breakpoint/KGDB      */
 143 t_divz: BAD_TRAP(0x82)                      /* Divide by zero trap           */
 144 t_flwin:TRAP_ENTRY(0x83, do_flush_windows)  /* Flush Windows Trap            */
 145 t_clwin:BAD_TRAP(0x84)                      /* Clean Windows Trap            */
 146 t_rchk: BAD_TRAP(0x85)                      /* Range Check                   */
 147 t_funal:BAD_TRAP(0x86)                      /* Fix Unaligned Access Trap     */
 148 t_iovf: BAD_TRAP(0x87)                      /* Integer Overflow Trap         */
 149 t_slowl:SOLARIS_SYSCALL_TRAP                /* Slowaris System Call          */
 150 t_netbs:NETBSD_SYSCALL_TRAP                 /* Net-B.S. System Call          */
 151 t_bad8a:BAD_TRAP(0x8a) BAD_TRAP(0x8b) BAD_TRAP(0x8c) BAD_TRAP(0x8d) BAD_TRAP(0x8e)
 152 t_bad8f:BAD_TRAP(0x8f)
 153 t_linux:LINUX_SYSCALL_TRAP                  /* Linux System Call             */
 154 t_bad91:BAD_TRAP(0x91) BAD_TRAP(0x92) BAD_TRAP(0x93) BAD_TRAP(0x94) BAD_TRAP(0x95)
 155 t_bad96:BAD_TRAP(0x96) BAD_TRAP(0x97) BAD_TRAP(0x98) BAD_TRAP(0x99) BAD_TRAP(0x9a)
 156 t_bad9b:BAD_TRAP(0x9b) BAD_TRAP(0x9c) BAD_TRAP(0x9d) BAD_TRAP(0x9e) BAD_TRAP(0x9f)
 157 t_getcc:GETCC_TRAP                          /* Get Condition Codes           */
 158 t_setcc:SETCC_TRAP                          /* Set Condition Codes           */
 159 t_bada2:BAD_TRAP(0xa2) BAD_TRAP(0xa3) BAD_TRAP(0xa4) BAD_TRAP(0xa5) BAD_TRAP(0xa6)
 160 t_bada7:BAD_TRAP(0xa7) BAD_TRAP(0xa8) BAD_TRAP(0xa9) BAD_TRAP(0xaa) BAD_TRAP(0xab)
 161 t_badac:BAD_TRAP(0xac) BAD_TRAP(0xad) BAD_TRAP(0xae) BAD_TRAP(0xaf) BAD_TRAP(0xb0)
 162 t_badb1:BAD_TRAP(0xb1) BAD_TRAP(0xb2) BAD_TRAP(0xb3) BAD_TRAP(0xb4) BAD_TRAP(0xb5)
 163 t_badb6:BAD_TRAP(0xb6) BAD_TRAP(0xb7) BAD_TRAP(0xb8) BAD_TRAP(0xb9) BAD_TRAP(0xba)
 164 t_badbb:BAD_TRAP(0xbb) BAD_TRAP(0xbc) BAD_TRAP(0xbd) BAD_TRAP(0xbe) BAD_TRAP(0xbf)
 165 t_badc0:BAD_TRAP(0xc0) BAD_TRAP(0xc1) BAD_TRAP(0xc2) BAD_TRAP(0xc3) BAD_TRAP(0xc4)
 166 t_badc5:BAD_TRAP(0xc5) BAD_TRAP(0xc6) BAD_TRAP(0xc7) BAD_TRAP(0xc8) BAD_TRAP(0xc9)
 167 t_badca:BAD_TRAP(0xca) BAD_TRAP(0xcb) BAD_TRAP(0xcc) BAD_TRAP(0xcd) BAD_TRAP(0xce)
 168 t_badcf:BAD_TRAP(0xcf) BAD_TRAP(0xd0) BAD_TRAP(0xd1) BAD_TRAP(0xd2) BAD_TRAP(0xd3)
 169 t_badd4:BAD_TRAP(0xd4) BAD_TRAP(0xd5) BAD_TRAP(0xd6) BAD_TRAP(0xd7) BAD_TRAP(0xd8)
 170 t_badd9:BAD_TRAP(0xd9) BAD_TRAP(0xda) BAD_TRAP(0xdb) BAD_TRAP(0xdc) BAD_TRAP(0xdd)
 171 t_badde:BAD_TRAP(0xde) BAD_TRAP(0xdf) BAD_TRAP(0xe0) BAD_TRAP(0xe1) BAD_TRAP(0xe2)
 172 t_bade3:BAD_TRAP(0xe3) BAD_TRAP(0xe4) BAD_TRAP(0xe5) BAD_TRAP(0xe6) BAD_TRAP(0xe7)
 173 t_bade8:BAD_TRAP(0xe8) BAD_TRAP(0xe9) BAD_TRAP(0xea) BAD_TRAP(0xeb) BAD_TRAP(0xec)
 174 t_baded:BAD_TRAP(0xed) BAD_TRAP(0xee) BAD_TRAP(0xef) BAD_TRAP(0xf0) BAD_TRAP(0xf1)
 175 t_badf2:BAD_TRAP(0xf2) BAD_TRAP(0xf3) BAD_TRAP(0xf4) BAD_TRAP(0xf5) BAD_TRAP(0xf6)
 176 t_badf7:BAD_TRAP(0xf7) BAD_TRAP(0xf8) BAD_TRAP(0xf9) BAD_TRAP(0xfa) BAD_TRAP(0xfb)
 177 t_badfc:BAD_TRAP(0xfc) BAD_TRAP(0xfd)
 178 dbtrap: BAD_TRAP(0xfe)                      /* Debugger/PROM breakpoint #1   */
 179 dbtrap2:BAD_TRAP(0xff)                      /* Debugger/PROM breakpoint #2   */ 
 180 
 181         .globl  C_LABEL(end_traptable)
 182 C_LABEL(end_traptable):
 183 
 184         .skip 4096
 185 
 186 /* This was the only reasonable way I could think of to properly align
 187  * these page-table data structures.
 188  */
 189 
 190         .globl C_LABEL(auxio_reg_addr)
 191 C_LABEL(auxio_reg_addr):        .skip   (PAGE_SIZE)
 192 
 193         .globl C_LABEL(clock_reg_addr)
 194 C_LABEL(clock_reg_addr):        .skip   (PAGE_SIZE*5)
 195 
 196         .globl C_LABEL(int_reg_addr)
 197 C_LABEL(int_reg_addr):          .skip   (PAGE_SIZE*5)
 198 
 199         .globl C_LABEL(bootup_user_stack)
 200         .globl C_LABEL(bootup_kernel_stack)
 201         .globl C_LABEL(pg0)
 202         .globl C_LABEL(empty_bad_page)
 203         .globl C_LABEL(empty_bad_page_table)
 204         .globl C_LABEL(empty_zero_page)
 205         .globl C_LABEL(swapper_pg_dir)
 206 C_LABEL(bootup_user_stack):             .skip 0x1000
 207 C_LABEL(bootup_kernel_stack):           .skip 0x1000
 208 C_LABEL(swapper_pg_dir):                .skip 0x1000
 209 C_LABEL(pg0):                           .skip 0x1000
 210 C_LABEL(empty_bad_page):                .skip 0x1000
 211 C_LABEL(empty_bad_page_table):          .skip 0x1000
 212 C_LABEL(empty_zero_page):               .skip 0x1000
 213 
 214 
 215 /* Cool, here we go. Pick up the romvec pointer in %o0 and stash it in
 216  * %g7 and at prom_vector_p. And also quickly check whether we are on
 217  * a v0, v2, or v3 prom.
 218  */
 219 gokernel:
 220                 /* Ok, it's nice to know, as early as possible, if we
 221                  * are already mapped where we expect to be in virtual
 222                  * memory.  The Solaris /boot elf format bootloader
 223                  * will peek into our elf header and load us where
 224                  * we want to be, otherwise we have to re-map.
 225                  *
 226                  * Some boot loaders don't place the jmp'rs address
 227                  * in %o7, so we do a pc-relative call to a local
 228                  * label, then see what %o7 has.
 229                  */
 230 
 231                 /* XXX Sparc V9 detection goes here XXX */
 232 
 233                 mov     %o7, %g4                ! Save %o7
 234 
 235                 /* Jump to it, and pray... */
 236 current_pc:
 237                 call    1f
 238                  nop
 239 
 240 1:
 241                 mov     %o7, %g3
 242 
 243 got_pc:
 244                 mov     %g4, %o7                /* Previous %o7. */
 245         
 246                 mov     %o0, %l0                ! stash away romvec
 247                 mov     %o0, %g7                ! put it here too
 248                 mov     %o1, %l1                ! stash away debug_vec too
 249 
 250                 /* Ok, let's check out our run time program counter. */
 251                 set     current_pc, %g5
 252                 cmp     %g3, %g5
 253                 be      already_mapped
 254                  nop 
 255 
 256                 /* %l6 will hold the offset we have to subtract
 257                  * from absolute symbols in order to access areas
 258                  * in our own image.  If already mapped this is
 259                  * just plain zero, else it is PAGE_OFFSET which is
 260                  * also KERNBASE.
 261                  */
 262                 set     PAGE_OFFSET, %l6
 263                 b       copy_prom_lvl14
 264                  nop
 265 
 266 already_mapped:
 267                 mov     0, %l6
 268 
 269                 /* Copy over the Prom's level 14 clock handler. */
 270 copy_prom_lvl14:
 271                 rd      %tbr, %g1
 272                 andn    %g1, 0xfff, %g1         ! proms trap table base
 273                 or      %g0, (0x1e<<4), %g2     ! offset to lvl14 intr
 274                 or      %g1, %g2, %g2
 275                 set     t_irq14, %g3
 276                 sub     %g3, %l6, %g3
 277                 ldd     [%g2], %g4
 278                 std     %g4, [%g3]
 279                 ldd     [%g2 + 0x8], %g4
 280                 std     %g4, [%g3 + 0x8]        ! Copy proms handler
 281 
 282                 /* Copy over the Prom/debugger's trap entry points. */
 283 copy_prom_bpoint:
 284                 or      %g0, (0xfe<<4), %g2
 285                 or      %g1, %g2, %g2
 286                 set     dbtrap, %g3
 287                 sub     %g3, %l6, %g3
 288                 ldd     [%g2], %g4
 289                 std     %g4, [%g3]
 290                 ldd     [%g2 + 0x8], %g4
 291                 std     %g4, [%g3 + 0x8]
 292                 ldd     [%g2 + 0x10], %g4
 293                 std     %g4, [%g3 + 0x10]
 294                 ldd     [%g2 + 0x18], %g4
 295                 std     %g4, [%g3 + 0x18]
 296 
 297 /* Must determine whether we are on a sun4c MMU, SRMMU, or SUN4/400 MUTANT
 298  * MMU so we can remap ourselves properly.  DONT TOUCH %l0 thru %l5 in these
 299  * remapping routines, we need their values afterwards!
 300  *
 301  * XXX UGH, need to write some sun4u SpitFire remapping V9 code RSN... XXX
 302  */
 303                 /* Now check whether we are already mapped, if we
 304                  * are we can skip all this garbage coming up.
 305                  */
 306 copy_prom_done:
 307                 cmp     %l6, 0
 308                 be      go_to_highmem           ! this will be a nop then
 309                  nop
 310 
 311                 set     LOAD_ADDR, %g6
 312                 cmp     %g7, %g6
 313                 bne     remap_not_a_sun4        ! This is not a Sun4
 314                  nop
 315 
 316                 or      %g0, 0x1, %g1
 317                 lduba   [%g1] ASI_CONTROL, %g1  ! Only safe to try on Sun4.
 318                 subcc   %g1, 0x24, %g0          ! Is this a mutant Sun4/400???
 319                 be      sun4_mutant_remap       ! Ugh, it is...
 320                  nop
 321 
 322 remap_not_a_sun4:
 323                 lda     [%g0] ASI_M_MMUREGS, %g1 ! same as ASI_PTE on sun4c
 324                 and     %g1, 0x1, %g1           ! Test SRMMU Enable bit ;-)
 325                 cmp     %g1, 0x0
 326                 be      sun4c_remap             ! A sun4c MMU or normal Sun4
 327                  nop
 328 srmmu_remap:
 329                 /* First, check for a viking (TI) module. */
 330                 set     0x40000000, %g2
 331                 rd      %psr, %g3
 332                 and     %g2, %g3, %g3
 333                 subcc   %g3, 0x0, %g0
 334                 bz      srmmu_nviking
 335                  nop
 336 
 337                 /* Figure out what kind of viking we are on.
 338                  * We need to know if we have to play with the
 339                  * AC bit and disable traps or not.
 340                  */
 341 
 342                 /* I've only seen MicroSparc's on SparcClassics with this
 343                  * bit set.
 344                  */
 345                 set     0x800, %g2
 346                 lda     [%g0] ASI_M_MMUREGS, %g3        ! peek in the control reg
 347                 and     %g2, %g3, %g3
 348                 subcc   %g3, 0x0, %g0
 349                 bnz     srmmu_nviking                   ! is in mbus mode
 350                  nop
 351                 
 352                 rd      %psr, %g3                       ! DONT TOUCH %g3
 353                 andn    %g3, PSR_ET, %g2
 354                 wr      %g2, 0x0, %psr
 355                 WRITE_PAUSE
 356                 
 357                 /* Get context table pointer, then convert to
 358                  * a physical address, which is 36 bits.
 359                  */
 360                 set     AC_M_CTPR, %g4
 361                 lda     [%g4] ASI_M_MMUREGS, %g4
 362                 sll     %g4, 0x4, %g4                   ! We use this below
 363                                                         ! DONT TOUCH %g4
 364 
 365                 /* Set the AC bit in the Viking's MMU control reg. */
 366                 lda     [%g0] ASI_M_MMUREGS, %g5        ! DONT TOUCH %g5
 367                 set     0x8000, %g6                     ! AC bit mask
 368                 or      %g5, %g6, %g6                   ! Or it in...
 369                 sta     %g6, [%g0] ASI_M_MMUREGS        ! Close your eyes...
 370 
 371                 /* Grrr, why does it seem like every other load/store
 372                  * on the sun4m is in some ASI space...
 373                  * Fine with me, let's get the pointer to the level 1
 374                  * page table directory and fetch it's entry.
 375                  */
 376                 lda     [%g4] ASI_M_BYPASS, %o1         ! This is a level 1 ptr
 377                 srl     %o1, 0x4, %o1                   ! Clear low 4 bits
 378                 sll     %o1, 0x8, %o1                   ! Make physical
 379                 
 380                 /* Ok, pull in the PTD. */
 381                 lda     [%o1] ASI_M_BYPASS, %o2         ! This is the 0x0 16MB pgd
 382 
 383                 /* Calculate to KERNBASE entry.
 384                  *
 385                  * XXX Should not use imperical constant, but Gas gets an  XXX
 386                  * XXX upset stomach with the bitshift I would have to use XXX
 387                  */
 388                 add     %o1, 0x3c0, %o3         
 389 
 390                 /* Poke the entry into the calculated address. */
 391                 sta     %o2, [%o3] ASI_M_BYPASS
 392 
 393                 /* I don't get it Sun, if you engineered all these
 394                  * boot loaders and the PROM (thank you for the debugging
 395                  * features btw) why did you not have them load kernel
 396                  * images up in high address space, since this is necessary
 397                  * for ABI compliance anyways?  Does this low-mapping provide
 398                  * enhanced interoperability?
 399                  *
 400                  * "The PROM is the computer."
 401                  */
 402 
 403                 /* Ok, restore the MMU control register we saved in %g5 */
 404                 sta     %g5, [%g0] ASI_M_MMUREGS        ! POW... ouch
 405 
 406                 /* Turn traps back on.  We saved it in %g3 earlier. */
 407                 wr      %g3, 0x0, %psr                  ! tick tock, tick tock
 408 
 409                 /* Now we burn precious CPU cycles due to bad engineering. */
 410                 WRITE_PAUSE
 411 
 412                 /* Wow, all that just to move a 32-bit value from one
 413                  * place to another...  Jump to high memory.
 414                  */
 415                 b       go_to_highmem
 416                  nop
 417 
 418                 /* This works on viking's in Mbus mode and all
 419                  * other MBUS modules.  It is virtually the same as
 420                  * the above madness sans turning traps off and flipping
 421                  * the AC bit.
 422                  */
 423 srmmu_nviking:
 424                 set     AC_M_CTPR, %g1
 425                 lda     [%g1] ASI_M_MMUREGS, %g1        ! get ctx table ptr
 426                 sll     %g1, 0x4, %g1                   ! make physical addr
 427                 lda     [%g1] ASI_M_BYPASS, %g1         ! ptr to level 1 pg_table
 428                 srl     %g1, 0x4, %g1
 429                 sll     %g1, 0x8, %g1                   ! make phys addr for l1 tbl
 430 
 431                 lda     [%g1] ASI_M_BYPASS, %g2         ! get level1 entry for 0x0
 432                 add     %g1, 0x3c0, %g3                 ! XXX AWAY WITH IMPERICALS
 433                 sta     %g2, [%g3] ASI_M_BYPASS         ! place at KERNBASE entry
 434                 b       go_to_highmem
 435                  nop                                    ! wheee....
 436 
 437                 /* This remaps the kernel on Sun4/4xx machines
 438                  * that have the Sun Mutant Three Level MMU.
 439                  * It's like a platypus, Sun didn't have the
 440                  * SRMMU in conception so they kludged the three
 441                  * level logic in the regular Sun4 MMU probably.
 442                  *
 443                  * Basically, you take each entry in the top level
 444                  * directory that maps the low 3MB starting at
 445                  * address zero and put the mapping in the KERNBASE
 446                  * slots.  These top level pgd's are called regmaps.
 447                  */
 448 sun4_mutant_remap:
 449                 or      %g0, %g0, %g3           ! source base
 450                 sethi   %hi(KERNBASE), %g4      ! destination base
 451                 or      %g4, %lo(KERNBASE), %g4
 452                 sethi   %hi(0x300000), %g5
 453                 or      %g5, %lo(0x300000), %g5 ! upper bound 3MB
 454                 or      %g0, 0x1, %l6
 455                 sll     %l6, 24, %l6            ! Regmap mapping size
 456                 add     %g3, 0x2, %g3           ! Base magic
 457                 add     %g4, 0x2, %g4           ! Base magic
 458 
 459                 /* Main remapping loop on Sun4-Mutant-MMU.
 460                  * "I am not an animal..." -Famous Mutant Person
 461                  */
 462 sun4_mutant_loop:
 463                 lduha   [%g3] ASI_REGMAP, %g2   ! Get lower entry
 464                 stha    %g2, [%g4] ASI_REGMAP   ! Store in high entry
 465                 add     %g4, %l6, %g4           ! Move up high memory ptr
 466                 subcc   %g3, %g5, %g0           ! Reached our limit?
 467                 blu     sun4_mutant_loop        ! Nope, loop again
 468                  add    %g3, %l6, %g3           ! delay, Move up low ptr
 469                 b       go_to_highmem           ! Jump to high memory.
 470                  nop
 471 
 472 /* The following works for normal (ie. non Sun4/400) Sun4 MMU's */
 473 sun4c_remap:
 474                 mov     0, %g3                  ! source base
 475                 set     KERNBASE, %g4           ! destination base
 476                 set     0x300000, %g5           ! upper bound 3MB
 477                 mov     1, %l6
 478                 sll     %l6, 18, %l6            ! sun4c mmu segmap size
 479 sun4c_remap_loop:
 480                 lda     [%g3] ASI_SEGMAP, %g6   ! load phys_seg
 481                 sta     %g6, [%g4] ASI_SEGMAP   ! store new virt mapping
 482                 add     %g3, %l6, %g3           ! Increment source ptr
 483                 subcc   %g3, %g5, %g0           ! Reached limit?
 484                 bl      sun4c_remap_loop        ! Nope, loop again
 485                  add    %g4, %l6, %g4           ! delay, Increment dest ptr
 486 
 487 /* Now do a non-relative jump so that PC is in high-memory */
 488 go_to_highmem:
 489                 set     execute_in_high_mem, %g1
 490                 jmpl    %g1, %g0
 491                  nop
 492 
 493 /* Acquire boot time privileged register values, this will help debugging.
 494  * I figure out and store nwindows and nwindowsm1 later on.
 495  */
 496 execute_in_high_mem:
 497                 mov     %l0, %o0                ! put back romvec
 498                 mov     %l1, %o1                ! and debug_vec
 499 
 500                 sethi   %hi( C_LABEL(prom_vector_p) ), %g1
 501                 st      %o0, [%g1 + %lo( C_LABEL(prom_vector_p) )]
 502 
 503                 sethi   %hi( C_LABEL(linux_dbvec) ), %g1
 504                 st      %o1, [%g1 + %lo( C_LABEL(linux_dbvec) )]
 505 
 506                 ld      [%o0 + 0x4], %o3
 507                 and     %o3, 0x3, %o5                   ! get the version
 508 
 509                 cmp     %o3, 0x2                        ! a v2 prom?
 510                 be      found_version
 511                  nop
 512 
 513                 /* paul@sfe.com.au */
 514                 cmp     %o3, 0x3                        ! a v3 prom?
 515                 be      found_version
 516                  nop
 517 
 518 /* Old sun4's pass our load address into %o0 instead of the prom
 519  * pointer. On sun4's you have to hard code the romvec pointer into
 520  * your code. Sun probably still does that because they don't even
 521  * trust their own "OpenBoot" specifications.
 522  */
 523 
 524                 set     LOAD_ADDR, %g6
 525                 cmp     %o0, %g6                ! an old sun4?
 526                 be      no_sun4_here
 527                  nop
 528 
 529 found_version:
 530 
 531 /* Get the machine type via the mysterious romvec node operations. */
 532 
 533                 or      %g0, %g7, %l1
 534                 add     %l1, 0x1c, %l1          
 535                 ld      [%l1], %l0
 536                 ld      [%l0], %l0
 537                 call    %l0
 538                  or     %g0, %g0, %o0           ! next_node(0) = first_node
 539                 or      %o0, %g0, %g6
 540 
 541                 sethi   %hi( C_LABEL(cputypvar) ), %o1  ! First node has cpu-arch
 542                 or      %o1, %lo( C_LABEL(cputypvar) ), %o1
 543                 sethi   %hi( C_LABEL(cputypval) ), %o2  ! information, the string
 544                 or      %o2, %lo( C_LABEL(cputypval) ), %o2
 545                 ld      [%l1], %l0              ! 'compatibility' tells
 546                 ld      [%l0 + 0xc], %l0        ! that we want 'sun4x' where
 547                 call    %l0                     ! x is one of '', 'c', 'm',
 548                  nop                            ! 'd' or 'e'. %o2 holds pointer
 549                                                 ! to a buf where above string
 550                                                 ! will get stored by the prom.
 551 
 552                 subcc   %o0, %g0, %g0
 553                 bpos    got_prop                ! Got the property
 554                  nop
 555 
 556                 or      %g6, %g0, %o0
 557                 sethi   %hi( C_LABEL(cputypvar_sun4m) ), %o1
 558                 or      %o1, %lo( C_LABEL(cputypvar_sun4m) ), %o1
 559                 sethi   %hi( C_LABEL(cputypval) ), %o2
 560                 or      %o2, %lo( C_LABEL(cputypval) ), %o2
 561                 ld      [%l1], %l0
 562                 ld      [%l0 + 0xc], %l0
 563                 call    %l0
 564                  nop
 565 
 566 got_prop:
 567                 set     C_LABEL(cputypval), %o2
 568                 ldub    [%o2 + 0x4], %l1
 569 
 570                 cmp     %l1, 'c'                ! We already know we are not
 571                 be      1f                      ! on a plain sun4 because of
 572                  nop                            ! the check for 0x4000 in %o0
 573 
 574                 cmp     %l1, 'm'                ! at start
 575                 be      1f
 576                  nop
 577 
 578                 cmp     %l1, 'd'
 579                 be      no_sun4d_here           ! God bless the person who
 580                  nop                            ! tried to run this on sun4d.
 581         
 582                 cmp     %l1, 'e'
 583                 be      no_sun4e_here           ! Could be a sun4e.
 584                  nop
 585 
 586                 b       no_sun4u_here           ! AIEEE, a V9 sun4u...
 587                  nop
 588 
 589 
 590 1:
 591                 set     C_LABEL(cputypval), %l1
 592                 ldub    [%l1 + 0x4], %l1
 593                 cmp     %l1, 'm'                ! Test for sun4d, sun4e ?
 594                 be      sun4m_init
 595                  nop
 596 
 597                 /* Jump into mmu context zero. */
 598                 set     AC_CONTEXT, %g1
 599                 stba    %g0, [%g1] ASI_CONTROL
 600 
 601                 b       sun4c_continue_boot
 602                  nop
 603 
 604 sun4m_init:
 605 
 606 /* Ok, the PROM could have done funny things and apple cider could still
 607  * be sitting in the fault status/address registers.  Read them all to
 608  * clear them so we don't get magic faults later on.
 609  */
 610 /* This sucks, aparently this makes Vikings call prom panic, will fix later */
 611 
 612                 rd      %psr, %o1
 613                 srl     %o1, 28, %o1            ! Get a type of the CPU
 614 
 615                 subcc   %o1, 4, %g0             ! TI: Viking or MicroSPARC
 616                 be      sun4c_continue_boot
 617                  nop
 618 
 619                 set     AC_M_SFSR, %o0
 620                 lda     [%o0] ASI_M_MMUREGS, %g0
 621                 set     AC_M_SFAR, %o0
 622                 lda     [%o0] ASI_M_MMUREGS, %g0
 623 
 624                 /* Fujitsu MicroSPARC-II has no asynchronous flavors of FARs */
 625                 subcc   %o1, 0, %g0
 626                 be      sun4c_continue_boot
 627                  nop
 628 
 629                 set     AC_M_AFSR, %o0
 630                 lda     [%o0] ASI_M_MMUREGS, %g0
 631                 set     AC_M_AFAR, %o0
 632                 lda     [%o0] ASI_M_MMUREGS, %g0
 633                  nop
 634 
 635 
 636 sun4c_continue_boot:
 637 
 638 
 639 /* Aieee, now set PC and nPC, enable traps, give ourselves a stack and it's
 640  * show-time!
 641  */
 642 
 643                 sethi   %hi( C_LABEL(cputyp) ), %o0
 644                 st      %g4, [%o0 + %lo( C_LABEL(cputyp) )]
 645 
 646                 /* Turn on Supervisor, EnableFloating, and all the PIL bits.
 647                  * Also puts us in register window zero with traps off.
 648                  */
 649                 set     (PSR_PS | PSR_S | PSR_PIL | PSR_EF), %g2
 650                 wr      %g2, 0x0, %psr
 651                 WRITE_PAUSE
 652 
 653                 /* I want a kernel stack NOW! */
 654                 set     C_LABEL(bootup_user_stack), %g1
 655                 add     %g1, (PAGE_SIZE - STACKFRAME_SZ - TRACEREG_SZ), %sp
 656                 mov     0, %fp                  /* And for good luck */
 657 
 658                 /* Zero out our BSS section. */
 659                 set     C_LABEL(edata) , %o0    ! First address of BSS
 660                 set     C_LABEL(end) , %o1      ! Last address of BSS
 661                 add     %o0, 0x1, %o0
 662 1:      
 663                 stb     %g0, [%o0]
 664                 subcc   %o0, %o1, %g0
 665                 bl      1b
 666                  add    %o0, 0x1, %o0
 667 
 668                 /* Initialize the umask value for init_task just in case.
 669                  * But first make current_set[0] point to something useful.
 670                  */
 671                 set     C_LABEL(init_task), %g4
 672                 set     C_LABEL(current_set), %g2
 673                 st      %g4, [%g2]
 674 
 675                 /* So now this should work. */
 676                 LOAD_CURRENT(g2)
 677                 set     C_LABEL(bootup_kernel_stack), %g4
 678                 st      %g4, [%g2 + TASK_KSTACK_PG]
 679                 st      %g0, [%g2 + THREAD_UMASK]
 680 
 681 /* Compute NWINDOWS and stash it away. Now uses %wim trick explained
 682  * in the V8 manual. Ok, this method seems to work, Sparc is cool...
 683  * No, it doesn't work, have to play the save/readCWP/restore trick.
 684  */
 685 
 686                 wr      %g0, 0x0, %wim                  ! so we dont get a trap
 687                 WRITE_PAUSE
 688 
 689                 save
 690 
 691                 rd      %psr, %g3
 692 
 693                 restore
 694 
 695                 and     %g3, 0x1f, %g3
 696                 add     %g3, 0x1, %g3
 697 
 698                 mov     2, %g1
 699                 wr      %g1, 0x0, %wim                  ! make window 1 invalid
 700                 WRITE_PAUSE
 701 
 702                 cmp     %g3, 0x7
 703                 bne     2f
 704                  nop
 705 
 706                 /* Adjust our window handling routines to
 707                  * do things correctly on 7 window Sparcs.
 708                  */
 709 
 710 #define         PATCH_INSN(src, dest) \
 711                 set     src, %g5; \
 712                 set     dest, %g6; \
 713                 ld      [%g5], %g4; \
 714                 st      %g4, [%g6];
 715         
 716                 /* Patch for window spills... */
 717                 PATCH_INSN(spnwin_patch1_7win, spnwin_patch1)
 718                 PATCH_INSN(spnwin_patch2_7win, spnwin_patch2)
 719                 PATCH_INSN(spnwin_patch3_7win, spnwin_patch3)
 720 
 721                 /* Patch for window fills... */
 722                 PATCH_INSN(fnwin_patch1_7win, fnwin_patch1)
 723                 PATCH_INSN(fnwin_patch2_7win, fnwin_patch2)
 724 
 725                 /* Patch for trap entry setup... */
 726                 PATCH_INSN(tsetup_7win_patch1, tsetup_patch1)
 727                 PATCH_INSN(tsetup_7win_patch2, tsetup_patch2)
 728                 PATCH_INSN(tsetup_7win_patch3, tsetup_patch3)
 729                 PATCH_INSN(tsetup_7win_patch4, tsetup_patch4)
 730                 PATCH_INSN(tsetup_7win_patch5, tsetup_patch5)
 731                 PATCH_INSN(tsetup_7win_patch6, tsetup_patch6)
 732 
 733                 /* Patch for returning from traps... */
 734                 PATCH_INSN(rtrap_7win_patch1, rtrap_patch1)
 735                 PATCH_INSN(rtrap_7win_patch2, rtrap_patch2)
 736                 PATCH_INSN(rtrap_7win_patch3, rtrap_patch3)
 737                 PATCH_INSN(rtrap_7win_patch4, rtrap_patch4)
 738                 PATCH_INSN(rtrap_7win_patch5, rtrap_patch5)
 739 
 740 2:              
 741                 sethi   %hi( C_LABEL(nwindows) ), %g4
 742                 st      %g3, [%g4 + %lo( C_LABEL(nwindows) )]   ! store final value
 743                 sub     %g3, 0x1, %g3
 744                 sethi   %hi( C_LABEL(nwindowsm1) ), %g4
 745                 st      %g3, [%g4 + %lo( C_LABEL(nwindowsm1) )]
 746 
 747                 /* Here we go, start using Linux's trap table... */
 748                 set     C_LABEL(trapbase), %g3
 749                 wr      %g3, 0x0, %tbr
 750                 WRITE_PAUSE
 751 
 752                 /* Finally, turn on traps so that we can call c-code. */
 753                 rd      %psr, %g3
 754                 wr      %g3, 0x0, %psr
 755                 wr      %g3, PSR_ET, %psr
 756                 WRITE_PAUSE
 757 
 758                 /* First we call prom_init() to set up PROMLIB, then
 759                  * off to start_kernel().
 760                  */
 761 
 762                 sethi   %hi( C_LABEL(prom_vector_p) ), %g5
 763                 ld      [%g5 + %lo( C_LABEL(prom_vector_p) )], %o0
 764                 call    C_LABEL(prom_init)
 765                  nop
 766 
 767                 call    C_LABEL(start_kernel)
 768                  nop
 769         
 770                 /* We should not get here. */
 771                 call    halt_me
 772                  nop
 773 
 774 /* There, happy now Adrian? */
 775 
 776                 /* XXX Fix this... XXX */
 777 no_sun4_here:
 778                 sethi   %hi(SUN4_PROM_VECTOR+SUN4_PRINTF), %o1
 779                 ld      [%o1 + %lo(SUN4_PROM_VECTOR+SUN4_PRINTF)], %o1
 780                 set     sun4_notsup, %o0
 781                 call    %o1
 782                  nop
 783 1:
 784                 ba      1b                      ! Cannot exit into KMON
 785                  nop
 786 
 787 no_sun4d_here:
 788                 ld      [%g7 + 0x68], %o1
 789                 set     sun4d_notsup, %o0
 790                 call    %o1
 791                  nop
 792                 b       halt_me
 793                  nop
 794 
 795 no_sun4e_here:
 796                 ld      [%g7 + 0x68], %o1
 797                 set     sun4e_notsup, %o0
 798                 call    %o1
 799                  nop
 800                 b       halt_me
 801                  nop
 802 
 803 no_sun4u_here:
 804                 ld      [%g7 + 0x68], %o1
 805                 set     sun4u_notsup, %o0
 806                 call    %o1
 807                  nop
 808                 b       halt_me
 809                  nop
 810 
 811 halt_me:
 812                 ld      [%g7 + 0x74], %o0
 813                 call    %o0                     ! Get us out of here...
 814                  nop                            ! Apparently Solaris is better.
 815 
 816         .data
 817         .align 4
 818 
 819 /*
 820  * Fill up the prom vector, note in particular the kind first element,
 821  * no joke. I don't need all of them in here as the entire prom vector
 822  * gets initialized in c-code so all routines can use it.
 823  */
 824 
 825         .globl  C_LABEL(prom_vector_p)
 826 C_LABEL(prom_vector_p):
 827                 .word 0
 828 
 829 /* We calculate the following at boot time, window fills/spills and trap entry
 830  * code uses these to keep track of the register windows.
 831  */
 832 
 833         .align 4
 834         .globl  C_LABEL(nwindows)
 835         .globl  C_LABEL(nwindowsm1)
 836 C_LABEL(nwindows):
 837         .word   8
 838 C_LABEL(nwindowsm1):
 839         .word   7
 840 
 841 /* Boot time debugger vector value.  We need this later on. */
 842 
 843         .align 4
 844         .globl  C_LABEL(linux_dbvec)
 845 C_LABEL(linux_dbvec):
 846         .word   0
 847         .word   0
 848 
 849         .align 4
/* */
root/arch/sparc/kernel/head.S
