taglinefilesource code
sp_banks453arch/sparc/kernel/probe.cextern struct sparc_phys_banks sp_banks[SPARC_PHYS_BANKS];
sp_banks221arch/sparc/kernel/setup.cfor(i=0; sp_banks[i].num_bytes != 0; i++) {
sp_banks224arch/sparc/kernel/setup.c(unsigned int) sp_banks[i].base_addr, 
sp_banks225arch/sparc/kernel/setup.c(int) sp_banks[i].num_bytes);
sp_banks227arch/sparc/kernel/setup.cend_of_phys_memory = sp_banks[i].base_addr + sp_banks[i].num_bytes;
sp_banks28arch/sparc/mm/fault.cextern struct sparc_phys_banks sp_banks[SPARC_PHYS_BANKS];
sp_banks71arch/sparc/mm/fault.csp_banks[0].base_addr = base_paddr;
sp_banks72arch/sparc/mm/fault.csp_banks[0].num_bytes = bytes;
sp_banks87arch/sparc/mm/fault.csp_banks[i].base_addr = (unsigned long) mlist->start_adr;
sp_banks88arch/sparc/mm/fault.csp_banks[i].num_bytes = mlist->num_bytes;
sp_banks92arch/sparc/mm/fault.csp_banks[i].base_addr = 0xdeadbeef;
sp_banks93arch/sparc/mm/fault.csp_banks[i].num_bytes = 0;
sp_banks28arch/sparc/mm/init.cstruct sparc_phys_banks sp_banks[SPARC_PHYS_BANKS];
sp_banks163arch/sparc/mm/init.cfor(tmp2=0; sp_banks[tmp2].num_bytes != 0; tmp2++) {
sp_banks165arch/sparc/mm/init.cunsigned long base = sp_banks[tmp2].base_addr;
sp_banks166arch/sparc/mm/init.cunsigned long limit = base + sp_banks[tmp2].num_bytes;
sp_banks42include/asm-sparc/page.hextern struct sparc_phys_banks sp_banks[SPARC_PHYS_BANKS];