include/asm-sparc/vac-ops.h

/* */
This source file includes following definitions.
sun4c_enable_vac
sun4c_disable_vac
sun4c_flush_context
sun4c_flush_segment
sun4c_flush_page
   1 /* $Id: vac-ops.h,v 1.7 1995/11/25 02:33:18 davem Exp $ */
   2 #ifndef _SPARC_VAC_OPS_H
   3 #define _SPARC_VAC_OPS_H
   4 
   5 /* vac-ops.h: Inline assembly routines to do operations on the Sparc
   6  *            VAC (virtual address cache) for the sun4c.
   7  *
   8  * Copyright (C) 1994, David S. Miller (davem@caip.rutgers.edu)
   9  */
  10 
  11 #include <asm/sysen.h>
  12 #include <asm/contregs.h>
  13 #include <asm/asi.h>
  14 
  15 /* The SUN4C models have a virtually addressed write-through
  16  * cache.
  17  *
  18  * The cache tags are directly accessible through an ASI and
  19  * each have the form:
  20  *
  21  * ------------------------------------------------------------
  22  * | MBZ | CONTEXT | WRITE | PRIV | VALID | MBZ | TagID | MBZ |
  23  * ------------------------------------------------------------
  24  *  31 25  24   22     21     20     19    18 16  15   2  1  0
  25  *
  26  * MBZ: These bits are either unused and/or reserved and should
  27  *      be written as zeroes.
  28  *
  29  * CONTEXT: Records the context to which this cache line belongs.
  30  *
  31  * WRITE: A copy of the writable bit from the mmu pte access bits.
  32  *
  33  * PRIV: A copy of the privileged bit from the pte access bits.
  34  *
  35  * VALID: If set, this line is valid, else invalid.
  36  *
  37  * TagID: Fourteen bits of tag ID.
  38  *
  39  * Every virtual address is seen by the cache like this:
  40  *
  41  * ----------------------------------------
  42  * |  RESV  | TagID | LINE | BYTE-in-LINE |
  43  * ----------------------------------------
  44  *  31    30 29   16 15   4 3            0
  45  *
  46  * RESV: Unused/reserved.
  47  *
  48  * TagID: Used to match the Tag-ID in that vac tags.
  49  *
  50  * LINE: Which line within the cache
  51  *
  52  * BYTE-in-LINE: Which byte within the cache line.
  53  */
  54 
  55 /* Sun4c VAC Tags */
  56 #define S4CVACTAG_CID      0x01c00000
  57 #define S4CVACTAG_W        0x00200000
  58 #define S4CVACTAG_P        0x00100000
  59 #define S4CVACTAG_V        0x00080000
  60 #define S4CVACTAG_TID      0x0000fffc
  61 
  62 /* Sun4c VAC Virtual Address */
  63 #define S4CVACVA_TID       0x3fff0000
  64 #define S4CVACVA_LINE      0x0000fff0
  65 #define S4CVACVA_BIL       0x0000000f
  66 
  67 /* The indexing of cache lines creates a problem.  Because the line
  68  * field of a virtual address extends past the page offset within
  69  * the virtual address it is possible to have what are called
  70  * 'bad aliases' which will create inconsistancies.  So we must make
  71  * sure that within a context that if a physical page is mapped
  72  * more than once, that 'extra' line bits are the same.  If this is
  73  * not the case, and thus is a 'bad alias' we must turn off the
  74  * cacheable bit in the pte's of all such pages.
  75  */
  76 #define S4CVAC_BADBITS     0x0000f000
  77 
  78 /* The following is true if vaddr1 and vaddr2 would cause
  79  * a 'bad alias'.
  80  */
  81 #define S4CVAC_BADALIAS(vaddr1, vaddr2) \
  82         (((unsigned long) (vaddr1)) ^ ((unsigned long) (vaddr2)) & \
  83          (S4CVAC_BADBITS))
  84 
  85 /* The following structure describes the characteristics of a sun4c
  86  * VAC as probed from the prom during boot time.
  87  */
  88 struct sun4c_vac_props {
  89         unsigned int num_bytes;     /* Size of the cache */
  90         unsigned int num_lines;     /* Number of cache lines */
  91         unsigned int do_hwflushes;  /* Hardware flushing available? */
  92         unsigned int linesize;      /* Size of each line in bytes */
  93         unsigned int log2lsize;     /* log2(linesize) */
  94         unsigned int on;            /* VAC is enabled */
  95 };
  96 
  97 extern struct sun4c_vac_props sun4c_vacinfo;
  98 
  99 extern void sun4c_flush_all(void);
 100 
 101 /* sun4c_enable_vac() enables the sun4c virtual address cache. */
 102 extern __inline__ void sun4c_enable_vac(void)
     /*  */
 103 {
 104   __asm__ __volatile__("lduba [%0] %1, %%g1\n\t"
 105                        "or    %%g1, %2, %%g1\n\t"
 106                        "stba  %%g1, [%0] %1\n\t" : :
 107                        "r" ((unsigned int) AC_SENABLE),
 108                        "i" (ASI_CONTROL), "i" (SENABLE_CACHE) :
 109                        "g1");
 110   sun4c_vacinfo.on = 1;
 111 }
 112 
 113 /* sun4c_disable_vac() disables the virtual address cache. */
 114 extern __inline__ void sun4c_disable_vac(void)
     /*  */
 115 {
 116   __asm__ __volatile__("lduba [%0] %1, %%g1\n\t"
 117                        "andn  %%g1, %2, %%g1\n\t"
 118                        "stba  %%g1, [%0] %1\n\t" : :
 119                        "r" ((unsigned int) AC_SENABLE),
 120                        "i" (ASI_CONTROL), "i" (SENABLE_CACHE) :
 121                        "g1");
 122   sun4c_vacinfo.on = 0;
 123 }
 124 
 125 extern unsigned long sun4c_ctxflush;
 126 extern unsigned long sun4c_segflush;
 127 extern unsigned long sun4c_pgflush;
 128 
 129 extern void sun4c_ctxflush_hw64KB16B(void);
 130 extern void sun4c_ctxflush_hw64KB32B(void);
 131 extern void sun4c_ctxflush_sw64KB16B(void);
 132 extern void sun4c_ctxflush_sw64KB32B(void);
 133 
 134 extern void sun4c_segflush_hw64KB16B(void);
 135 extern void sun4c_segflush_hw64KB32B(void);
 136 extern void sun4c_segflush_sw64KB16B(void);
 137 extern void sun4c_segflush_sw64KB32B(void);
 138 
 139 extern void sun4c_pgflush_hw64KB16B(void);
 140 extern void sun4c_pgflush_hw64KB32B(void);
 141 extern void sun4c_pgflush_sw64KB16B(void);
 142 extern void sun4c_pgflush_sw64KB32B(void);
 143 
 144 /* These do indirect calls to the in-line assembly routines
 145  * in s4ctlb.S, see that file for more answers.
 146  */
 147 extern inline void sun4c_flush_context(void)
     /*  */
 148 {
 149         __asm__ __volatile__("jmpl %0, %%l4\n\t"
 150                              "nop\n\t" : :
 151                              "r" (sun4c_ctxflush) :
 152                              "l4", "l6", "l7", "memory");
 153 }
 154 
 155 extern inline void sun4c_flush_segment(unsigned long segment)
     /*  */
 156 {
 157         __asm__ __volatile__("jmpl %0, %%l4\n\t"
 158                              "or %1, %%g0, %%l2\n\t" : :
 159                              "r" (sun4c_segflush), "r" (segment) :
 160                              "l2", "l4", "l6", "l7", "memory");
 161 }
 162 
 163 extern inline void sun4c_flush_page(unsigned long page)
     /*  */
 164 {
 165         __asm__ __volatile__("jmpl %0, %%l4\n\t"
 166                              "or %1, %%g0, %%l2\n\t" : :
 167                              "r" (sun4c_pgflush), "r" (page) :
 168                              "l2", "l4", "l6", "l7", "memory");
 169 }
 170 
 171 #endif /* !(_SPARC_VAC_OPS_H) */
/* */
root/include/asm-sparc/vac-ops.h

INCLUDED FROM

DEFINITIONS
