taglinefilesource code
outl238arch/alpha/lib/io.coutl(*(unsigned int *) src, port);
outl72arch/ppc/kernel/port_io.cunsigned long  outl_p(unsigned long val,int port) { return (outl(val,port)); }
outl213drivers/block/cmd640.coutl(k, 0xcf8);
outl305drivers/block/triton.coutl(virt_to_bus (HWIF(drive)->dmatable), dma_base + 4); /* PRD table */
outl361drivers/block/triton.coutl(virt_to_bus(hwif->dmatable), base + 4);
outl524drivers/net/3c59x.coutl(config.i, ioaddr + Wn3_Config);
outl679drivers/net/3c59x.coutl(skb->len, ioaddr + TX_FIFO);
outl683drivers/net/3c59x.coutl((int)(skb->data), ioaddr + Wn7_MasterAddr);
outl264drivers/net/de4x5.coutl(imr, DE4X5_IMR);                   /* Enable the IRQs */\
outl270drivers/net/de4x5.coutl(imr, DE4X5_IMR);                   /* Disable the IRQs */\
outl275drivers/net/de4x5.coutl(imr, DE4X5_IMR);                   /* Unmask the IRQs */\
outl281drivers/net/de4x5.coutl(imr, DE4X5_IMR);                   /* Mask the IRQs */\
outl290drivers/net/de4x5.coutl(omr, DE4X5_OMR);                   /* Enable the TX and/or RX */\
outl296drivers/net/de4x5.coutl(omr, DE4X5_OMR);                   /* Disable the TX and/or RX */ \
outl302drivers/net/de4x5.c#define RESET_SIA outl(0, DE4X5_SICR);      /* Reset SIA connectivity regs */
outl482drivers/net/de4x5.coutl(i | BMR_SWR, DE4X5_BMR);\
outl484drivers/net/de4x5.coutl(i, DE4X5_BMR);\
outl531drivers/net/de4x5.coutl(0, PCI_CFDA);
outl647drivers/net/de4x5.coutl(virt_to_bus(lp->rx_ring), DE4X5_RRBA);
outl648drivers/net/de4x5.coutl(virt_to_bus(lp->tx_ring), DE4X5_TRBA);
outl663drivers/net/de4x5.coutl(IMR_AIM|IMR_RUM, DE4X5_IMR); /* Unmask RUM interrupt */
outl664drivers/net/de4x5.coutl(OMR_SR | omr, DE4X5_OMR);    /* Start RX w/no descriptors */
outl684drivers/net/de4x5.coutl(0, DE4X5_IMR);               /* Re-mask RUM interrupt */
outl729drivers/net/de4x5.coutl(0, DE4X5_SICR);
outl730drivers/net/de4x5.coutl(CFDA_PSM, PCI_CFDA);
outl760drivers/net/de4x5.coutl(0, PCI_CFDA);
outl832drivers/net/de4x5.coutl(sts, DE4X5_STS);
outl876drivers/net/de4x5.coutl(bmr, DE4X5_BMR);
outl885drivers/net/de4x5.coutl(virt_to_bus(lp->rx_ring), DE4X5_RRBA);
outl886drivers/net/de4x5.coutl(virt_to_bus(lp->tx_ring), DE4X5_TRBA);
outl909drivers/net/de4x5.coutl(omr|OMR_ST, DE4X5_OMR);
outl915drivers/net/de4x5.coutl(omr, DE4X5_OMR);                        /* Stop everything! */
outl1015drivers/net/de4x5.coutl(sts, DE4X5_STS);
outl1037drivers/net/de4x5.coutl(POLL_DEMAND, DE4X5_TPD);        /* Start the TX */
outl1088drivers/net/de4x5.coutl(sts, DE4X5_STS);            /* Reset the board interrupts */
outl1245drivers/net/de4x5.coutl(POLL_DEMAND, DE4X5_TPD);            /* Restart a stalled TX */
outl1342drivers/net/de4x5.coutl(0, DE4X5_SICR);
outl1343drivers/net/de4x5.coutl(CFDA_PSM, PCI_CFDA);
outl1396drivers/net/de4x5.coutl(omr, DE4X5_OMR);
outl1408drivers/net/de4x5.coutl(POLL_DEMAND, DE4X5_TPD);                /* Start the TX */
outl1473drivers/net/de4x5.coutl(omr, DE4X5_OMR);
outl1516drivers/net/de4x5.coutl(PCI_COMMAND_IO | PCI_COMMAND_MASTER, PCI_CFCS);
outl1517drivers/net/de4x5.coutl(0x00004000, PCI_CFLT);
outl1518drivers/net/de4x5.coutl(iobase, PCI_CBIO);
outl1871drivers/net/de4x5.coutl(omr | OMR_FD, DE4X5_OMR);
outl1895drivers/net/de4x5.coutl(omr & ~OMR_FD, DE4X5_OMR);
outl1911drivers/net/de4x5.coutl(omr & ~OMR_FD, DE4X5_OMR);
outl1923drivers/net/de4x5.coutl(omr & ~OMR_FD, DE4X5_OMR);
outl1936drivers/net/de4x5.coutl(omr | OMR_FD, DE4X5_OMR);
outl1957drivers/net/de4x5.coutl(omr | OMR_PS | OMR_HBD | OMR_PCS | OMR_SCR, DE4X5_OMR);
outl1958drivers/net/de4x5.coutl(GEP_FDXD | GEP_MODE, DE4X5_GEP);
outl1964drivers/net/de4x5.coutl(omr | OMR_TTM, DE4X5_OMR);
outl1965drivers/net/de4x5.coutl(GEP_FDXD, DE4X5_GEP);
outl1986drivers/net/de4x5.coutl(sts, DE4X5_STS);
outl1990drivers/net/de4x5.coutl(csr12, DE4X5_SISR);
outl2039drivers/net/de4x5.coutl(omr|OMR_ST, DE4X5_OMR);
outl2050drivers/net/de4x5.coutl(omr, DE4X5_OMR); 
outl2065drivers/net/de4x5.coutl(irq_mask, DE4X5_IMR);
outl2072drivers/net/de4x5.coutl(sts, DE4X5_STS);
outl2092drivers/net/de4x5.coutl(sigr, DE4X5_SIGR);
outl2093drivers/net/de4x5.coutl(strr, DE4X5_STRR);
outl2094drivers/net/de4x5.coutl(sicr, DE4X5_SICR);
outl2117drivers/net/de4x5.coutl((s32)(msec * 10000)/i, DE4X5_GPT);
outl2405drivers/net/de4x5.coutl(command, addr);
outl2458drivers/net/de4x5.coutl(lp->irq_mask, DE4X5_IMR);
outl2470drivers/net/de4x5.coutl(lp->irq_mask, DE4X5_IMR);
outl2542drivers/net/de4x5.coutl(POLL_DEMAND, DE4X5_TPD);                /* Start the TX */
outl2550drivers/net/de4x5.coutl(omr, DE4X5_OMR);
outl2605drivers/net/de4x5.coutl(omr, DE4X5_OMR);
outl2643drivers/net/de4x5.coutl(tmp.addr[0], DE4X5_OMR);
outl351drivers/net/hp100.houtl( data, ioaddr + HP100_REG_##reg )
outl223drivers/net/tulip.coutl(inl(ioaddr + CSR6) & ~0x2002, ioaddr + CSR6);
outl231drivers/net/tulip.coutl(0, ioaddr + CSR9);    /* Reset the pointer with a dummy write. */
outl271drivers/net/tulip.coutl(0xfff80001, ioaddr + CSR0);
outl281drivers/net/tulip.coutl(0xfff84800, ioaddr + CSR0);
outl319drivers/net/tulip.coutl((int)tp->rx_ring, ioaddr + CSR3);
outl320drivers/net/tulip.coutl((int)tp->tx_ring, ioaddr + CSR4);
outl323drivers/net/tulip.coutl(0x00000000, ioaddr + CSR13);
outl324drivers/net/tulip.coutl(0x00000004, ioaddr + CSR13);
outl327drivers/net/tulip.coutl(0xfffe2002, ioaddr + CSR6);
outl330drivers/net/tulip.coutl(0, ioaddr + CSR1);
outl337drivers/net/tulip.coutl(0xFFFFFFFF, ioaddr + CSR7);
outl438drivers/net/tulip.coutl(0, ioaddr + CSR1);
outl468drivers/net/tulip.coutl(csr5 & 0x0001ffff, ioaddr + CSR5);
outl550drivers/net/tulip.coutl(0x0001ffff, ioaddr + CSR5);
outl648drivers/net/tulip.coutl(0x00000000, ioaddr + CSR7);
outl650drivers/net/tulip.coutl(inl(ioaddr + CSR6) & ~0x2002, ioaddr + CSR6);
outl683drivers/net/tulip.coutl(csr6 | 0x00C0, ioaddr + CSR6);
outl690drivers/net/tulip.coutl(csr6 | 0x0080, ioaddr + CSR6);
outl703drivers/net/tulip.coutl(csr6 | 0x0000, ioaddr + CSR6);
outl1535drivers/scsi/53c7,8xx.houtl((value), NCR53c7x0_address_io + (address)))
outl476drivers/scsi/AM53C974.coutl(config_cmd, 0xCF8);         /* ioreg 0 */
outl480drivers/scsi/AM53C974.coutl(config_cmd | PCI_COMMAND, 0xCF8); pci_config._status_command  = inl(0xCFC);
outl481drivers/scsi/AM53C974.coutl(config_cmd | PCI_CLASS_REVISION, 0xCF8); pci_config._class_revision = inl(0xCFC);
outl482drivers/scsi/AM53C974.coutl(config_cmd | PCI_CACHE_LINE_SIZE, 0xCF8); pci_config._bist_header_latency_cache = inl(0xCFC);
outl483drivers/scsi/AM53C974.coutl(config_cmd | PCI_BASE_ADDRESS_0, 0xCF8); pci_config._base0 = inl(0xCFC);
outl484drivers/scsi/AM53C974.coutl(config_cmd | PCI_BASE_ADDRESS_1, 0xCF8); pci_config._base1 = inl(0xCFC);
outl485drivers/scsi/AM53C974.coutl(config_cmd | PCI_BASE_ADDRESS_2, 0xCF8); pci_config._base2 = inl(0xCFC);
outl486drivers/scsi/AM53C974.coutl(config_cmd | PCI_BASE_ADDRESS_3, 0xCF8); pci_config._base3 = inl(0xCFC);
outl487drivers/scsi/AM53C974.coutl(config_cmd | PCI_BASE_ADDRESS_4, 0xCF8); pci_config._base4 = inl(0xCFC);
outl488drivers/scsi/AM53C974.coutl(config_cmd | PCI_BASE_ADDRESS_5, 0xCF8); pci_config._base5 = inl(0xCFC);
outl489drivers/scsi/AM53C974.coutl(config_cmd | PCI_ROM_ADDRESS, 0xCF8); pci_config._baserom = inl(0xCFC);
outl490drivers/scsi/AM53C974.coutl(config_cmd | PCI_INTERRUPT_LINE, 0xCF8); pci_config._max_min_ipin_iline = inl(0xCFC);
outl501drivers/scsi/AM53C974.coutl(config_cmd | PCI_COMMAND, 0xCF8); outw(pci_config._command, 0xCFC); }
outl302drivers/scsi/AM53C974.h#define AM53C974_write_32(addr,x)       outl((x), io_port + (addr))
outl330drivers/scsi/AM53C974.h#define AM53C974_PCIREG_WRITE_DWORD(instance,x,a) ( outl((x), (a) + (instance)->io_port) )
outl4262drivers/scsi/advansys.coutl(address, 0xCF8);
outl4339drivers/scsi/advansys.coutl(address, 0xCF8);
outl395drivers/scsi/aha1740.coutl(virt_to_bus(ecb+ecbno), MBOXOUT0);
outl326drivers/scsi/u14-34f.coutl((unsigned int)cpp, sh[j]->io_port + REG_OGM);
outl649drivers/scsi/u14-34f.coutl((unsigned int)cpp, sh[j]->io_port + REG_OGM);
outl794drivers/scsi/ultrastor.coutl((unsigned int)my_mscp, config.ogm_address);
outl908drivers/scsi/ultrastor.coutl((int)&config.mscp[mscp_index], config.ogm_address);
outl120include/asm-alpha/io.h#ifndef outl
outl140include/asm-alpha/io.h# define outl_p    outl
outl154include/asm-alpha/io.h# define outl_p    outl
outl71include/asm-ppc/io.hunsigned long outl(unsigned long val,int port);
outl82include/asm-ppc/io.hstatic inline unsigned long  outl_p(unsigned long val,int port) { return (outl(val,port)); }