This source file includes following definitions.
- pci_lookup_dev
- pci_strclass
- pci_strvendor
- pci_strdev
- burst_bridge
- sprint_dev_config
- get_pci_list
- pci_malloc
- scan_bus
- pci_init
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8
9 #include <linux/config.h>
10 #include <linux/ptrace.h>
11 #include <linux/types.h>
12 #include <linux/kernel.h>
13 #include <linux/bios32.h>
14 #include <linux/pci.h>
15 #include <linux/string.h>
16
17 #include <asm/page.h>
18
19 struct pci_bus pci_root;
20 struct pci_dev *pci_devices = 0;
21
22
23
24
25
26
27
28
29
30
31
32 #define DEVICE(vid,did,name) \
33 {PCI_VENDOR_ID_##vid, PCI_DEVICE_ID_##did, (name), 0xff}
34
35 #define BRIDGE(vid,did,name,bridge) \
36 {PCI_VENDOR_ID_##vid, PCI_DEVICE_ID_##did, (name), (bridge)}
37
38
39
40
41
42
43 struct pci_dev_info dev_info[] = {
44 DEVICE( COMPAQ, COMPAQ_1280, "QVision 1280/p"),
45 DEVICE( COMPAQ, COMPAQ_THUNDER, "ThunderLAN"),
46 DEVICE( NCR, NCR_53C810, "53c810"),
47 DEVICE( NCR, NCR_53C820, "53c820"),
48 DEVICE( NCR, NCR_53C825, "53c825"),
49 DEVICE( NCR, NCR_53C815, "53c815"),
50 DEVICE( ATI, ATI_68800, "68800AX"),
51 DEVICE( ATI, ATI_215CT222, "215CT222"),
52 DEVICE( ATI, ATI_210888CX, "210888CX"),
53 DEVICE( ATI, ATI_210888GX, "210888GX"),
54 DEVICE( VLSI, VLSI_82C592, "82C592-FC1"),
55 DEVICE( VLSI, VLSI_82C593, "82C593-FC1"),
56 DEVICE( VLSI, VLSI_82C594, "82C594-AFC2"),
57 DEVICE( VLSI, VLSI_82C597, "82C597-AFC2"),
58 DEVICE( ADL, ADL_2301, "2301"),
59 DEVICE( NS, NS_87410, "87410"),
60 DEVICE( TSENG, TSENG_W32P_2, "ET4000W32P"),
61 DEVICE( TSENG, TSENG_W32P_b, "ET4000W32P rev B"),
62 DEVICE( TSENG, TSENG_W32P_c, "ET4000W32P rev C"),
63 DEVICE( TSENG, TSENG_W32P_d, "ET4000W32P rev D"),
64 DEVICE( WEITEK, WEITEK_P9000, "P9000"),
65 DEVICE( WEITEK, WEITEK_P9100, "P9100"),
66 BRIDGE( DEC, DEC_BRD, "DC21050", 0x00),
67 DEVICE( DEC, DEC_TULIP, "DC21040"),
68 DEVICE( DEC, DEC_TGA, "DC21030"),
69 DEVICE( DEC, DEC_TULIP_FAST, "DC21140"),
70 DEVICE( DEC, DEC_FDDI, "DEFPA"),
71 DEVICE( DEC, DEC_TULIP_PLUS, "DC21041"),
72 DEVICE( CIRRUS, CIRRUS_5430, "GD 5430"),
73 DEVICE( CIRRUS, CIRRUS_5434_4, "GD 5434"),
74 DEVICE( CIRRUS, CIRRUS_5434_8, "GD 5434"),
75 DEVICE( CIRRUS, CIRRUS_5436, "GD 5436"),
76 DEVICE( CIRRUS, CIRRUS_6205, "GD 6205"),
77 DEVICE( CIRRUS, CIRRUS_6729, "CL 6729"),
78 DEVICE( CIRRUS, CIRRUS_7542, "CL 7542"),
79 DEVICE( CIRRUS, CIRRUS_7543, "CL 7543"),
80 DEVICE( IBM, IBM_82G2675, "82G2675"),
81 DEVICE( WD, WD_7197, "WD 7197"),
82 DEVICE( AMD, AMD_LANCE, "79C970"),
83 DEVICE( AMD, AMD_SCSI, "53C974"),
84 DEVICE( TRIDENT, TRIDENT_9420, "TG 9420"),
85 DEVICE( TRIDENT, TRIDENT_9440, "TG 9440"),
86 DEVICE( TRIDENT, TRIDENT_9660, "TG 9660"),
87 DEVICE( AI, AI_M1435, "M1435"),
88 DEVICE( MATROX, MATROX_MGA_2, "Atlas PX2085"),
89 DEVICE( MATROX, MATROX_MIL ,"Millenium"),
90 DEVICE( MATROX, MATROX_MGA_IMP, "MGA Impression"),
91 DEVICE( CT, CT_65545, "65545"),
92 DEVICE( FD, FD_36C70, "TMC-18C30"),
93 DEVICE( SI, SI_6201, "6201"),
94 DEVICE( SI, SI_6202, "6202"),
95 DEVICE( SI, SI_503, "85C503"),
96 DEVICE( SI, SI_501, "85C501"),
97 DEVICE( SI, SI_496, "85C496"),
98 DEVICE( SI, SI_601, "85C601"),
99 DEVICE( SI, SI_5511, "85C5511"),
100 DEVICE( SI, SI_5513, "85C5513"),
101 DEVICE( HP, HP_J2585A, "J2585A"),
102 DEVICE( PCTECH, PCTECH_RZ1000, "RZ1000 (buggy)"),
103 DEVICE( DPT, DPT, "SmartCache/Raid"),
104 DEVICE( OPTI, OPTI_92C178, "92C178"),
105 DEVICE( OPTI, OPTI_82C557, "82C557"),
106 DEVICE( OPTI, OPTI_82C558, "82C558"),
107 DEVICE( OPTI, OPTI_82C621, "82C621"),
108 DEVICE( OPTI, OPTI_82C822, "82C822"),
109 DEVICE( BUSLOGIC, BUSLOGIC_946C_2,"BT-946C"),
110 DEVICE( BUSLOGIC, BUSLOGIC_946C, "BT-946C"),
111 DEVICE( BUSLOGIC, BUSLOGIC_930, "BT-930"),
112 DEVICE( OAK, OAK_OTI107, "OTI107"),
113 DEVICE( PROMISE, PROMISE_5300, "DC5030"),
114 DEVICE( N9, N9_I128, "Imagine 128"),
115 DEVICE( N9, N9_I128_2, "Imagine 128v2"),
116 DEVICE( UMC, UMC_UM8673F, "UM8673F"),
117 BRIDGE( UMC, UMC_UM8891A, "UM8891A", 0x01),
118 DEVICE( UMC, UMC_UM8886BF, "UM8886BF"),
119 DEVICE( UMC, UMC_UM8886A, "UM8886A"),
120 BRIDGE( UMC, UMC_UM8881F, "UM8881F", 0x02),
121 DEVICE( UMC, UMC_UM8886F, "UM8886F"),
122 DEVICE( UMC, UMC_UM9017F, "UM9017F"),
123 DEVICE( UMC, UMC_UM8886N, "UM8886N"),
124 DEVICE( UMC, UMC_UM8891N, "UM8891N"),
125 DEVICE( X, X_AGX016, "ITT AGX016"),
126 DEVICE( NEXGEN, NEXGEN_82C501, "82C501"),
127 DEVICE( QLOGIC, QLOGIC_ISP1020, "ISP1020"),
128 DEVICE( QLOGIC, QLOGIC_ISP1022, "ISP1022"),
129 DEVICE( LEADTEK, LEADTEK_805, "S3 805"),
130 DEVICE( CONTAQ, CONTAQ_82C599, "82C599"),
131 DEVICE( CMD, CMD_640, "640 (buggy)"),
132 DEVICE( CMD, CMD_646, "646"),
133 DEVICE( VISION, VISION_QD8500, "QD-8500"),
134 DEVICE( VISION, VISION_QD8580, "QD-8580"),
135 DEVICE( SIERRA, SIERRA_STB, "STB Horizon 64"),
136 DEVICE( ACC, ACC_2056, "2056"),
137 DEVICE( WINBOND, WINBOND_83769, "W83769F"),
138 DEVICE( WINBOND, WINBOND_82C105, "SL82C105"),
139 DEVICE( 3COM, 3COM_3C590, "3C590 10bT"),
140 DEVICE( 3COM, 3COM_3C595TX, "3C595 100bTX"),
141 DEVICE( 3COM, 3COM_3C595T4, "3C595 100bT4"),
142 DEVICE( 3COM, 3COM_3C595MII, "3C595 100b-MII"),
143 DEVICE( AL, AL_M1445, "M1445"),
144 DEVICE( AL, AL_M1449, "M1449"),
145 DEVICE( AL, AL_M1451, "M1451"),
146 DEVICE( AL, AL_M1461, "M1461"),
147 DEVICE( AL, AL_M1489, "M1489"),
148 DEVICE( AL, AL_M1511, "M1511"),
149 DEVICE( AL, AL_M1513, "M1513"),
150 DEVICE( AL, AL_M4803, "M4803"),
151 DEVICE( ASP, ASP_ABP940, "ABP940"),
152 DEVICE( IMS, IMS_8849, "8849"),
153 DEVICE( TEKRAM2, TEKRAM2_690c, "DC690c"),
154 DEVICE( INTERG, INTERG_1680, "IGA-1680"),
155 DEVICE( REALTEK, REALTEK_8029, "8029"),
156 DEVICE( INIT, INIT_320P, "320 P"),
157 DEVICE( VIA, VIA_82C505, "VT 82C505"),
158 DEVICE( VIA, VIA_82C561, "VT 82C561"),
159 DEVICE( VIA, VIA_82C576, "VT 82C576 3V"),
160 DEVICE( VIA, VIA_82C416, "VT 82C416MV"),
161 DEVICE( VORTEX, VORTEX_GDT, "GDT 6000b"),
162 DEVICE( EF, EF_ATM_FPGA, "155P-MF1 (FPGA)"),
163 DEVICE( EF, EF_ATM_ASIC, "155P-MF1 (ASIC)"),
164 DEVICE( IMAGINGTECH, IMAGINGTECH_ICPCI, "MVC IC-PCI"),
165 DEVICE( FORE, FORE_PCA200PC, "PCA-200PC"),
166 DEVICE( PLX, PLX_9060, "PCI9060 i960 bridge"),
167 DEVICE( ALLIANCE, ALLIANCE_PROMOTIO, "Promotion-6410"),
168 DEVICE( ALLIANCE, ALLIANCE_PROVIDEO, "Provideo"),
169 DEVICE( MUTECH, MUTECH_MV1000, "MV-1000"),
170 DEVICE( ZEITNET, ZEITNET_1221, "1221"),
171 DEVICE( ZEITNET, ZEITNET_1225, "1225"),
172 DEVICE( SPECIALIX, SPECIALIX_XIO, "XIO/SIO host"),
173 DEVICE( SPECIALIX, SPECIALIX_RIO, "RIO host"),
174 DEVICE( CYCLADES, CYCLADES_Y, "Cyclome-Y"),
175 DEVICE( SYMPHONY, SYMPHONY_101, "82C101"),
176 DEVICE( TEKRAM, TEKRAM_DC290, "DC-290"),
177 DEVICE( AVANCE, AVANCE_2302, "ALG-2302"),
178 DEVICE( S3, S3_811, "Trio32/Trio64"),
179 DEVICE( S3, S3_868, "Vision 868"),
180 DEVICE( S3, S3_928, "Vision 928-P"),
181 DEVICE( S3, S3_864_1, "Vision 864-P"),
182 DEVICE( S3, S3_864_2, "Vision 864-P"),
183 DEVICE( S3, S3_964_1, "Vision 964-P"),
184 DEVICE( S3, S3_964_2, "Vision 964-P"),
185 DEVICE( S3, S3_968, "Vision 968"),
186 DEVICE( INTEL, INTEL_82375, "82375EB"),
187 BRIDGE( INTEL, INTEL_82424, "82424ZX Saturn", 0x00),
188 DEVICE( INTEL, INTEL_82378, "82378IB"),
189 DEVICE( INTEL, INTEL_82430, "82430ZX Aries"),
190 BRIDGE( INTEL, INTEL_82434, "82434LX Mercury/Neptune", 0x00),
191 DEVICE( INTEL, INTEL_7116, "SAA7116"),
192 DEVICE( INTEL, INTEL_82596, "82596"),
193 DEVICE( INTEL, INTEL_82865, "82865"),
194 DEVICE( INTEL, INTEL_82557, "82557"),
195 DEVICE( INTEL, INTEL_82437, "82437"),
196 DEVICE( INTEL, INTEL_82371_0, "82371 Triton PIIX"),
197 DEVICE( INTEL, INTEL_82371_1, "82371 Triton PIIX"),
198 DEVICE( INTEL, INTEL_P6, "Orion P6"),
199 DEVICE( ADAPTEC, ADAPTEC_7850, "AIC-7850"),
200 DEVICE( ADAPTEC, ADAPTEC_7870, "AIC-7870"),
201 DEVICE( ADAPTEC, ADAPTEC_7871, "AIC-7871"),
202 DEVICE( ADAPTEC, ADAPTEC_7872, "AIC-7872"),
203 DEVICE( ADAPTEC, ADAPTEC_7873, "AIC-7873"),
204 DEVICE( ADAPTEC, ADAPTEC_7874, "AIC-7874"),
205 DEVICE( ADAPTEC, ADAPTEC_7880, "AIC-7880U"),
206 DEVICE( ADAPTEC, ADAPTEC_7881, "AIC-7881U"),
207 DEVICE( ADAPTEC, ADAPTEC_7882, "AIC-7882U"),
208 DEVICE( ADAPTEC, ADAPTEC_7883, "AIC-7883U"),
209 DEVICE( ADAPTEC, ADAPTEC_7884, "AIC-7884U"),
210 DEVICE( ATRONICS, ATRONICS_2015, "IDE-2015PL"),
211 DEVICE( HER, HER_STING, "Stingray"),
212 DEVICE( HER, HER_STINGARK, "Stingray ARK 2000PV")
213 };
214
215
216 #ifdef CONFIG_PCI_OPTIMIZE
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233 struct optimization_type {
234 const char *type;
235 const char *off;
236 const char *on;
237 } bridge_optimization[] = {
238 {"Cache L2", "write through", "write back"},
239 {"CPU-PCI posted write", "off", "on"},
240 {"CPU-Memory posted write", "off", "on"},
241 {"PCI-Memory posted write", "off", "on"},
242 {"PCI burst", "off", "on"}
243 };
244
245 #define NUM_OPTIMIZATIONS \
246 (sizeof(bridge_optimization) / sizeof(bridge_optimization[0]))
247
248 struct bridge_mapping_type {
249 unsigned char addr;
250 unsigned char mask;
251 unsigned char value;
252 } bridge_mapping[] = {
253
254
255
256
257
258
259
260 {0x0 ,0x02 ,0x02 },
261 {0x53 ,0x02 ,0x02 },
262 {0x53 ,0x01 ,0x01 },
263 {0x54 ,0x01 ,0x01 },
264 {0x54 ,0x02 ,0x02 },
265
266
267
268
269
270 {0x50 ,0x10 ,0x00 },
271 {0x51 ,0x40 ,0x40 },
272 {0x0 ,0x0 ,0x0 },
273 {0x0 ,0x0 ,0x0 },
274 {0x0 ,0x0 ,0x0 },
275
276
277
278
279
280
281 {0x0 ,0x1 ,0x1 },
282 {0x0 ,0x2 ,0x0 },
283 {0x0 ,0x0 ,0x0 },
284 {0x0 ,0x0 ,0x0 },
285 {0x0 ,0x0 ,0x0 }
286 };
287
288 #endif
289
290
291
292
293
294 struct pci_dev_info *pci_lookup_dev(unsigned int vendor, unsigned int dev)
295 {
296 int min = 0,
297 max = sizeof(dev_info)/sizeof(dev_info[0]) - 1;
298
299 for ( ; ; )
300 {
301 int i = (min + max) >> 1;
302 long order;
303
304 order = dev_info[i].vendor - (long) vendor;
305 if (!order)
306 order = dev_info[i].device - (long) dev;
307
308 if (order < 0)
309 {
310 min = i + 1;
311 if ( min > max )
312 return 0;
313 continue;
314 }
315
316 if (order > 0)
317 {
318 max = i - 1;
319 if ( min > max )
320 return 0;
321 continue;
322 }
323
324 return & dev_info[ i ];
325 }
326 }
327
328 const char *pci_strclass (unsigned int class)
329 {
330 switch (class >> 8) {
331 case PCI_CLASS_NOT_DEFINED: return "Non-VGA device";
332 case PCI_CLASS_NOT_DEFINED_VGA: return "VGA compatible device";
333
334 case PCI_CLASS_STORAGE_SCSI: return "SCSI storage controller";
335 case PCI_CLASS_STORAGE_IDE: return "IDE interface";
336 case PCI_CLASS_STORAGE_FLOPPY: return "Floppy disk controller";
337 case PCI_CLASS_STORAGE_IPI: return "IPI bus controller";
338 case PCI_CLASS_STORAGE_RAID: return "RAID bus controller";
339 case PCI_CLASS_STORAGE_OTHER: return "Unknown mass storage controller";
340
341 case PCI_CLASS_NETWORK_ETHERNET: return "Ethernet controller";
342 case PCI_CLASS_NETWORK_TOKEN_RING: return "Token ring network controller";
343 case PCI_CLASS_NETWORK_FDDI: return "FDDI network controller";
344 case PCI_CLASS_NETWORK_ATM: return "ATM network controller";
345 case PCI_CLASS_NETWORK_OTHER: return "Network controller";
346
347 case PCI_CLASS_DISPLAY_VGA: return "VGA compatible controller";
348 case PCI_CLASS_DISPLAY_XGA: return "XGA compatible controller";
349 case PCI_CLASS_DISPLAY_OTHER: return "Display controller";
350
351 case PCI_CLASS_MULTIMEDIA_VIDEO: return "Multimedia video controller";
352 case PCI_CLASS_MULTIMEDIA_AUDIO: return "Multimedia audio controller";
353 case PCI_CLASS_MULTIMEDIA_OTHER: return "Multimedia controller";
354
355 case PCI_CLASS_MEMORY_RAM: return "RAM memory";
356 case PCI_CLASS_MEMORY_FLASH: return "FLASH memory";
357 case PCI_CLASS_MEMORY_OTHER: return "Memory";
358
359 case PCI_CLASS_BRIDGE_HOST: return "Host bridge";
360 case PCI_CLASS_BRIDGE_ISA: return "ISA bridge";
361 case PCI_CLASS_BRIDGE_EISA: return "EISA bridge";
362 case PCI_CLASS_BRIDGE_MC: return "MicroChannel bridge";
363 case PCI_CLASS_BRIDGE_PCI: return "PCI bridge";
364 case PCI_CLASS_BRIDGE_PCMCIA: return "PCMCIA bridge";
365 case PCI_CLASS_BRIDGE_NUBUS: return "NuBus bridge";
366 case PCI_CLASS_BRIDGE_CARDBUS: return "CardBus bridge";
367 case PCI_CLASS_BRIDGE_OTHER: return "Bridge";
368
369 case PCI_CLASS_COMMUNICATION_SERIAL: return "Serial controller";
370 case PCI_CLASS_COMMUNICATION_PARALLEL: return "Parallel controller";
371 case PCI_CLASS_COMMUNICATION_OTHER: return "Communication controller";
372
373 case PCI_CLASS_SYSTEM_PIC: return "PIC";
374 case PCI_CLASS_SYSTEM_DMA: return "DMA controller";
375 case PCI_CLASS_SYSTEM_TIMER: return "Timer";
376 case PCI_CLASS_SYSTEM_RTC: return "RTC";
377 case PCI_CLASS_SYSTEM_OTHER: return "System peripheral";
378
379 case PCI_CLASS_INPUT_KEYBOARD: return "Keyboard controller";
380 case PCI_CLASS_INPUT_PEN: return "Digitizer Pen";
381 case PCI_CLASS_INPUT_MOUSE: return "Mouse controller";
382 case PCI_CLASS_INPUT_OTHER: return "Input device controller";
383
384 case PCI_CLASS_DOCKING_GENERIC: return "Generic Docking Station";
385 case PCI_CLASS_DOCKING_OTHER: return "Docking Station";
386
387 case PCI_CLASS_PROCESSOR_386: return "386";
388 case PCI_CLASS_PROCESSOR_486: return "486";
389 case PCI_CLASS_PROCESSOR_PENTIUM: return "Pentium";
390 case PCI_CLASS_PROCESSOR_ALPHA: return "Alpha";
391 case PCI_CLASS_PROCESSOR_POWERPC: return "Power PC";
392 case PCI_CLASS_PROCESSOR_CO: return "Co-processor";
393
394 case PCI_CLASS_SERIAL_FIREWIRE: return "FireWire (IEEE 1394)";
395 case PCI_CLASS_SERIAL_ACCESS: return "ACCESS Bus";
396 case PCI_CLASS_SERIAL_SSA: return "SSA";
397 case PCI_CLASS_SERIAL_FIBER: return "Fiber Channel";
398
399 default: return "Unknown class";
400 }
401 }
402
403
404 const char *pci_strvendor(unsigned int vendor)
405 {
406 switch (vendor) {
407 case PCI_VENDOR_ID_COMPAQ: return "Compaq";
408 case PCI_VENDOR_ID_NCR: return "NCR";
409 case PCI_VENDOR_ID_ATI: return "ATI";
410 case PCI_VENDOR_ID_VLSI: return "VLSI";
411 case PCI_VENDOR_ID_ADL: return "Advance Logic";
412 case PCI_VENDOR_ID_NS: return "NS";
413 case PCI_VENDOR_ID_TSENG: return "Tseng'Lab";
414 case PCI_VENDOR_ID_WEITEK: return "Weitek";
415 case PCI_VENDOR_ID_DEC: return "DEC";
416 case PCI_VENDOR_ID_CIRRUS: return "Cirrus Logic";
417 case PCI_VENDOR_ID_IBM: return "IBM";
418 case PCI_VENDOR_ID_WD: return "Western Digital";
419 case PCI_VENDOR_ID_AMD: return "AMD";
420 case PCI_VENDOR_ID_TRIDENT: return "Trident";
421 case PCI_VENDOR_ID_AI: return "Acer Incorporated";
422 case PCI_VENDOR_ID_MATROX: return "Matrox";
423 case PCI_VENDOR_ID_CT: return "Chips & Technologies";
424 case PCI_VENDOR_ID_FD: return "Future Domain";
425 case PCI_VENDOR_ID_SI: return "Silicon Integrated Systems";
426 case PCI_VENDOR_ID_HP: return "Hewlett Packard";
427 case PCI_VENDOR_ID_PCTECH: return "PCTECH";
428 case PCI_VENDOR_ID_DPT: return "DPT";
429 case PCI_VENDOR_ID_OPTI: return "OPTI";
430 case PCI_VENDOR_ID_SGS: return "SGS Thomson";
431 case PCI_VENDOR_ID_BUSLOGIC: return "BusLogic";
432 case PCI_VENDOR_ID_OAK: return "OAK";
433 case PCI_VENDOR_ID_PROMISE: return "Promise Technology";
434 case PCI_VENDOR_ID_N9: return "Number Nine";
435 case PCI_VENDOR_ID_UMC: return "UMC";
436 case PCI_VENDOR_ID_X: return "X TECHNOLOGY";
437 case PCI_VENDOR_ID_NEXGEN: return "Nexgen";
438 case PCI_VENDOR_ID_QLOGIC: return "Q Logic";
439 case PCI_VENDOR_ID_LEADTEK: return "Leadtek Research";
440 case PCI_VENDOR_ID_CONTAQ: return "Contaq";
441 case PCI_VENDOR_ID_FOREX: return "Forex";
442 case PCI_VENDOR_ID_OLICOM: return "Olicom";
443 case PCI_VENDOR_ID_CMD: return "CMD";
444 case PCI_VENDOR_ID_VISION: return "Vision";
445 case PCI_VENDOR_ID_SIERRA: return "Sierra";
446 case PCI_VENDOR_ID_ACC: return "ACC MICROELECTRONICS";
447 case PCI_VENDOR_ID_WINBOND: return "Winbond";
448 case PCI_VENDOR_ID_3COM: return "3Com";
449 case PCI_VENDOR_ID_AL: return "Acer Labs";
450 case PCI_VENDOR_ID_ASP: return "Advanced System Products";
451 case PCI_VENDOR_ID_IMS: return "IMS";
452 case PCI_VENDOR_ID_TEKRAM2: return "Tekram";
453 case PCI_VENDOR_ID_AMCC: return "AMCC";
454 case PCI_VENDOR_ID_INTERG: return "Intergraphics";
455 case PCI_VENDOR_ID_REALTEK: return "Realtek";
456 case PCI_VENDOR_ID_INIT: return "Initio Corp";
457 case PCI_VENDOR_ID_VIA: return "VIA Technologies";
458 case PCI_VENDOR_ID_VORTEX: return "VORTEX";
459 case PCI_VENDOR_ID_EF: return "Efficient Networks";
460 case PCI_VENDOR_ID_FORE: return "Fore Systems";
461 case PCI_VENDOR_ID_IMAGINGTECH: return "Imaging Technology";
462 case PCI_VENDOR_ID_PLX: return "PLX";
463 case PCI_VENDOR_ID_ALLIANCE: return "Alliance";
464 case PCI_VENDOR_ID_MUTECH: return "Mutech";
465 case PCI_VENDOR_ID_ZEITNET: return "ZeitNet";
466 case PCI_VENDOR_ID_SPECIALIX: return "Specialix";
467 case PCI_VENDOR_ID_CYCLADES: return "Cyclades";
468 case PCI_VENDOR_ID_SYMPHONY: return "Symphony";
469 case PCI_VENDOR_ID_TEKRAM: return "Tekram";
470 case PCI_VENDOR_ID_AVANCE: return "Avance";
471 case PCI_VENDOR_ID_S3: return "S3 Inc.";
472 case PCI_VENDOR_ID_INTEL: return "Intel";
473 case PCI_VENDOR_ID_ADAPTEC: return "Adaptec";
474 case PCI_VENDOR_ID_ATRONICS: return "Atronics";
475 case PCI_VENDOR_ID_HER: return "Hercules";
476 default: return "Unknown vendor";
477 }
478 }
479
480
481 const char *pci_strdev(unsigned int vendor, unsigned int device)
482 {
483 struct pci_dev_info *info;
484
485 info = pci_lookup_dev(vendor, device);
486 return info ? info->name : "Unknown device";
487 }
488
489
490
491
492
493
494 static void burst_bridge(unsigned char bus, unsigned char devfn,
495 unsigned char pos, int turn_on)
496 {
497 #ifdef CONFIG_PCI_OPTIMIZE
498 struct bridge_mapping_type *bmap;
499 unsigned char val;
500 int i;
501
502 pos *= NUM_OPTIMIZATIONS;
503 printk("PCI bridge optimization.\n");
504 for (i = 0; i < NUM_OPTIMIZATIONS; i++) {
505 printk(" %s: ", bridge_optimization[i].type);
506 bmap = &bridge_mapping[pos + i];
507 if (!bmap->addr) {
508 printk("Not supported.");
509 } else {
510 pcibios_read_config_byte(bus, devfn, bmap->addr, &val);
511 if ((val & bmap->mask) == bmap->value) {
512 printk("%s.", bridge_optimization[i].on);
513 if (!turn_on) {
514 pcibios_write_config_byte(bus, devfn,
515 bmap->addr,
516 (val | bmap->mask)
517 - bmap->value);
518 printk("Changed! Now %s.", bridge_optimization[i].off);
519 }
520 } else {
521 printk("%s.", bridge_optimization[i].off);
522 if (turn_on) {
523 pcibios_write_config_byte(bus, devfn,
524 bmap->addr,
525 (val & (0xff - bmap->mask))
526 + bmap->value);
527 printk("Changed! Now %s.", bridge_optimization[i].on);
528 }
529 }
530 }
531 printk("\n");
532 }
533 #endif
534 }
535
536
537
538
539
540
541
542
543 static int sprint_dev_config(struct pci_dev *dev, char *buf, int size)
544 {
545 unsigned long base;
546 unsigned int l, class_rev, bus, devfn;
547 unsigned short vendor, device, status;
548 unsigned char bist, latency, min_gnt, max_lat;
549 int reg, len = 0;
550 const char *str;
551
552 bus = dev->bus->number;
553 devfn = dev->devfn;
554
555 pcibios_read_config_dword(bus, devfn, PCI_CLASS_REVISION, &class_rev);
556 pcibios_read_config_word (bus, devfn, PCI_VENDOR_ID, &vendor);
557 pcibios_read_config_word (bus, devfn, PCI_DEVICE_ID, &device);
558 pcibios_read_config_word (bus, devfn, PCI_STATUS, &status);
559 pcibios_read_config_byte (bus, devfn, PCI_BIST, &bist);
560 pcibios_read_config_byte (bus, devfn, PCI_LATENCY_TIMER, &latency);
561 pcibios_read_config_byte (bus, devfn, PCI_MIN_GNT, &min_gnt);
562 pcibios_read_config_byte (bus, devfn, PCI_MAX_LAT, &max_lat);
563 if (len + 80 > size) {
564 return -1;
565 }
566 len += sprintf(buf + len, " Bus %2d, device %3d, function %2d:\n",
567 bus, PCI_SLOT(devfn), PCI_FUNC(devfn));
568
569 if (len + 80 > size) {
570 return -1;
571 }
572 len += sprintf(buf + len, " %s: %s %s (rev %d).\n ",
573 pci_strclass(class_rev >> 8), pci_strvendor(vendor),
574 pci_strdev(vendor, device), class_rev & 0xff);
575
576 if (!pci_lookup_dev(vendor, device)) {
577 len += sprintf(buf + len,
578 "Vendor id=%x. Device id=%x.\n ",
579 vendor, device);
580 }
581
582 str = 0;
583 switch (status & PCI_STATUS_DEVSEL_MASK) {
584 case PCI_STATUS_DEVSEL_FAST: str = "Fast devsel. "; break;
585 case PCI_STATUS_DEVSEL_MEDIUM: str = "Medium devsel. "; break;
586 case PCI_STATUS_DEVSEL_SLOW: str = "Slow devsel. "; break;
587 }
588 if (len + strlen(str) > size) {
589 return -1;
590 }
591 len += sprintf(buf + len, str);
592
593 if (status & PCI_STATUS_FAST_BACK) {
594 # define fast_b2b_capable "Fast back-to-back capable. "
595 if (len + strlen(fast_b2b_capable) > size) {
596 return -1;
597 }
598 len += sprintf(buf + len, fast_b2b_capable);
599 # undef fast_b2b_capable
600 }
601
602 if (bist & PCI_BIST_CAPABLE) {
603 # define BIST_capable "BIST capable. "
604 if (len + strlen(BIST_capable) > size) {
605 return -1;
606 }
607 len += sprintf(buf + len, BIST_capable);
608 # undef BIST_capable
609 }
610
611 if (dev->irq) {
612 if (len + 40 > size) {
613 return -1;
614 }
615 len += sprintf(buf + len, "IRQ %d. ", dev->irq);
616 }
617
618 if (dev->master) {
619 if (len + 80 > size) {
620 return -1;
621 }
622 len += sprintf(buf + len, "Master Capable. ");
623 if (latency)
624 len += sprintf(buf + len, "Latency=%d. ", latency);
625 else
626 len += sprintf(buf + len, "No bursts. ");
627 if (min_gnt)
628 len += sprintf(buf + len, "Min Gnt=%d.", min_gnt);
629 if (max_lat)
630 len += sprintf(buf + len, "Max Lat=%d.", max_lat);
631 }
632
633 for (reg = PCI_BASE_ADDRESS_0; reg <= PCI_BASE_ADDRESS_5; reg += 4) {
634 if (len + 40 > size) {
635 return -1;
636 }
637 pcibios_read_config_dword(bus, devfn, reg, &l);
638 base = l;
639 if (!base) {
640 continue;
641 }
642
643 if (base & PCI_BASE_ADDRESS_SPACE_IO) {
644 len += sprintf(buf + len,
645 "\n I/O at 0x%lx.",
646 base & PCI_BASE_ADDRESS_IO_MASK);
647 } else {
648 const char *pref, *type = "unknown";
649
650 if (base & PCI_BASE_ADDRESS_MEM_PREFETCH) {
651 pref = "P";
652 } else {
653 pref = "Non-p";
654 }
655 switch (base & PCI_BASE_ADDRESS_MEM_TYPE_MASK) {
656 case PCI_BASE_ADDRESS_MEM_TYPE_32:
657 type = "32 bit"; break;
658 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
659 type = "20 bit"; break;
660 case PCI_BASE_ADDRESS_MEM_TYPE_64:
661 type = "64 bit";
662
663 reg += 4;
664 pcibios_read_config_dword(bus, devfn, reg, &l);
665 base |= ((u64) l) << 32;
666 break;
667 }
668 len += sprintf(buf + len,
669 "\n %srefetchable %s memory at "
670 "0x%lx.", pref, type,
671 base & PCI_BASE_ADDRESS_MEM_MASK);
672 }
673 }
674
675 len += sprintf(buf + len, "\n");
676 return len;
677 }
678
679
680
681
682
683
684 int get_pci_list(char *buf)
685 {
686 int nprinted, len, size;
687 struct pci_dev *dev;
688 # define MSG "\nwarning: page-size limit reached!\n"
689
690
691 size = PAGE_SIZE - (strlen(MSG) + 1);
692 len = sprintf(buf, "PCI devices found:\n");
693
694 for (dev = pci_devices; dev; dev = dev->next) {
695 nprinted = sprint_dev_config(dev, buf + len, size - len);
696 if (nprinted < 0) {
697 return len + sprintf(buf + len, MSG);
698 }
699 len += nprinted;
700 }
701 return len;
702 }
703
704
705
706
707
708
709 static void *pci_malloc(long size, unsigned long *mem_startp)
710 {
711 void *mem;
712
713 #ifdef DEBUG
714 printk("...pci_malloc(size=%ld,mem=%p)", size, *mem_startp);
715 #endif
716 mem = (void*) *mem_startp;
717 *mem_startp += (size + sizeof(void*) - 1) & ~(sizeof(void*) - 1);
718 memset(mem, 0, size);
719 return mem;
720 }
721
722
723 static unsigned int scan_bus(struct pci_bus *bus, unsigned long *mem_startp)
724 {
725 unsigned int devfn, l, max;
726 unsigned char cmd, tmp, hdr_type = 0;
727 struct pci_dev_info *info;
728 struct pci_dev *dev;
729 struct pci_bus *child;
730
731 #ifdef DEBUG
732 printk("...scan_bus(busno=%d,mem=%p)\n", bus->number, *mem_startp);
733 #endif
734
735 max = bus->secondary;
736 for (devfn = 0; devfn < 0xff; ++devfn) {
737 if (PCI_FUNC(devfn) == 0) {
738 pcibios_read_config_byte(bus->number, devfn,
739 PCI_HEADER_TYPE, &hdr_type);
740 } else if (!(hdr_type & 0x80)) {
741
742 continue;
743 }
744
745 pcibios_read_config_dword(bus->number, devfn, PCI_VENDOR_ID,
746 &l);
747
748 if (l == 0xffffffff || l == 0x00000000) {
749 hdr_type = 0;
750 continue;
751 }
752
753 dev = pci_malloc(sizeof(*dev), mem_startp);
754 dev->bus = bus;
755
756
757
758
759
760 dev->next = pci_devices;
761 pci_devices = dev;
762
763 dev->devfn = devfn;
764 dev->vendor = l & 0xffff;
765 dev->device = (l >> 16) & 0xffff;
766
767
768
769
770
771
772 info = pci_lookup_dev(dev->vendor, dev->device);
773 if (!info) {
774 printk("Warning : Unknown PCI device (%x:%x). Please read include/linux/pci.h \n",
775 dev->vendor, dev->device);
776 } else {
777
778 if (info->bridge_type != 0xff) {
779 burst_bridge(bus->number, devfn,
780 info->bridge_type, 1);
781 }
782 }
783
784
785 pcibios_read_config_byte(bus->number, devfn, PCI_COMMAND,
786 &cmd);
787 pcibios_write_config_byte(bus->number, devfn, PCI_COMMAND,
788 cmd | PCI_COMMAND_MASTER);
789 pcibios_read_config_byte(bus->number, devfn, PCI_COMMAND,
790 &tmp);
791 dev->master = ((tmp & PCI_COMMAND_MASTER) != 0);
792 pcibios_write_config_byte(bus->number, devfn, PCI_COMMAND,
793 cmd);
794
795
796 pcibios_read_config_byte(bus->number, devfn,
797 PCI_INTERRUPT_LINE, &dev->irq);
798
799
800 pcibios_read_config_dword(bus->number, devfn,
801 PCI_CLASS_REVISION, &l);
802 l = l >> 8;
803 dev->class = l;
804
805
806
807
808 dev->sibling = bus->devices;
809 bus->devices = dev;
810
811 if (dev->class >> 8 == PCI_CLASS_BRIDGE_PCI) {
812 unsigned int buses;
813 unsigned short cr;
814
815
816
817
818 child = pci_malloc(sizeof(*child), mem_startp);
819 child->next = bus->children;
820 bus->children = child;
821 child->self = dev;
822 child->parent = bus;
823
824
825
826
827
828 child->number = child->secondary = ++max;
829 child->primary = bus->secondary;
830 child->subordinate = 0xff;
831
832
833
834
835 pcibios_read_config_word(bus->number, devfn,
836 PCI_COMMAND, &cr);
837 pcibios_write_config_word(bus->number, devfn,
838 PCI_COMMAND, 0x0000);
839 pcibios_write_config_word(bus->number, devfn,
840 PCI_STATUS, 0xffff);
841
842
843
844 pcibios_read_config_dword(bus->number, devfn, 0x18,
845 &buses);
846 buses &= 0xff000000;
847 buses |= (((unsigned int)(child->primary) << 0) |
848 ((unsigned int)(child->secondary) << 8) |
849 ((unsigned int)(child->subordinate) << 16));
850 pcibios_write_config_dword(bus->number, devfn, 0x18,
851 buses);
852
853
854
855 max = scan_bus(child, mem_startp);
856
857
858
859
860 child->subordinate = max;
861 buses = (buses & 0xff00ffff)
862 | ((unsigned int)(child->subordinate) << 16);
863 pcibios_write_config_dword(bus->number, devfn, 0x18,
864 buses);
865 pcibios_write_config_word(bus->number, devfn,
866 PCI_COMMAND, cr);
867 }
868 }
869
870
871
872
873
874
875
876 return max;
877 }
878
879
880 unsigned long pci_init (unsigned long mem_start, unsigned long mem_end)
881 {
882 mem_start = pcibios_init(mem_start, mem_end);
883
884 if (!pcibios_present()) {
885 printk("pci_init: no BIOS32 detected\n");
886 return mem_start;
887 }
888
889 printk("Probing PCI hardware.\n");
890
891 memset(&pci_root, 0, sizeof(pci_root));
892 pci_root.subordinate = scan_bus(&pci_root, &mem_start);
893
894
895 mem_start = pcibios_fixup(mem_start, mem_end);
896
897 #ifdef DEBUG
898 {
899 int len = get_pci_list((char*)mem_start);
900 if (len) {
901 ((char *) mem_start)[len] = '\0';
902 printk("%s\n", (char *) mem_start);
903 }
904 }
905 #endif
906 return mem_start;
907 }