root/drivers/sound/ad1848.c

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DEFINITIONS

This source file includes following definitions.
  1. ad_read
  2. ad_write
  3. wait_for_calibration
  4. ad_mute
  5. ad_unmute
  6. ad_enter_MCE
  7. ad_leave_MCE
  8. ad1848_set_recmask
  9. change_bits
  10. ad1848_mixer_get
  11. ad1848_mixer_set
  12. ad1848_mixer_reset
  13. ad1848_mixer_ioctl
  14. ad1848_open
  15. ad1848_close
  16. set_speed
  17. set_channels
  18. set_format
  19. ad1848_ioctl
  20. ad1848_output_block
  21. ad1848_start_input
  22. ad1848_prepare_for_IO
  23. ad1848_reset
  24. ad1848_halt
  25. ad1848_halt_input
  26. ad1848_halt_output
  27. ad1848_trigger
  28. ad1848_detect
  29. ad1848_init
  30. ad1848_unload
  31. ad1848_interrupt
  32. check_opl3
  33. probe_ms_sound
  34. attach_ms_sound
  35. unload_ms_sound
  36. probe_pnp_ad1848
  37. attach_pnp_ad1848
  38. unload_pnp_ad1848
  39. ad1848_tmr_start
  40. ad1848_tmr_reprogram
  41. ad1848_tmr_disable
  42. ad1848_tmr_restart
  43. ad1848_tmr_install

   1 /*
   2  * sound/ad1848.c
   3  *
   4  * The low level driver for the AD1848/CS4248 codec chip which
   5  * is used for example in the MS Sound System.
   6  *
   7  * The CS4231 which is used in the GUS MAX and some other cards is
   8  * upwards compatible with AD1848 and this driver is able to drive it.
   9  *
  10  * CS4231A and AD1845 are upward compatible with CS4231. However
  11  * the new features of these chips are different.
  12  *
  13  * CS4232 is a PnP audio chip which contains a CS4231A (and SB, MPU).
  14  * CS4232A is an improved version of CS4232.
  15  */
  16 
  17 /*
  18  * Copyright by Hannu Savolainen 1993-1996
  19  *
  20  * Redistribution and use in source and binary forms, with or without
  21  * modification, are permitted provided that the following conditions are
  22  * met: 1. Redistributions of source code must retain the above copyright
  23  * notice, this list of conditions and the following disclaimer. 2.
  24  * Redistributions in binary form must reproduce the above copyright notice,
  25  * this list of conditions and the following disclaimer in the documentation
  26  * and/or other materials provided with the distribution.
  27  *
  28  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND ANY
  29  * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  30  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  31  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
  32  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  33  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  34  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  35  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  36  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  37  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  38  * SUCH DAMAGE.
  39  */
  40 #include <linux/config.h>
  41 
  42 
  43 #define DEB(x)
  44 #define DEB1(x)
  45 #include "sound_config.h"
  46 
  47 #if defined(CONFIG_AD1848)
  48 
  49 #include "ad1848_mixer.h"
  50 
  51 typedef struct
  52   {
  53     int             base;
  54     int             irq;
  55     int             dual_dma;   /* 1, when two DMA channels allocated */
  56     unsigned char   MCE_bit;
  57     unsigned char   saved_regs[16];
  58     int             debug_flag;
  59 
  60     int             speed;
  61     unsigned char   speed_bits;
  62     int             channels;
  63     int             audio_format;
  64     unsigned char   format_bits;
  65 
  66     int             xfer_count;
  67     int             irq_mode;
  68     int             intr_active;
  69     int             opened;
  70     char           *chip_name;
  71     int             mode;
  72 #define MD_1848         1
  73 #define MD_4231         2
  74 #define MD_4231A        3
  75 #define MD_1845         4
  76 #define MD_4232         5
  77 
  78     /* Mixer parameters */
  79     int             recmask;
  80     int             supported_devices;
  81     int             supported_rec_devices;
  82     unsigned short  levels[32];
  83     int             dev_no;
  84     volatile unsigned long timer_ticks;
  85     int             timer_running;
  86     int             irq_ok;
  87     int            *osp;
  88   }
  89 
  90 ad1848_info;
  91 
  92 static int      nr_ad1848_devs = 0;
  93 static volatile char irq2dev[17] =
  94 {-1, -1, -1, -1, -1, -1, -1, -1,
  95  -1, -1, -1, -1, -1, -1, -1, -1, -1};
  96 
  97 static int      timer_installed = -1;
  98 
  99 static char     mixer2codec[MAX_MIXER_DEV] =
 100 {0};
 101 
 102 static int      ad_format_mask[6 /*devc->mode */ ] =
 103 {
 104   0,
 105   AFMT_U8 | AFMT_S16_LE | AFMT_MU_LAW | AFMT_A_LAW,
 106   AFMT_U8 | AFMT_S16_LE | AFMT_MU_LAW | AFMT_A_LAW | AFMT_U16_LE | AFMT_IMA_ADPCM,
 107   AFMT_U8 | AFMT_S16_LE | AFMT_MU_LAW | AFMT_A_LAW | AFMT_U16_LE | AFMT_IMA_ADPCM,
 108   AFMT_U8 | AFMT_S16_LE | AFMT_MU_LAW | AFMT_A_LAW,     /* AD1845 */
 109   AFMT_U8 | AFMT_S16_LE | AFMT_MU_LAW | AFMT_A_LAW | AFMT_U16_LE | AFMT_IMA_ADPCM
 110 };
 111 
 112 static ad1848_info dev_info[MAX_AUDIO_DEV];
 113 
 114 #define io_Index_Addr(d)        ((d)->base)
 115 #define io_Indexed_Data(d)      ((d)->base+1)
 116 #define io_Status(d)            ((d)->base+2)
 117 #define io_Polled_IO(d)         ((d)->base+3)
 118 
 119 static int      ad1848_open (int dev, int mode);
 120 static void     ad1848_close (int dev);
 121 static int      ad1848_ioctl (int dev, unsigned int cmd, caddr_t arg, int local);
 122 static void     ad1848_output_block (int dev, unsigned long buf, int count, int intrflag, int dma_restart);
 123 static void     ad1848_start_input (int dev, unsigned long buf, int count, int intrflag, int dma_restart);
 124 static int      ad1848_prepare_for_IO (int dev, int bsize, int bcount);
 125 static void     ad1848_reset (int dev);
 126 static void     ad1848_halt (int dev);
 127 static void     ad1848_halt_input (int dev);
 128 static void     ad1848_halt_output (int dev);
 129 static void     ad1848_trigger (int dev, int bits);
 130 static int      ad1848_tmr_install (int dev);
 131 static void     ad1848_tmr_reprogram (int dev);
 132 
 133 static int
 134 ad_read (ad1848_info * devc, int reg)
     /* [previous][next][first][last][top][bottom][index][help] */
 135 {
 136   unsigned long   flags;
 137   int             x;
 138   int             timeout = 900000;
 139 
 140   while (timeout > 0 && inb (devc->base) == 0x80)       /*Are we initializing */
 141     timeout--;
 142 
 143   save_flags (flags);
 144   cli ();
 145   outb ((unsigned char) (reg & 0xff) | devc->MCE_bit, io_Index_Addr (devc));
 146   x = inb (io_Indexed_Data (devc));
 147   /*  printk("(%02x<-%02x) ", reg|devc->MCE_bit, x); */
 148   restore_flags (flags);
 149 
 150   return x;
 151 }
 152 
 153 static void
 154 ad_write (ad1848_info * devc, int reg, int data)
     /* [previous][next][first][last][top][bottom][index][help] */
 155 {
 156   unsigned long   flags;
 157   int             timeout = 900000;
 158 
 159   while (timeout > 0 &&
 160          inb (devc->base) == 0x80)      /*Are we initializing */
 161     timeout--;
 162 
 163   save_flags (flags);
 164   cli ();
 165   outb ((unsigned char) (reg & 0xff) | devc->MCE_bit, io_Index_Addr (devc));
 166   outb ((unsigned char) (data & 0xff), io_Indexed_Data (devc));
 167   /* printk("(%02x->%02x) ", reg|devc->MCE_bit, data); */
 168   restore_flags (flags);
 169 }
 170 
 171 static void
 172 wait_for_calibration (ad1848_info * devc)
     /* [previous][next][first][last][top][bottom][index][help] */
 173 {
 174   int             timeout = 0;
 175 
 176   /*
 177      * Wait until the auto calibration process has finished.
 178      *
 179      * 1)       Wait until the chip becomes ready (reads don't return 0x80).
 180      * 2)       Wait until the ACI bit of I11 gets on and then off.
 181    */
 182 
 183   timeout = 100000;
 184   while (timeout > 0 && inb (devc->base) == 0x80)
 185     timeout--;
 186   if (inb (devc->base) & 0x80)
 187     printk ("ad1848: Auto calibration timed out(1).\n");
 188 
 189   timeout = 100;
 190   while (timeout > 0 && !(ad_read (devc, 11) & 0x20))
 191     timeout--;
 192   if (!(ad_read (devc, 11) & 0x20))
 193     return;
 194 
 195   timeout = 40000;
 196   while (timeout > 0 && ad_read (devc, 11) & 0x20)
 197     timeout--;
 198   if (ad_read (devc, 11) & 0x20)
 199     printk ("ad1848: Auto calibration timed out(3).\n");
 200 }
 201 
 202 static void
 203 ad_mute (ad1848_info * devc)
     /* [previous][next][first][last][top][bottom][index][help] */
 204 {
 205 }
 206 
 207 static void
 208 ad_unmute (ad1848_info * devc)
     /* [previous][next][first][last][top][bottom][index][help] */
 209 {
 210 }
 211 
 212 static void
 213 ad_enter_MCE (ad1848_info * devc)
     /* [previous][next][first][last][top][bottom][index][help] */
 214 {
 215   unsigned long   flags;
 216   int             timeout = 1000;
 217   unsigned short  prev;
 218 
 219   while (timeout > 0 && inb (devc->base) == 0x80)       /*Are we initializing */
 220     timeout--;
 221 
 222   save_flags (flags);
 223   cli ();
 224 
 225   devc->MCE_bit = 0x40;
 226   prev = inb (io_Index_Addr (devc));
 227   if (prev & 0x40)
 228     {
 229       restore_flags (flags);
 230       return;
 231     }
 232 
 233   outb (devc->MCE_bit, io_Index_Addr (devc));
 234   restore_flags (flags);
 235 }
 236 
 237 static void
 238 ad_leave_MCE (ad1848_info * devc)
     /* [previous][next][first][last][top][bottom][index][help] */
 239 {
 240   unsigned long   flags;
 241   unsigned char   prev;
 242   int             timeout = 1000;
 243 
 244   while (timeout > 0 && inb (devc->base) == 0x80)       /*Are we initializing */
 245     timeout--;
 246 
 247   save_flags (flags);
 248   cli ();
 249 
 250   devc->MCE_bit = 0x00;
 251   prev = inb (io_Index_Addr (devc));
 252   outb (0x00, io_Index_Addr (devc));    /* Clear the MCE bit */
 253 
 254   if ((prev & 0x40) == 0)       /* Not in MCE mode */
 255     {
 256       restore_flags (flags);
 257       return;
 258     }
 259 
 260   outb (0x00, io_Index_Addr (devc));    /* Clear the MCE bit */
 261   wait_for_calibration (devc);
 262   restore_flags (flags);
 263 }
 264 
 265 
 266 static int
 267 ad1848_set_recmask (ad1848_info * devc, int mask)
     /* [previous][next][first][last][top][bottom][index][help] */
 268 {
 269   unsigned char   recdev;
 270   int             i, n;
 271 
 272   mask &= devc->supported_rec_devices;
 273 
 274   n = 0;
 275   for (i = 0; i < 32; i++)      /* Count selected device bits */
 276     if (mask & (1 << i))
 277       n++;
 278 
 279   if (n == 0)
 280     mask = SOUND_MASK_MIC;
 281   else if (n != 1)              /* Too many devices selected */
 282     {
 283       mask &= ~devc->recmask;   /* Filter out active settings */
 284 
 285       n = 0;
 286       for (i = 0; i < 32; i++)  /* Count selected device bits */
 287         if (mask & (1 << i))
 288           n++;
 289 
 290       if (n != 1)
 291         mask = SOUND_MASK_MIC;
 292     }
 293 
 294   switch (mask)
 295     {
 296     case SOUND_MASK_MIC:
 297       recdev = 2;
 298       break;
 299 
 300     case SOUND_MASK_LINE:
 301     case SOUND_MASK_LINE3:
 302       recdev = 0;
 303       break;
 304 
 305     case SOUND_MASK_CD:
 306     case SOUND_MASK_LINE1:
 307       recdev = 1;
 308       break;
 309 
 310     case SOUND_MASK_IMIX:
 311       recdev = 3;
 312       break;
 313 
 314     default:
 315       mask = SOUND_MASK_MIC;
 316       recdev = 2;
 317     }
 318 
 319   recdev <<= 6;
 320   ad_write (devc, 0, (ad_read (devc, 0) & 0x3f) | recdev);
 321   ad_write (devc, 1, (ad_read (devc, 1) & 0x3f) | recdev);
 322 
 323   devc->recmask = mask;
 324   return mask;
 325 }
 326 
 327 static void
 328 change_bits (unsigned char *regval, int dev, int chn, int newval)
     /* [previous][next][first][last][top][bottom][index][help] */
 329 {
 330   unsigned char   mask;
 331   int             shift;
 332 
 333   if (mix_devices[dev][chn].polarity == 1)      /* Reverse */
 334     newval = 100 - newval;
 335 
 336   mask = (1 << mix_devices[dev][chn].nbits) - 1;
 337   shift = mix_devices[dev][chn].bitpos;
 338   newval = (int) ((newval * mask) + 50) / 100;  /* Scale it */
 339 
 340   *regval &= ~(mask << shift);  /* Clear bits */
 341   *regval |= (newval & mask) << shift;  /* Set new value */
 342 }
 343 
 344 static int
 345 ad1848_mixer_get (ad1848_info * devc, int dev)
     /* [previous][next][first][last][top][bottom][index][help] */
 346 {
 347   if (!((1 << dev) & devc->supported_devices))
 348     return -EINVAL;
 349 
 350   return devc->levels[dev];
 351 }
 352 
 353 static int
 354 ad1848_mixer_set (ad1848_info * devc, int dev, int value)
     /* [previous][next][first][last][top][bottom][index][help] */
 355 {
 356   int             left = value & 0x000000ff;
 357   int             right = (value & 0x0000ff00) >> 8;
 358   int             retvol;
 359 
 360   int             regoffs;
 361   unsigned char   val;
 362 
 363   if (left > 100)
 364     left = 100;
 365   if (right > 100)
 366     right = 100;
 367 
 368   if (mix_devices[dev][RIGHT_CHN].nbits == 0)   /* Mono control */
 369     right = left;
 370 
 371   retvol = left | (left << 8);
 372 
 373   /* Scale volumes */
 374   left = mix_cvt[left];
 375   right = mix_cvt[right];
 376 
 377   /* Scale it again */
 378   left = mix_cvt[left];
 379   right = mix_cvt[right];
 380 
 381   if (dev > 31)
 382     return -EINVAL;
 383 
 384   if (!(devc->supported_devices & (1 << dev)))
 385     return -EINVAL;
 386 
 387   if (mix_devices[dev][LEFT_CHN].nbits == 0)
 388     return -EINVAL;
 389 
 390   devc->levels[dev] = retvol;
 391 
 392   /*
 393      * Set the left channel
 394    */
 395 
 396   regoffs = mix_devices[dev][LEFT_CHN].regno;
 397   val = ad_read (devc, regoffs);
 398   change_bits (&val, dev, LEFT_CHN, left);
 399   ad_write (devc, regoffs, val);
 400   devc->saved_regs[regoffs] = val;
 401 
 402   /*
 403      * Set the right channel
 404    */
 405 
 406   if (mix_devices[dev][RIGHT_CHN].nbits == 0)
 407     return retvol;              /* Was just a mono channel */
 408 
 409   regoffs = mix_devices[dev][RIGHT_CHN].regno;
 410   val = ad_read (devc, regoffs);
 411   change_bits (&val, dev, RIGHT_CHN, right);
 412   ad_write (devc, regoffs, val);
 413   devc->saved_regs[regoffs] = val;
 414 
 415   return retvol;
 416 }
 417 
 418 static void
 419 ad1848_mixer_reset (ad1848_info * devc)
     /* [previous][next][first][last][top][bottom][index][help] */
 420 {
 421   int             i;
 422 
 423   switch (devc->mode)
 424     {
 425     case MD_4231:
 426     case MD_4231A:
 427     case MD_1845:
 428       devc->supported_devices = MODE2_MIXER_DEVICES;
 429       break;
 430 
 431     case MD_4232:
 432       devc->supported_devices = MODE3_MIXER_DEVICES;
 433       break;
 434 
 435     default:
 436       devc->supported_devices = MODE1_MIXER_DEVICES;
 437     }
 438 
 439   devc->supported_rec_devices = MODE1_REC_DEVICES;
 440 
 441   for (i = 0; i < SOUND_MIXER_NRDEVICES; i++)
 442     if (devc->supported_devices & (1 << i))
 443       ad1848_mixer_set (devc, i, default_mixer_levels[i]);
 444   ad1848_set_recmask (devc, SOUND_MASK_MIC);
 445 }
 446 
 447 static int
 448 ad1848_mixer_ioctl (int dev, unsigned int cmd, caddr_t arg)
     /* [previous][next][first][last][top][bottom][index][help] */
 449 {
 450   ad1848_info    *devc;
 451 
 452   int             codec_dev = mixer2codec[dev];
 453 
 454   if (!codec_dev)
 455     return -ENXIO;
 456 
 457   codec_dev--;
 458 
 459   devc = (ad1848_info *) audio_devs[codec_dev]->devc;
 460 
 461   if (((cmd >> 8) & 0xff) == 'M')
 462     {
 463 
 464       if (_IOC_DIR (cmd) & _IOC_WRITE)
 465         switch (cmd & 0xff)
 466           {
 467           case SOUND_MIXER_RECSRC:
 468             return snd_ioctl_return ((int *) arg, ad1848_set_recmask (devc, get_fs_long ((long *) arg)));
 469             break;
 470 
 471           default:
 472             return snd_ioctl_return ((int *) arg, ad1848_mixer_set (devc, cmd & 0xff, get_fs_long ((long *) arg)));
 473           }
 474       else
 475         switch (cmd & 0xff)     /*
 476                                  * Return parameters
 477                                  */
 478           {
 479 
 480           case SOUND_MIXER_RECSRC:
 481             return snd_ioctl_return ((int *) arg, devc->recmask);
 482             break;
 483 
 484           case SOUND_MIXER_DEVMASK:
 485             return snd_ioctl_return ((int *) arg, devc->supported_devices);
 486             break;
 487 
 488           case SOUND_MIXER_STEREODEVS:
 489             return snd_ioctl_return ((int *) arg, devc->supported_devices & ~(SOUND_MASK_SPEAKER | SOUND_MASK_IMIX));
 490             break;
 491 
 492           case SOUND_MIXER_RECMASK:
 493             return snd_ioctl_return ((int *) arg, devc->supported_rec_devices);
 494             break;
 495 
 496           case SOUND_MIXER_CAPS:
 497             return snd_ioctl_return ((int *) arg, SOUND_CAP_EXCL_INPUT);
 498             break;
 499 
 500           default:
 501             return snd_ioctl_return ((int *) arg, ad1848_mixer_get (devc, cmd & 0xff));
 502           }
 503     }
 504   else
 505     return -EINVAL;
 506 }
 507 
 508 static struct audio_operations ad1848_pcm_operations[MAX_AUDIO_DEV] =
 509 {
 510   {
 511     "Generic AD1848 codec",
 512     DMA_AUTOMODE,
 513     AFMT_U8,                    /* Will be set later */
 514     NULL,
 515     ad1848_open,
 516     ad1848_close,
 517     ad1848_output_block,
 518     ad1848_start_input,
 519     ad1848_ioctl,
 520     ad1848_prepare_for_IO,
 521     ad1848_prepare_for_IO,
 522     ad1848_reset,
 523     ad1848_halt,
 524     NULL,
 525     NULL,
 526     ad1848_halt_input,
 527     ad1848_halt_output,
 528     ad1848_trigger
 529   }};
 530 
 531 static struct mixer_operations ad1848_mixer_operations =
 532 {
 533   "AD1848/CS4248/CS4231",
 534   ad1848_mixer_ioctl
 535 };
 536 
 537 static int
 538 ad1848_open (int dev, int mode)
     /* [previous][next][first][last][top][bottom][index][help] */
 539 {
 540   ad1848_info    *devc = NULL;
 541   unsigned long   flags;
 542 
 543   if (dev < 0 || dev >= num_audiodevs)
 544     return -ENXIO;
 545 
 546   devc = (ad1848_info *) audio_devs[dev]->devc;
 547 
 548 
 549   save_flags (flags);
 550   cli ();
 551   if (devc->opened)
 552     {
 553       restore_flags (flags);
 554       printk ("ad1848: Already opened\n");
 555       return -EBUSY;
 556     }
 557 
 558 
 559   devc->dual_dma = 0;
 560 
 561   if (audio_devs[dev]->flags & DMA_DUPLEX)
 562     {
 563       devc->dual_dma = 1;
 564     }
 565 
 566   devc->intr_active = 0;
 567   devc->opened = 1;
 568   devc->irq_mode = 0;
 569   ad1848_trigger (dev, 0);
 570   restore_flags (flags);
 571 /*
 572  * Mute output until the playback really starts. This decreases clicking (hope so).
 573  */
 574   ad_mute (devc);
 575 
 576   return 0;
 577 }
 578 
 579 static void
 580 ad1848_close (int dev)
     /* [previous][next][first][last][top][bottom][index][help] */
 581 {
 582   unsigned long   flags;
 583   ad1848_info    *devc = (ad1848_info *) audio_devs[dev]->devc;
 584 
 585   DEB (printk ("ad1848_close(void)\n"));
 586 
 587   save_flags (flags);
 588   cli ();
 589 
 590   devc->intr_active = 0;
 591   ad1848_reset (dev);
 592 
 593 
 594   devc->opened = 0;
 595   devc->irq_mode = 0;
 596 
 597   ad_unmute (devc);
 598   restore_flags (flags);
 599 }
 600 
 601 static int
 602 set_speed (ad1848_info * devc, int arg)
     /* [previous][next][first][last][top][bottom][index][help] */
 603 {
 604   /*
 605      * The sampling speed is encoded in the least significant nible of I8. The
 606      * LSB selects the clock source (0=24.576 MHz, 1=16.9344 Mhz) and other
 607      * three bits select the divisor (indirectly):
 608      *
 609      * The available speeds are in the following table. Keep the speeds in
 610      * the increasing order.
 611    */
 612   typedef struct
 613   {
 614     int             speed;
 615     unsigned char   bits;
 616   }
 617   speed_struct;
 618 
 619   static speed_struct speed_table[] =
 620   {
 621     {5510, (0 << 1) | 1},
 622     {5510, (0 << 1) | 1},
 623     {6620, (7 << 1) | 1},
 624     {8000, (0 << 1) | 0},
 625     {9600, (7 << 1) | 0},
 626     {11025, (1 << 1) | 1},
 627     {16000, (1 << 1) | 0},
 628     {18900, (2 << 1) | 1},
 629     {22050, (3 << 1) | 1},
 630     {27420, (2 << 1) | 0},
 631     {32000, (3 << 1) | 0},
 632     {33075, (6 << 1) | 1},
 633     {37800, (4 << 1) | 1},
 634     {44100, (5 << 1) | 1},
 635     {48000, (6 << 1) | 0}
 636   };
 637 
 638   int             i, n, selected = -1;
 639 
 640   n = sizeof (speed_table) / sizeof (speed_struct);
 641 
 642   if (devc->mode == MD_1845)    /* AD1845 has different timer than others */
 643     {
 644       if (arg < 4000)
 645         arg = 4000;
 646       if (arg > 50000)
 647         arg = 50000;
 648 
 649       devc->speed = arg;
 650       devc->speed_bits = speed_table[3].bits;
 651       return devc->speed;
 652     }
 653 
 654   if (arg < speed_table[0].speed)
 655     selected = 0;
 656   if (arg > speed_table[n - 1].speed)
 657     selected = n - 1;
 658 
 659   for (i = 1 /*really */ ; selected == -1 && i < n; i++)
 660     if (speed_table[i].speed == arg)
 661       selected = i;
 662     else if (speed_table[i].speed > arg)
 663       {
 664         int             diff1, diff2;
 665 
 666         diff1 = arg - speed_table[i - 1].speed;
 667         diff2 = speed_table[i].speed - arg;
 668 
 669         if (diff1 < diff2)
 670           selected = i - 1;
 671         else
 672           selected = i;
 673       }
 674 
 675   if (selected == -1)
 676     {
 677       printk ("ad1848: Can't find speed???\n");
 678       selected = 3;
 679     }
 680 
 681   devc->speed = speed_table[selected].speed;
 682   devc->speed_bits = speed_table[selected].bits;
 683   return devc->speed;
 684 }
 685 
 686 static int
 687 set_channels (ad1848_info * devc, int arg)
     /* [previous][next][first][last][top][bottom][index][help] */
 688 {
 689   if (arg != 1 && arg != 2)
 690     return devc->channels;
 691 
 692   devc->channels = arg;
 693   return arg;
 694 }
 695 
 696 static int
 697 set_format (ad1848_info * devc, int arg)
     /* [previous][next][first][last][top][bottom][index][help] */
 698 {
 699 
 700   static struct format_tbl
 701   {
 702     int             format;
 703     unsigned char   bits;
 704   }
 705   format2bits[] =
 706   {
 707     {
 708       0, 0
 709     }
 710     ,
 711     {
 712       AFMT_MU_LAW, 1
 713     }
 714     ,
 715     {
 716       AFMT_A_LAW, 3
 717     }
 718     ,
 719     {
 720       AFMT_IMA_ADPCM, 5
 721     }
 722     ,
 723     {
 724       AFMT_U8, 0
 725     }
 726     ,
 727     {
 728       AFMT_S16_LE, 2
 729     }
 730     ,
 731     {
 732       AFMT_S16_BE, 6
 733     }
 734     ,
 735     {
 736       AFMT_S8, 0
 737     }
 738     ,
 739     {
 740       AFMT_U16_LE, 0
 741     }
 742     ,
 743     {
 744       AFMT_U16_BE, 0
 745     }
 746   };
 747   int             i, n = sizeof (format2bits) / sizeof (struct format_tbl);
 748 
 749   if (!(arg & ad_format_mask[devc->mode]))
 750     arg = AFMT_U8;
 751 
 752   devc->audio_format = arg;
 753 
 754   for (i = 0; i < n; i++)
 755     if (format2bits[i].format == arg)
 756       {
 757         if ((devc->format_bits = format2bits[i].bits) == 0)
 758           return devc->audio_format = AFMT_U8;  /* Was not supported */
 759 
 760         return arg;
 761       }
 762 
 763   /* Still hanging here. Something must be terribly wrong */
 764   devc->format_bits = 0;
 765   return devc->audio_format = AFMT_U8;
 766 }
 767 
 768 static int
 769 ad1848_ioctl (int dev, unsigned int cmd, caddr_t arg, int local)
     /* [previous][next][first][last][top][bottom][index][help] */
 770 {
 771   ad1848_info    *devc = (ad1848_info *) audio_devs[dev]->devc;
 772 
 773   switch (cmd)
 774     {
 775     case SOUND_PCM_WRITE_RATE:
 776       if (local)
 777         return set_speed (devc, (int) arg);
 778       return snd_ioctl_return ((int *) arg, set_speed (devc, get_fs_long ((long *) arg)));
 779 
 780     case SOUND_PCM_READ_RATE:
 781       if (local)
 782         return devc->speed;
 783       return snd_ioctl_return ((int *) arg, devc->speed);
 784 
 785     case SNDCTL_DSP_STEREO:
 786       if (local)
 787         return set_channels (devc, (int) arg + 1) - 1;
 788       return snd_ioctl_return ((int *) arg, set_channels (devc, get_fs_long ((long *) arg) + 1) - 1);
 789 
 790     case SOUND_PCM_WRITE_CHANNELS:
 791       if (local)
 792         return set_channels (devc, (int) arg);
 793       return snd_ioctl_return ((int *) arg, set_channels (devc, get_fs_long ((long *) arg)));
 794 
 795     case SOUND_PCM_READ_CHANNELS:
 796       if (local)
 797         return devc->channels;
 798       return snd_ioctl_return ((int *) arg, devc->channels);
 799 
 800     case SNDCTL_DSP_SAMPLESIZE:
 801       if (local)
 802         return set_format (devc, (int) arg);
 803       return snd_ioctl_return ((int *) arg, set_format (devc, get_fs_long ((long *) arg)));
 804 
 805     case SOUND_PCM_READ_BITS:
 806       if (local)
 807         return devc->audio_format;
 808       return snd_ioctl_return ((int *) arg, devc->audio_format);
 809 
 810     default:;
 811     }
 812   return -EINVAL;
 813 }
 814 
 815 static void
 816 ad1848_output_block (int dev, unsigned long buf, int count, int intrflag, int dma_restart)
     /* [previous][next][first][last][top][bottom][index][help] */
 817 {
 818   unsigned long   flags, cnt;
 819   ad1848_info    *devc = (ad1848_info *) audio_devs[dev]->devc;
 820 
 821   cnt = count;
 822 
 823   if (devc->audio_format == AFMT_IMA_ADPCM)
 824     {
 825       cnt /= 4;
 826     }
 827   else
 828     {
 829       if (devc->audio_format & (AFMT_S16_LE | AFMT_S16_BE))     /* 16 bit data */
 830         cnt >>= 1;
 831     }
 832   if (devc->channels > 1)
 833     cnt >>= 1;
 834   cnt--;
 835 
 836   if (devc->irq_mode & PCM_ENABLE_OUTPUT && audio_devs[dev]->flags & DMA_AUTOMODE &&
 837       intrflag &&
 838       cnt == devc->xfer_count)
 839     {
 840       devc->irq_mode |= PCM_ENABLE_OUTPUT;
 841       devc->intr_active = 1;
 842       return;                   /*
 843                                  * Auto DMA mode on. No need to react
 844                                  */
 845     }
 846   save_flags (flags);
 847   cli ();
 848 
 849   if (dma_restart)
 850     {
 851       ad_write (devc, 9, ad_read (devc, 9) & ~0x01);    /* Playback disable */
 852       /* ad1848_halt (dev); */
 853       DMAbuf_start_dma (dev, buf, count, DMA_MODE_WRITE);
 854     }
 855 
 856   ad_write (devc, 15, (unsigned char) (cnt & 0xff));
 857   ad_write (devc, 14, (unsigned char) ((cnt >> 8) & 0xff));
 858 
 859   ad_unmute (devc);
 860 
 861   devc->xfer_count = cnt;
 862   devc->irq_mode |= PCM_ENABLE_OUTPUT;
 863   devc->intr_active = 1;
 864   restore_flags (flags);
 865 }
 866 
 867 static void
 868 ad1848_start_input (int dev, unsigned long buf, int count, int intrflag, int dma_restart)
     /* [previous][next][first][last][top][bottom][index][help] */
 869 {
 870   unsigned long   flags, cnt;
 871   ad1848_info    *devc = (ad1848_info *) audio_devs[dev]->devc;
 872 
 873   cnt = count;
 874   if (devc->audio_format == AFMT_IMA_ADPCM)
 875     {
 876       cnt /= 4;
 877     }
 878   else
 879     {
 880       if (devc->audio_format & (AFMT_S16_LE | AFMT_S16_BE))     /* 16 bit data */
 881         cnt >>= 1;
 882     }
 883   if (devc->channels > 1)
 884     cnt >>= 1;
 885   cnt--;
 886 
 887   if (devc->irq_mode & PCM_ENABLE_INPUT && audio_devs[dev]->flags & DMA_AUTOMODE &&
 888       intrflag &&
 889       cnt == devc->xfer_count)
 890     {
 891       devc->irq_mode |= PCM_ENABLE_INPUT;
 892       devc->intr_active = 1;
 893       return;                   /*
 894                                  * Auto DMA mode on. No need to react
 895                                  */
 896     }
 897   save_flags (flags);
 898   cli ();
 899 
 900   if (dma_restart)
 901     {
 902       /* ad1848_halt (dev); */
 903       ad_write (devc, 9, ad_read (devc, 9) & ~0x02);    /* Capture disable */
 904       DMAbuf_start_dma (dev, buf, count, DMA_MODE_READ);
 905     }
 906 
 907   if (devc->mode == MD_1848 || !devc->dual_dma)         /* Single DMA channel mode */
 908     {
 909       ad_write (devc, 15, (unsigned char) (cnt & 0xff));
 910       ad_write (devc, 14, (unsigned char) ((cnt >> 8) & 0xff));
 911     }
 912   else
 913     /* Dual DMA channel mode */
 914     {
 915       ad_write (devc, 31, (unsigned char) (cnt & 0xff));
 916       ad_write (devc, 30, (unsigned char) ((cnt >> 8) & 0xff));
 917     }
 918 
 919   ad_unmute (devc);
 920 
 921   devc->xfer_count = cnt;
 922   devc->irq_mode |= PCM_ENABLE_INPUT;
 923   devc->intr_active = 1;
 924   restore_flags (flags);
 925 }
 926 
 927 static int
 928 ad1848_prepare_for_IO (int dev, int bsize, int bcount)
     /* [previous][next][first][last][top][bottom][index][help] */
 929 {
 930   int             timeout;
 931   unsigned char   fs, old_fs;
 932   unsigned long   flags;
 933   ad1848_info    *devc = (ad1848_info *) audio_devs[dev]->devc;
 934 
 935   if (devc->irq_mode)
 936     return 0;
 937 
 938   save_flags (flags);
 939   cli ();
 940   fs = devc->speed_bits | (devc->format_bits << 5);
 941 
 942   if (devc->channels > 1)
 943     fs |= 0x10;
 944 
 945   if (devc->mode == MD_1845)    /* Use alternate speed select registers */
 946     {
 947       fs &= 0xf0;               /* Mask off the rate select bits */
 948 
 949       ad_write (devc, 22, (devc->speed >> 8) & 0xff);   /* Speed MSB */
 950       ad_write (devc, 23, devc->speed & 0xff);  /* Speed LSB */
 951     }
 952 
 953   old_fs = ad_read (devc, 8);
 954 
 955   if (fs == old_fs)             /* No change */
 956     {
 957       restore_flags (flags);
 958       devc->xfer_count = 0;
 959       return 0;
 960     }
 961 
 962   ad_enter_MCE (devc);          /* Enables changes to the format select reg */
 963 
 964   ad_write (devc, 8, fs);
 965   /*
 966    * Write to I8 starts resyncronization. Wait until it completes.
 967    */
 968   timeout = 10000;
 969   while (timeout > 0 && inb (devc->base) == 0x80)
 970     timeout--;
 971 
 972   /*
 973      * If mode == 2 (CS4231), set I28 also. It's the capture format register.
 974    */
 975   if (devc->mode != MD_1848)
 976     {
 977       ad_write (devc, 28, fs);
 978 
 979       /*
 980          * Write to I28 starts resyncronization. Wait until it completes.
 981        */
 982       timeout = 10000;
 983       while (timeout > 0 && inb (devc->base) == 0x80)
 984         timeout--;
 985 
 986     }
 987 
 988   ad_leave_MCE (devc);          /*
 989                                  * Starts the calibration process.
 990                                  */
 991   restore_flags (flags);
 992   devc->xfer_count = 0;
 993 
 994 #ifdef CONFIG_SEQUENCER
 995   if (dev == timer_installed && devc->timer_running)
 996     if ((fs & 0x01) != (old_fs & 0x01))
 997       {
 998         ad1848_tmr_reprogram (dev);
 999       }
1000 #endif
1001   return 0;
1002 }
1003 
1004 static void
1005 ad1848_reset (int dev)
     /* [previous][next][first][last][top][bottom][index][help] */
1006 {
1007   ad1848_halt (dev);
1008 }
1009 
1010 static void
1011 ad1848_halt (int dev)
     /* [previous][next][first][last][top][bottom][index][help] */
1012 {
1013   ad1848_info    *devc = (ad1848_info *) audio_devs[dev]->devc;
1014   unsigned long   flags;
1015   int             timeout;
1016 
1017 
1018   save_flags (flags);
1019   cli ();
1020 
1021   ad_mute (devc);
1022   ad_enter_MCE (devc);
1023   ad_write (devc, 9, ad_read (devc, 9) & ~0x03);        /* Stop DMA */
1024   ad_write (devc, 9, ad_read (devc, 9) & ~0x03);        /* Stop DMA */
1025 
1026   ad_write (devc, 15, 4);       /* Clear DMA counter */
1027   ad_write (devc, 14, 0);       /* Clear DMA counter */
1028 
1029   if (devc->mode != MD_1848)
1030     {
1031       ad_write (devc, 30, 4);   /* Clear DMA counter */
1032       ad_write (devc, 31, 0);   /* Clear DMA counter */
1033     }
1034 
1035   for (timeout = 0; timeout < 10000 && !(inb (io_Status (devc)) & 0x80);
1036        timeout++);              /* Wait for interrupt */
1037 
1038   ad_write (devc, 9, ad_read (devc, 9) & ~0x03);        /* Stop DMA */
1039   outb (0, io_Status (devc));   /* Clear interrupt status */
1040   outb (0, io_Status (devc));   /* Clear interrupt status */
1041   devc->irq_mode = 0;
1042   ad_leave_MCE (devc);
1043 
1044   /* DMAbuf_reset_dma (dev); */
1045   restore_flags (flags);
1046 }
1047 
1048 static void
1049 ad1848_halt_input (int dev)
     /* [previous][next][first][last][top][bottom][index][help] */
1050 {
1051   ad1848_info    *devc = (ad1848_info *) audio_devs[dev]->devc;
1052   unsigned long   flags;
1053 
1054   if (devc->mode == MD_1848)
1055     {
1056       ad1848_halt (dev);
1057       return;
1058     }
1059 
1060   save_flags (flags);
1061   cli ();
1062 
1063   ad_mute (devc);
1064   ad_write (devc, 9, ad_read (devc, 9) & ~0x02);        /* Stop capture */
1065 
1066 
1067   outb (0, io_Status (devc));   /* Clear interrupt status */
1068   outb (0, io_Status (devc));   /* Clear interrupt status */
1069 
1070   devc->irq_mode &= ~PCM_ENABLE_INPUT;
1071 
1072   restore_flags (flags);
1073 }
1074 
1075 static void
1076 ad1848_halt_output (int dev)
     /* [previous][next][first][last][top][bottom][index][help] */
1077 {
1078   ad1848_info    *devc = (ad1848_info *) audio_devs[dev]->devc;
1079   unsigned long   flags;
1080 
1081   if (devc->mode == MD_1848)
1082     {
1083       ad1848_halt (dev);
1084       return;
1085     }
1086 
1087   save_flags (flags);
1088   cli ();
1089 
1090   ad_mute (devc);
1091   ad_write (devc, 9, ad_read (devc, 9) & ~0x01);        /* Stop playback */
1092 
1093 
1094   outb (0, io_Status (devc));   /* Clear interrupt status */
1095   outb (0, io_Status (devc));   /* Clear interrupt status */
1096 
1097   devc->irq_mode &= ~PCM_ENABLE_OUTPUT;
1098 
1099   restore_flags (flags);
1100 }
1101 
1102 static void
1103 ad1848_trigger (int dev, int state)
     /* [previous][next][first][last][top][bottom][index][help] */
1104 {
1105   ad1848_info    *devc = (ad1848_info *) audio_devs[dev]->devc;
1106   unsigned long   flags;
1107   unsigned char   tmp;
1108 
1109   save_flags (flags);
1110   cli ();
1111   state &= devc->irq_mode;
1112 
1113   tmp = ad_read (devc, 9) & ~0x03;
1114   if (state & PCM_ENABLE_INPUT)
1115     tmp |= 0x02;
1116   if (state & PCM_ENABLE_OUTPUT)
1117     tmp |= 0x01;
1118   ad_write (devc, 9, tmp);
1119 
1120   restore_flags (flags);
1121 }
1122 
1123 int
1124 ad1848_detect (int io_base, int *ad_flags, int *osp)
     /* [previous][next][first][last][top][bottom][index][help] */
1125 {
1126 
1127   unsigned char   tmp;
1128   int             i;
1129   ad1848_info    *devc = &dev_info[nr_ad1848_devs];
1130   unsigned char   tmp1 = 0xff, tmp2 = 0xff;
1131 
1132   DDB (printk ("ad1848_detect(%x)\n", io_base));
1133 
1134   if (ad_flags)
1135     *ad_flags = 0;
1136 
1137   if (nr_ad1848_devs >= MAX_AUDIO_DEV)
1138     {
1139       DDB (printk ("ad1848 detect error - step 0\n"));
1140       return 0;
1141     }
1142   if (check_region (io_base, 4))
1143     {
1144       printk ("\n\nad1848.c: Port %x not free.\n\n", io_base);
1145       return 0;
1146     }
1147 
1148   devc->base = io_base;
1149   devc->irq_ok = 0;
1150   devc->timer_running = 0;
1151   devc->MCE_bit = 0x40;
1152   devc->irq = 0;
1153   devc->opened = 0;
1154   devc->chip_name = "AD1848";
1155   devc->mode = MD_1848;         /* AD1848 or CS4248 */
1156   devc->osp = osp;
1157   devc->debug_flag = 0;
1158 
1159   /*
1160      * Check that the I/O address is in use.
1161      *
1162      * The bit 0x80 of the base I/O port is known to be 0 after the
1163      * chip has performed it's power on initialization. Just assume
1164      * this has happened before the OS is starting.
1165      *
1166      * If the I/O address is unused, it typically returns 0xff.
1167    */
1168 
1169   DDB (printk ("ad1848_detect() - step A\n"));
1170   if ((inb (devc->base) & 0x80) != 0x00)        /* Not a AD1848 */
1171     {
1172       DDB (printk ("ad1848 detect error - step A (%02x)\n",
1173                    inb (devc->base)));
1174       return 0;
1175     }
1176 
1177   /*
1178      * Test if it's possible to change contents of the indirect registers.
1179      * Registers 0 and 1 are ADC volume registers. The bit 0x10 is read only
1180      * so try to avoid using it.
1181    */
1182 
1183   DDB (printk ("ad1848_detect() - step B\n"));
1184   ad_write (devc, 0, 0xaa);
1185   ad_write (devc, 1, 0x45);     /* 0x55 with bit 0x10 clear */
1186 
1187   if ((tmp1 = ad_read (devc, 0)) != 0xaa || (tmp2 = ad_read (devc, 1)) != 0x45)
1188     {
1189       DDB (printk ("ad1848 detect error - step B (%x/%x)\n", tmp1, tmp2));
1190       return 0;
1191     }
1192 
1193   DDB (printk ("ad1848_detect() - step C\n"));
1194   ad_write (devc, 0, 0x45);
1195   ad_write (devc, 1, 0xaa);
1196 
1197   if ((tmp1 = ad_read (devc, 0)) != 0x45 || (tmp2 = ad_read (devc, 1)) != 0xaa)
1198     {
1199       DDB (printk ("ad1848 detect error - step C (%x/%x)\n", tmp1, tmp2));
1200       return 0;
1201     }
1202 
1203   /*
1204      * The indirect register I12 has some read only bits. Lets
1205      * try to change them.
1206    */
1207 
1208   DDB (printk ("ad1848_detect() - step D\n"));
1209   tmp = ad_read (devc, 12);
1210   ad_write (devc, 12, (~tmp) & 0x0f);
1211 
1212   if ((tmp & 0x0f) != ((tmp1 = ad_read (devc, 12)) & 0x0f))
1213     {
1214       DDB (printk ("ad1848 detect error - step D (%x)\n", tmp1));
1215       return 0;
1216     }
1217 
1218   /*
1219      * NOTE! Last 4 bits of the reg I12 tell the chip revision.
1220      *   0x01=RevB and 0x0A=RevC.
1221    */
1222 
1223   /*
1224      * The original AD1848/CS4248 has just 15 indirect registers. This means
1225      * that I0 and I16 should return the same value (etc.).
1226      * Ensure that the Mode2 enable bit of I12 is 0. Otherwise this test fails
1227      * with CS4231.
1228    */
1229 
1230   DDB (printk ("ad1848_detect() - step F\n"));
1231   ad_write (devc, 12, 0);       /* Mode2=disabled */
1232 
1233   for (i = 0; i < 16; i++)
1234     if ((tmp1 = ad_read (devc, i)) != (tmp2 = ad_read (devc, i + 16)))
1235       {
1236         DDB (printk ("ad1848 detect error - step F(%d/%x/%x)\n", i, tmp1, tmp2));
1237         return 0;
1238       }
1239 
1240   /*
1241      * Try to switch the chip to mode2 (CS4231) by setting the MODE2 bit (0x40).
1242      * The bit 0x80 is always 1 in CS4248 and CS4231.
1243    */
1244 
1245   DDB (printk ("ad1848_detect() - step G\n"));
1246   ad_write (devc, 12, 0x40);    /* Set mode2, clear 0x80 */
1247 
1248   tmp1 = ad_read (devc, 12);
1249   if (tmp1 & 0x80)
1250     {
1251       if (ad_flags)
1252         *ad_flags |= AD_F_CS4248;
1253 
1254       devc->chip_name = "CS4248";       /* Our best knowledge just now */
1255     }
1256 
1257   if ((tmp1 & 0xc0) == (0x80 | 0x40))
1258     {
1259       /*
1260          *      CS4231 detected - is it?
1261          *
1262          *      Verify that setting I0 doesn't change I16.
1263        */
1264       DDB (printk ("ad1848_detect() - step H\n"));
1265       ad_write (devc, 16, 0);   /* Set I16 to known value */
1266 
1267       ad_write (devc, 0, 0x45);
1268       if ((tmp1 = ad_read (devc, 16)) != 0x45)  /* No change -> CS4231? */
1269         {
1270 
1271           ad_write (devc, 0, 0xaa);
1272           if ((tmp1 = ad_read (devc, 16)) == 0xaa)      /* Rotten bits? */
1273             {
1274               DDB (printk ("ad1848 detect error - step H(%x)\n", tmp1));
1275               return 0;
1276             }
1277 
1278           /*
1279              * Verify that some bits of I25 are read only.
1280            */
1281 
1282           DDB (printk ("ad1848_detect() - step I\n"));
1283           tmp1 = ad_read (devc, 25);    /* Original bits */
1284           ad_write (devc, 25, ~tmp1);   /* Invert all bits */
1285           if ((ad_read (devc, 25) & 0xe7) == (tmp1 & 0xe7))
1286             {
1287               int             id;
1288 
1289               /*
1290                *      It's at least CS4231
1291                */
1292               devc->chip_name = "CS4231";
1293 
1294               devc->mode = MD_4231;
1295 
1296               /*
1297                * It could be an AD1845 or CS4231A as well.
1298                * CS4231 and AD1845 report the same revision info in I25
1299                * while the CS4231A reports different.
1300                */
1301 
1302               DDB (printk ("ad1848_detect() - step I\n"));
1303               id = ad_read (devc, 25) & 0xe7;
1304 
1305               switch (id)
1306                 {
1307 
1308                 case 0xa0:
1309                   devc->chip_name = "CS4231A";
1310                   devc->mode = MD_4231A;
1311                   break;
1312 
1313                 case 0xa2:
1314                   devc->chip_name = "CS4232";
1315                   devc->mode = MD_4232;
1316                   break;
1317 
1318                 case 0xb2:
1319                   devc->chip_name = "CS4232A";
1320                   devc->mode = MD_4232;
1321                   break;
1322 
1323                 case 0x80:
1324                   {
1325                     /* 
1326                      * It must be a CS4231 or AD1845. The register I23 of
1327                      * CS4231 is undefined and it appears to be read only.
1328                      * AD1845 uses I23 for setting sample rate. Assume
1329                      * the chip is AD1845 if I23 is changeable.
1330                      */
1331 
1332                     unsigned char   tmp = ad_read (devc, 23);
1333 
1334                     ad_write (devc, 23, ~tmp);
1335                     if (ad_read (devc, 23) != tmp)      /* AD1845 ? */
1336                       {
1337                         devc->chip_name = "AD1845";
1338                         devc->mode = MD_1845;
1339                       }
1340 
1341                     ad_write (devc, 23, tmp);   /* Restore */
1342                   }
1343                   break;
1344 
1345                 default:        /* Assume CS4231 */
1346                   devc->mode = MD_4231;
1347 
1348                 }
1349             }
1350           ad_write (devc, 25, tmp1);    /* Restore bits */
1351 
1352           DDB (printk ("ad1848_detect() - step K\n"));
1353         }
1354     }
1355 
1356   DDB (printk ("ad1848_detect() - step L\n"));
1357   if (ad_flags)
1358     {
1359       if (devc->mode != MD_1848)
1360         *ad_flags |= AD_F_CS4231;
1361     }
1362 
1363   DDB (printk ("ad1848_detect() - Detected OK\n"));
1364   return 1;
1365 }
1366 
1367 void
1368 ad1848_init (char *name, int io_base, int irq, int dma_playback, int dma_capture, int share_dma, int *osp)
     /* [previous][next][first][last][top][bottom][index][help] */
1369 {
1370   /*
1371      * NOTE! If irq < 0, there is another driver which has allocated the IRQ
1372      *   so that this driver doesn't need to allocate/deallocate it.
1373      *   The actually used IRQ is ABS(irq).
1374    */
1375 
1376   /*
1377      * Initial values for the indirect registers of CS4248/AD1848.
1378    */
1379   static int      init_values[] =
1380   {
1381     0xa8, 0xa8, 0x08, 0x08, 0x08, 0x08, 0x00, 0x00,
1382     0x00, 0x0c, 0x02, 0x00, 0x8a, 0x01, 0x00, 0x00,
1383 
1384   /* Positions 16 to 31 just for CS4231 */
1385     0x80, 0x00, 0x10, 0x10, 0x00, 0x00, 0x00, 0x00,
1386     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
1387   };
1388   int             i, my_dev;
1389 
1390   ad1848_info    *devc = &dev_info[nr_ad1848_devs];
1391 
1392   if (!ad1848_detect (io_base, NULL, osp))
1393     return;
1394 
1395   request_region (devc->base, 4, devc->chip_name);
1396 
1397   devc->irq = (irq > 0) ? irq : 0;
1398   devc->opened = 0;
1399   devc->timer_ticks = 0;
1400   devc->osp = osp;
1401 
1402   if (nr_ad1848_devs != 0)
1403     {
1404       memcpy ((char *) &ad1848_pcm_operations[nr_ad1848_devs],
1405               (char *) &ad1848_pcm_operations[0],
1406               sizeof (struct audio_operations));
1407     }
1408 
1409   for (i = 0; i < 16; i++)
1410     ad_write (devc, i, init_values[i]);
1411 
1412   ad_mute (devc);               /* Initialize some variables */
1413   ad_unmute (devc);             /* Leave it unmuted now */
1414 
1415   if (devc->mode > MD_1848)
1416     {
1417       if (dma_capture == dma_playback || dma_capture == -1 || dma_playback == -1)
1418         {
1419           ad_write (devc, 9, ad_read (devc, 9) | 0x04);         /* Single DMA mode */
1420           ad1848_pcm_operations[nr_ad1848_devs].flags &= ~DMA_DUPLEX;
1421         }
1422       else
1423         {
1424           ad_write (devc, 9, ad_read (devc, 9) & ~0x04);        /* Dual DMA mode */
1425           ad1848_pcm_operations[nr_ad1848_devs].flags |= DMA_DUPLEX;
1426         }
1427 
1428       ad_write (devc, 12, ad_read (devc, 12) | 0x40);   /* Mode2 = enabled */
1429       for (i = 16; i < 32; i++)
1430         ad_write (devc, i, init_values[i]);
1431 
1432 
1433       if (devc->mode == MD_1845)
1434         ad_write (devc, 27, ad_read (devc, 27) | 0x08);         /* Alternate freq select enabled */
1435     }
1436   else
1437     {
1438       ad1848_pcm_operations[nr_ad1848_devs].flags &= ~DMA_DUPLEX;
1439       ad_write (devc, 9, ad_read (devc, 9) | 0x04);     /* Single DMA mode */
1440     }
1441 
1442   outb (0, io_Status (devc));   /* Clear pending interrupts */
1443 
1444   if (name != NULL && name[0] != 0)
1445     sprintf (ad1848_pcm_operations[nr_ad1848_devs].name,
1446              "%s (%s)", name, devc->chip_name);
1447   else
1448     sprintf (ad1848_pcm_operations[nr_ad1848_devs].name,
1449              "Generic audio codec (%s)", devc->chip_name);
1450 
1451   conf_printf2 (ad1848_pcm_operations[nr_ad1848_devs].name,
1452                 devc->base, devc->irq, dma_playback, dma_capture);
1453 
1454   if (num_audiodevs < MAX_AUDIO_DEV)
1455     {
1456       audio_devs[my_dev = num_audiodevs++] = &ad1848_pcm_operations[nr_ad1848_devs];
1457       if (irq > 0)
1458         {
1459           audio_devs[my_dev]->devc = devc;
1460           irq2dev[irq] = devc->dev_no = my_dev;
1461           if (snd_set_irq_handler (devc->irq, ad1848_interrupt,
1462                                    audio_devs[my_dev]->name,
1463                                    devc->osp) < 0)
1464             {
1465               printk ("ad1848: IRQ in use\n");
1466             }
1467 
1468 #ifdef NO_IRQ_TEST
1469           if (devc->mode != MD_1848)
1470             {
1471               int             x;
1472               unsigned char   tmp = ad_read (devc, 16);
1473 
1474               devc->timer_ticks = 0;
1475 
1476               ad_write (devc, 21, 0x00);        /* Timer msb */
1477               ad_write (devc, 20, 0x10);        /* Timer lsb */
1478 
1479               ad_write (devc, 16, tmp | 0x40);  /* Enable timer */
1480               for (x = 0; x < 100000 && devc->timer_ticks == 0; x++);
1481               ad_write (devc, 16, tmp & ~0x40);         /* Disable timer */
1482 
1483               if (devc->timer_ticks == 0)
1484                 printk ("[IRQ conflict???]");
1485               else
1486                 devc->irq_ok = 1;
1487 
1488             }
1489           else
1490             devc->irq_ok = 1;   /* Couldn't test. assume it's OK */
1491 #else
1492           devc->irq_ok = 1;
1493 #endif
1494         }
1495       else if (irq < 0)
1496         irq2dev[-irq] = devc->dev_no = my_dev;
1497 
1498       audio_devs[my_dev]->dmachan1 = dma_playback;
1499       audio_devs[my_dev]->dmachan2 = dma_capture;
1500       audio_devs[my_dev]->buffsize = DSP_BUFFSIZE;
1501       audio_devs[my_dev]->devc = devc;
1502       audio_devs[my_dev]->format_mask = ad_format_mask[devc->mode];
1503       nr_ad1848_devs++;
1504 
1505 #ifdef CONFIG_SEQUENCER
1506       if (devc->mode != MD_1848 && devc->irq_ok)
1507         ad1848_tmr_install (my_dev);
1508 #endif
1509 
1510       if (!share_dma)
1511         {
1512           if (sound_alloc_dma (dma_playback, "Sound System"))
1513             printk ("ad1848.c: Can't allocate DMA%d\n", dma_playback);
1514 
1515           if (dma_capture != dma_playback)
1516             if (sound_alloc_dma (dma_capture, "Sound System (capture)"))
1517               printk ("ad1848.c: Can't allocate DMA%d\n", dma_capture);
1518         }
1519 
1520       /*
1521          * Toggle the MCE bit. It completes the initialization phase.
1522        */
1523 
1524       ad_enter_MCE (devc);      /* In case the bit was off */
1525       ad_leave_MCE (devc);
1526 
1527       if (num_mixers < MAX_MIXER_DEV)
1528         {
1529           mixer2codec[num_mixers] = my_dev + 1;
1530           audio_devs[my_dev]->mixer_dev = num_mixers;
1531           mixer_devs[num_mixers++] = &ad1848_mixer_operations;
1532           ad1848_mixer_reset (devc);
1533         }
1534     }
1535   else
1536     printk ("AD1848: Too many PCM devices available\n");
1537 }
1538 
1539 void
1540 ad1848_unload (int io_base, int irq, int dma_playback, int dma_capture, int share_dma)
     /* [previous][next][first][last][top][bottom][index][help] */
1541 {
1542   int             i, dev = 0;
1543   ad1848_info    *devc = NULL;
1544 
1545   for (i = 0; devc == NULL && i < nr_ad1848_devs; i++)
1546     if (dev_info[i].base == io_base)
1547       {
1548         devc = &dev_info[i];
1549         dev = devc->dev_no;
1550       }
1551 
1552   if (devc != NULL)
1553     {
1554       release_region (devc->base, 4);
1555 
1556       if (!share_dma)
1557         {
1558           if (irq > 0)
1559             snd_release_irq (devc->irq);
1560 
1561           sound_free_dma (audio_devs[dev]->dmachan1);
1562 
1563           if (audio_devs[dev]->dmachan2 != audio_devs[dev]->dmachan1)
1564             sound_free_dma (audio_devs[dev]->dmachan2);
1565         }
1566     }
1567   else
1568     printk ("ad1848: Can't find device to be undoaded. Base=%x\n",
1569             io_base);
1570 }
1571 
1572 void
1573 ad1848_interrupt (int irq, void *dev_id, struct pt_regs *dummy)
     /* [previous][next][first][last][top][bottom][index][help] */
1574 {
1575   unsigned char   status;
1576   ad1848_info    *devc;
1577   int             dev;
1578   int             alt_stat = 0xff;
1579 
1580   if (irq < 0 || irq > 15)
1581     {
1582       dev = -1;
1583     }
1584   else
1585     dev = irq2dev[irq];
1586 
1587   if (dev < 0 || dev >= num_audiodevs)
1588     {
1589       for (irq = 0; irq < 17; irq++)
1590         if (irq2dev[irq] != -1)
1591           break;
1592 
1593       if (irq > 15)
1594         {
1595           printk ("ad1848.c: Bogus interrupt %d\n", irq);
1596           return;
1597         }
1598 
1599       dev = irq2dev[irq];
1600       devc = (ad1848_info *) audio_devs[dev]->devc;
1601     }
1602   else
1603     devc = (ad1848_info *) audio_devs[dev]->devc;
1604 
1605   status = inb (io_Status (devc));
1606 
1607   if (status == 0x80)
1608     printk ("ad1848_interrupt: Why?\n");
1609 
1610   if (status & 0x01)
1611     {
1612 
1613       if (devc->mode != MD_1848)
1614         alt_stat = ad_read (devc, 24);
1615 
1616       if (devc->opened && devc->irq_mode & PCM_ENABLE_INPUT && alt_stat & 0x20)
1617         {
1618           DMAbuf_inputintr (dev);
1619         }
1620 
1621       if (devc->opened && devc->irq_mode & PCM_ENABLE_OUTPUT &&
1622           alt_stat & 0x10)
1623         {
1624           DMAbuf_outputintr (dev, 1);
1625         }
1626 
1627       if (devc->mode != MD_1848 && alt_stat & 0x40)     /* Timer interrupt */
1628         {
1629           devc->timer_ticks++;
1630 #ifdef CONFIG_SEQUENCER
1631           if (timer_installed == dev && devc->timer_running)
1632             sound_timer_interrupt ();
1633 #endif
1634         }
1635     }
1636 
1637   if (devc->mode != MD_1848)
1638     ad_write (devc, 24, ad_read (devc, 24) & ~alt_stat);        /* Selective ack */
1639   else
1640     outb (0, io_Status (devc)); /* Clear interrupt status */
1641 }
1642 
1643 /*
1644  * Some extra code for the MS Sound System
1645  */
1646 
1647 void
1648 check_opl3 (int base, struct address_info *hw_config)
     /* [previous][next][first][last][top][bottom][index][help] */
1649 {
1650 
1651 #ifdef CONFIG_YM3812
1652   if (check_region (base, 4))
1653     {
1654       printk ("\n\nopl3.c: I/O port %x already in use\n\n", base);
1655       return;
1656     }
1657 
1658   if (!opl3_detect (base, hw_config->osp))
1659     return;
1660 
1661   opl3_init (0, base, hw_config->osp);
1662   request_region (base, 4, "OPL3/OPL2");
1663 #endif
1664 }
1665 
1666 int
1667 probe_ms_sound (struct address_info *hw_config)
     /* [previous][next][first][last][top][bottom][index][help] */
1668 {
1669   unsigned char   tmp;
1670 
1671   DDB (printk ("Entered probe_ms_sound(%x, %d)\n", hw_config->io_base, hw_config->card_subtype));
1672 
1673   if (check_region (hw_config->io_base, 8))
1674     {
1675       printk ("MSS: I/O port conflict\n");
1676       return 0;
1677     }
1678 
1679   if (hw_config->card_subtype == 1)     /* Has no IRQ/DMA registers */
1680     {
1681       /* check_opl3(0x388, hw_config); */
1682       return ad1848_detect (hw_config->io_base + 4, NULL, hw_config->osp);
1683     }
1684 
1685   /*
1686      * Check if the IO port returns valid signature. The original MS Sound
1687      * system returns 0x04 while some cards (AudioTriX Pro for example)
1688      * return 0x00 or 0x0f.
1689    */
1690 
1691   if ((tmp = inb (hw_config->io_base + 3)) == 0xff)     /* Bus float */
1692     {
1693       int             ret;
1694 
1695       DDB (printk ("I/O address is inactive (%x)\n", tmp));
1696       if (!(ret = ad1848_detect (hw_config->io_base + 4, NULL, hw_config->osp)))
1697         return 0;
1698       return 1;
1699     }
1700   if ((tmp & 0x3f) != 0x04 &&
1701       (tmp & 0x3f) != 0x0f &&
1702       (tmp & 0x3f) != 0x00)
1703     {
1704       int             ret;
1705 
1706       DDB (printk ("No MSS signature detected on port 0x%x (0x%x)\n",
1707                    hw_config->io_base, inb (hw_config->io_base + 3)));
1708       DDB (printk ("Trying to detect codec anyway but IRQ/DMA may not work\n"));
1709       if (!(ret = ad1848_detect (hw_config->io_base + 4, NULL, hw_config->osp)))
1710         return 0;
1711 
1712       return 1;
1713     }
1714 
1715   if (hw_config->irq > 11)
1716     {
1717       printk ("MSS: Bad IRQ %d\n", hw_config->irq);
1718       return 0;
1719     }
1720 
1721   if (hw_config->dma != 0 && hw_config->dma != 1 && hw_config->dma != 3)
1722     {
1723       printk ("MSS: Bad DMA %d\n", hw_config->dma);
1724       return 0;
1725     }
1726 
1727   /*
1728      * Check that DMA0 is not in use with a 8 bit board.
1729    */
1730 
1731   if (hw_config->dma == 0 && inb (hw_config->io_base + 3) & 0x80)
1732     {
1733       printk ("MSS: Can't use DMA0 with a 8 bit card/slot\n");
1734       return 0;
1735     }
1736 
1737   if (hw_config->irq > 7 && hw_config->irq != 9 && inb (hw_config->io_base + 3) & 0x80)
1738     {
1739       printk ("MSS: Can't use IRQ%d with a 8 bit card/slot\n", hw_config->irq);
1740       return 0;
1741     }
1742 
1743   return ad1848_detect (hw_config->io_base + 4, NULL, hw_config->osp);
1744 }
1745 
1746 long
1747 attach_ms_sound (long mem_start, struct address_info *hw_config)
     /* [previous][next][first][last][top][bottom][index][help] */
1748 {
1749   static char     interrupt_bits[12] =
1750   {
1751     -1, -1, -1, -1, -1, -1, -1, 0x08, -1, 0x10, 0x18, 0x20
1752   };
1753   char            bits;
1754 
1755   static char     dma_bits[4] =
1756   {
1757     1, 2, 0, 3
1758   };
1759 
1760   int             config_port = hw_config->io_base + 0;
1761   int             version_port = hw_config->io_base + 3;
1762 
1763   if (!ad1848_detect (hw_config->io_base + 4, NULL, hw_config->osp))
1764     return mem_start;
1765 
1766   if (hw_config->card_subtype == 1)     /* Has no IRQ/DMA registers */
1767     {
1768       ad1848_init ("MS Sound System", hw_config->io_base + 4,
1769                    hw_config->irq,
1770                    hw_config->dma,
1771                    hw_config->dma2, 0, hw_config->osp);
1772       request_region (hw_config->io_base, 4, "WSS config");
1773       return mem_start;
1774     }
1775 
1776   /*
1777      * Set the IRQ and DMA addresses.
1778    */
1779 
1780   bits = interrupt_bits[hw_config->irq];
1781   if (bits == -1)
1782     return mem_start;
1783 
1784   outb (bits | 0x40, config_port);
1785   if ((inb (version_port) & 0x40) == 0)
1786     printk ("[IRQ Conflict?]");
1787 
1788   outb (bits | dma_bits[hw_config->dma], config_port);  /* Write IRQ+DMA setup */
1789 
1790   ad1848_init ("MS Sound System", hw_config->io_base + 4,
1791                hw_config->irq,
1792                hw_config->dma,
1793                hw_config->dma, 0, hw_config->osp);
1794   request_region (hw_config->io_base, 4, "WSS config");
1795   return mem_start;
1796 }
1797 
1798 void
1799 unload_ms_sound (struct address_info *hw_config)
     /* [previous][next][first][last][top][bottom][index][help] */
1800 {
1801   ad1848_unload (hw_config->io_base + 4,
1802                  hw_config->irq,
1803                  hw_config->dma,
1804                  hw_config->dma, 0);
1805   release_region (hw_config->io_base, 4);
1806 }
1807 
1808 /*
1809  * WSS compatible PnP codec support
1810  */
1811 
1812 int
1813 probe_pnp_ad1848 (struct address_info *hw_config)
     /* [previous][next][first][last][top][bottom][index][help] */
1814 {
1815   return ad1848_detect (hw_config->io_base, NULL, hw_config->osp);
1816 }
1817 
1818 long
1819 attach_pnp_ad1848 (long mem_start, struct address_info *hw_config)
     /* [previous][next][first][last][top][bottom][index][help] */
1820 {
1821 
1822   ad1848_init (hw_config->name, hw_config->io_base,
1823                hw_config->irq,
1824                hw_config->dma,
1825                hw_config->dma2, 0, hw_config->osp);
1826   return mem_start;
1827 }
1828 
1829 void
1830 unload_pnp_ad1848 (struct address_info *hw_config)
     /* [previous][next][first][last][top][bottom][index][help] */
1831 {
1832   ad1848_unload (hw_config->io_base,
1833                  hw_config->irq,
1834                  hw_config->dma,
1835                  hw_config->dma2, 0);
1836   release_region (hw_config->io_base, 4);
1837 }
1838 
1839 #ifdef CONFIG_SEQUENCER
1840 /*
1841  * Timer stuff (for /dev/music).
1842  */
1843 
1844 static unsigned int current_interval = 0;
1845 
1846 static unsigned int
1847 ad1848_tmr_start (int dev, unsigned int usecs)
     /* [previous][next][first][last][top][bottom][index][help] */
1848 {
1849   unsigned long   flags;
1850   ad1848_info    *devc = (ad1848_info *) audio_devs[dev]->devc;
1851   unsigned long   xtal_nsecs;   /* nanoseconds per xtal oscillaror tick */
1852   unsigned long   divider;
1853 
1854   save_flags (flags);
1855   cli ();
1856 
1857 /*
1858  * Length of the timer interval (in nanoseconds) depends on the
1859  * selected crystal oscillator. Check this from bit 0x01 of I8.
1860  *
1861  * AD1845 has just one oscillator which has cycle time of 10.050 us
1862  * (when a 24.576 MHz xtal oscillator is used).
1863  *
1864  * Convert requested interval to nanoseconds before computing
1865  * the timer divider.
1866  */
1867 
1868   if (devc->mode == MD_1845)
1869     xtal_nsecs = 10050;
1870   else if (ad_read (devc, 8) & 0x01)
1871     xtal_nsecs = 9920;
1872   else
1873     xtal_nsecs = 9969;
1874 
1875   divider = (usecs * 1000 + xtal_nsecs / 2) / xtal_nsecs;
1876 
1877   if (divider < 100)            /* Don't allow shorter intervals than about 1ms */
1878     divider = 100;
1879 
1880   if (divider > 65535)          /* Overflow check */
1881     divider = 65535;
1882 
1883   ad_write (devc, 21, (divider >> 8) & 0xff);   /* Set upper bits */
1884   ad_write (devc, 20, divider & 0xff);  /* Set lower bits */
1885   ad_write (devc, 16, ad_read (devc, 16) | 0x40);       /* Start the timer */
1886   devc->timer_running = 1;
1887   restore_flags (flags);
1888 
1889   return current_interval = (divider * xtal_nsecs + 500) / 1000;
1890 }
1891 
1892 static void
1893 ad1848_tmr_reprogram (int dev)
     /* [previous][next][first][last][top][bottom][index][help] */
1894 {
1895 /*
1896  *    Audio driver has changed sampling rate so that a different xtal
1897  *      oscillator was selected. We have to reprogram the timer rate.
1898  */
1899 
1900   ad1848_tmr_start (dev, current_interval);
1901   sound_timer_syncinterval (current_interval);
1902 }
1903 
1904 static void
1905 ad1848_tmr_disable (int dev)
     /* [previous][next][first][last][top][bottom][index][help] */
1906 {
1907   unsigned long   flags;
1908   ad1848_info    *devc = (ad1848_info *) audio_devs[dev]->devc;
1909 
1910   save_flags (flags);
1911   cli ();
1912   ad_write (devc, 16, ad_read (devc, 16) & ~0x40);
1913   devc->timer_running = 0;
1914   restore_flags (flags);
1915 }
1916 
1917 static void
1918 ad1848_tmr_restart (int dev)
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1919 {
1920   unsigned long   flags;
1921   ad1848_info    *devc = (ad1848_info *) audio_devs[dev]->devc;
1922 
1923   if (current_interval == 0)
1924     return;
1925 
1926   save_flags (flags);
1927   cli ();
1928   ad_write (devc, 16, ad_read (devc, 16) | 0x40);
1929   devc->timer_running = 1;
1930   restore_flags (flags);
1931 }
1932 
1933 static struct sound_lowlev_timer ad1848_tmr =
1934 {
1935   0,
1936   ad1848_tmr_start,
1937   ad1848_tmr_disable,
1938   ad1848_tmr_restart
1939 };
1940 
1941 static int
1942 ad1848_tmr_install (int dev)
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1943 {
1944 
1945   if (timer_installed != -1)
1946     return 0;                   /* Don't install another timer */
1947 
1948   timer_installed = ad1848_tmr.dev = dev;
1949   sound_timer_init (&ad1848_tmr, audio_devs[dev]->name);
1950 
1951   return 1;
1952 }
1953 #endif
1954 #endif

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