taglinefilesource code
QIC02_CTL_PORT460drivers/char/tpqic02.coutb_p(ctlbits, QIC02_CTL_PORT);
QIC02_CTL_PORT464drivers/char/tpqic02.coutb_p(ctlbits, QIC02_CTL_PORT);
QIC02_CTL_PORT469drivers/char/tpqic02.coutb_p(ctlbits, QIC02_CTL_PORT);
QIC02_CTL_PORT622drivers/char/tpqic02.coutb_p(ctlbits & ~MTN_QIC02_CTL_RESET_NOT, QIC02_CTL_PORT);
QIC02_CTL_PORT624drivers/char/tpqic02.coutb_p(ctlbits | QIC02_CTL_RESET, QIC02_CTL_PORT);
QIC02_CTL_PORT639drivers/char/tpqic02.coutb_p(ctlbits | MTN_QIC02_CTL_RESET_NOT, QIC02_CTL_PORT);
QIC02_CTL_PORT641drivers/char/tpqic02.coutb_p(ctlbits & ~QIC02_CTL_RESET, QIC02_CTL_PORT);
QIC02_CTL_PORT686drivers/char/tpqic02.coutb_p(ctlbits | QIC02_CTL_REQUEST, QIC02_CTL_PORT);  /* set request bit */
QIC02_CTL_PORT700drivers/char/tpqic02.coutb_p(ctlbits & ~QIC02_CTL_REQUEST, QIC02_CTL_PORT); /* reset request bit */
QIC02_CTL_PORT896drivers/char/tpqic02.coutb_p(ctlbits | QIC02_CTL_REQUEST, QIC02_CTL_PORT);  /* set request */
QIC02_CTL_PORT902drivers/char/tpqic02.coutb_p(ctlbits & ~QIC02_CTL_REQUEST, QIC02_CTL_PORT);  /* un-set request */
QIC02_CTL_PORT1532drivers/char/tpqic02.coutb_p(WT_CTL_ONLINE, QIC02_CTL_PORT);  /* back to normal */
QIC02_CTL_PORT1536drivers/char/tpqic02.coutb_p(ctlbits, QIC02_CTL_PORT);
QIC02_CTL_PORT1546drivers/char/tpqic02.coutb_p(WT_CTL_DMA | WT_CTL_ONLINE, QIC02_CTL_PORT); /* trigger DMA transfer */
QIC02_CTL_PORT1549drivers/char/tpqic02.coutb_p(AR_CTL_IEN | AR_CTL_DNIEN, QIC02_CTL_PORT);  /* enable interrupts again */
QIC02_CTL_PORT1555drivers/char/tpqic02.coutb_p(ctlbits | (MTN_CTL_EXC_IEN | MTN_CTL_DNIEN), QIC02_CTL_PORT);
QIC02_CTL_PORT1703drivers/char/tpqic02.coutb_p(WT_CTL_ONLINE, QIC02_CTL_PORT);  /* back to normal */
QIC02_CTL_PORT1717drivers/char/tpqic02.coutb_p(ctlbits, QIC02_CTL_PORT);
QIC02_CTL_PORT2471drivers/char/tpqic02.cQIC02_CTL_PORT = QIC02_TAPE_PORT;
QIC02_CTL_PORT2507drivers/char/tpqic02.cQIC02_CTL_PORT = QIC02_TAPE_PORT+1;
QIC02_CTL_PORT2526drivers/char/tpqic02.cQIC02_CTL_PORT = QIC02_TAPE_PORT+1;