taglinefilesource code
mod_rev29arch/sparc/mm/mbus.cregister int mod_typ, mod_rev;
mod_rev50arch/sparc/mm/mbus.cmod_typ = impl; mod_rev = vers;
mod_rev54arch/sparc/mm/mbus.cif (mod_rev == 0x7) {
mod_rev81arch/sparc/mm/mbus.ccypress_rev = mod_rev;
mod_rev82arch/sparc/mm/mbus.cif(mod_rev == 0xe) {
mod_rev86arch/sparc/mm/mbus.cif(mod_rev == 0xd) {
mod_rev140arch/sparc/mm/mbus.c(((get_psr()>>0x18)&0xff)==0x41 && mod_typ==0 && mod_rev==0))) {
mod_rev141arch/sparc/mm/mbus.cif(((get_psr()>>0x18)&0xf)==0 && mod_rev==0) {
mod_rev150arch/sparc/mm/mbus.cif(mod_rev==1) {
mod_rev154arch/sparc/mm/mbus.cif (mod_rev<8)
mod_rev169arch/sparc/mm/mbus.cif((((get_psr()>>0x18)&0xff)==0x41) && (mod_typ || mod_rev)) {
mod_rev177arch/sparc/mm/mbus.cprintk("MMU_CREG: impl=%x vers=%x\n", mod_typ, mod_rev);
mod_rev1321arch/sparc/mm/srmmu.cvoid init_viking(unsigned long psr_vers, unsigned long mod_rev)
mod_rev1328arch/sparc/mm/srmmu.cif(!psr_vers && ! mod_rev) {
mod_rev1343arch/sparc/mm/srmmu.cif(mod_rev == 1) {
mod_rev1353arch/sparc/mm/srmmu.cif(mod_rev < 8)
mod_rev1376arch/sparc/mm/srmmu.cunsigned long mod_typ, mod_rev, psr_typ, psr_vers;
mod_rev1383arch/sparc/mm/srmmu.cmod_rev = (mreg & 0x0f000000) >> 24;
mod_rev1389arch/sparc/mm/srmmu.cswitch(mod_rev) {
mod_rev1402arch/sparc/mm/srmmu.cinit_cypress_605(mod_rev);
mod_rev1420arch/sparc/mm/srmmu.c((psr_vers == 1) && (mod_typ == 0) && (mod_rev == 0)))) {
mod_rev1421arch/sparc/mm/srmmu.cinit_viking(psr_vers, mod_rev);
mod_rev1426arch/sparc/mm/srmmu.cif(psr_typ == 4 && psr_vers == 1 && (mod_typ || mod_rev)) {