tag | line | file | source code |
mreg | 27 | arch/sparc/mm/mbus.c | register unsigned int mreg, vaddr; |
mreg | 35 | arch/sparc/mm/mbus.c | mreg = srmmu_get_mmureg(); |
mreg | 36 | arch/sparc/mm/mbus.c | impl = (mreg & SRMMU_CTREG_IMPL_MASK) >> SRMMU_CTREG_IMPL_SHIFT; |
mreg | 37 | arch/sparc/mm/mbus.c | vers = (mreg & SRMMU_CTREG_VERS_MASK) >> SRMMU_CTREG_VERS_SHIFT; |
mreg | 38 | arch/sparc/mm/mbus.c | syscntrl = (mreg & SRMMU_CTREG_SYSCNTRL_MASK) >> SRMMU_CTREG_SYSCNTRL_SHIFT; |
mreg | 39 | arch/sparc/mm/mbus.c | pso = (mreg & SRMMU_CTREG_PSO_MASK) >> SRMMU_CTREG_PSO_SHIFT; |
mreg | 40 | arch/sparc/mm/mbus.c | resv = (mreg & SRMMU_CTREG_RESV_MASK) >> SRMMU_CTREG_RESV_SHIFT; |
mreg | 41 | arch/sparc/mm/mbus.c | nofault = (mreg & SRMMU_CTREG_NOFAULT_MASK) >> SRMMU_CTREG_NOFAULT_SHIFT; |
mreg | 42 | arch/sparc/mm/mbus.c | enable = (mreg & SRMMU_CTREG_ENABLE_MASK) >> SRMMU_CTREG_ENABLE_SHIFT; |
mreg | 66 | arch/sparc/mm/mbus.c | mreg &= (~HYPERSPARC_CWENABLE); |
mreg | 67 | arch/sparc/mm/mbus.c | mreg &= (~HYPERSPARC_CMODE); |
mreg | 68 | arch/sparc/mm/mbus.c | mreg &= (~HYPERSPARC_WBENABLE); |
mreg | 69 | arch/sparc/mm/mbus.c | mreg |= (HYPERSPARC_CENABLE); |
mreg | 70 | arch/sparc/mm/mbus.c | srmmu_set_mmureg(mreg); |
mreg | 99 | arch/sparc/mm/mbus.c | mreg &= (~CYPRESS_CMODE); |
mreg | 100 | arch/sparc/mm/mbus.c | mreg |= (CYPRESS_CENABLE); |
mreg | 101 | arch/sparc/mm/mbus.c | srmmu_set_mmureg(mreg); |
mreg | 135 | arch/sparc/mm/mbus.c | mreg |= 0; |
mreg | 136 | arch/sparc/mm/mbus.c | srmmu_set_mmureg(mreg); |
mreg | 164 | arch/sparc/mm/mbus.c | mreg |= (VIKING_DCENABLE | VIKING_ICENABLE | VIKING_SBENABLE | |
mreg | 166 | arch/sparc/mm/mbus.c | srmmu_set_mmureg(mreg); |
mreg | 1163 | arch/sparc/mm/srmmu.c | unsigned long mreg = srmmu_get_mmureg(); |
mreg | 1166 | arch/sparc/mm/srmmu.c | if(mreg & HYPERSPARC_CSIZE) |
mreg | 1178 | arch/sparc/mm/srmmu.c | mreg &= ~(HYPERSPARC_CWENABLE | HYPERSPARC_CMODE | HYPERSPARC_WBENABLE); |
mreg | 1179 | arch/sparc/mm/srmmu.c | mreg |= HYPERSPARC_CENABLE; |
mreg | 1180 | arch/sparc/mm/srmmu.c | srmmu_set_mmureg(mreg); |
mreg | 1190 | arch/sparc/mm/srmmu.c | unsigned long mreg = srmmu_get_mmureg(); |
mreg | 1192 | arch/sparc/mm/srmmu.c | mreg &= ~CYPRESS_CMODE; |
mreg | 1193 | arch/sparc/mm/srmmu.c | mreg |= CYPRESS_CENABLE; |
mreg | 1194 | arch/sparc/mm/srmmu.c | srmmu_set_mmureg(mreg); |
mreg | 1229 | arch/sparc/mm/srmmu.c | unsigned long mreg = srmmu_get_mmureg(); |
mreg | 1278 | arch/sparc/mm/srmmu.c | mreg |= (SWIFT_IE | SWIFT_DE); /* I & D caches on */ |
mreg | 1288 | arch/sparc/mm/srmmu.c | mreg &= ~(SWIFT_BF); |
mreg | 1289 | arch/sparc/mm/srmmu.c | srmmu_set_mmureg(mreg); |
mreg | 1301 | arch/sparc/mm/srmmu.c | void init_tsunami(unsigned long mreg) |
mreg | 1312 | arch/sparc/mm/srmmu.c | mreg &= ~TSUNAMI_ITD; |
mreg | 1313 | arch/sparc/mm/srmmu.c | mreg |= (TSUNAMI_IENAB | TSUNAMI_DENAB); |
mreg | 1314 | arch/sparc/mm/srmmu.c | srmmu_set_mmureg(mreg); |
mreg | 1323 | arch/sparc/mm/srmmu.c | unsigned long mreg = srmmu_get_mmureg(); |
mreg | 1363 | arch/sparc/mm/srmmu.c | mreg |= (VIKING_DCENABLE | VIKING_ICENABLE | VIKING_SBENABLE | |
mreg | 1365 | arch/sparc/mm/srmmu.c | srmmu_set_mmureg(mreg); |
mreg | 1375 | arch/sparc/mm/srmmu.c | unsigned long mreg, psr; |
mreg | 1381 | arch/sparc/mm/srmmu.c | mreg = srmmu_get_mmureg(); psr = get_psr(); |
mreg | 1382 | arch/sparc/mm/srmmu.c | mod_typ = (mreg & 0xf0000000) >> 28; |
mreg | 1383 | arch/sparc/mm/srmmu.c | mod_rev = (mreg & 0x0f000000) >> 24; |
mreg | 1427 | arch/sparc/mm/srmmu.c | init_tsunami(mreg); |
mreg | 1555 | drivers/isdn/isdn_tty.c | int mreg; |
mreg | 1694 | drivers/isdn/isdn_tty.c | mreg = isdn_getnum(&p); |
mreg | 1695 | drivers/isdn/isdn_tty.c | if (mreg < 0 || mreg > ISDN_MODEM_ANZREG) { |
mreg | 1704 | drivers/isdn/isdn_tty.c | if ((mreg == 16) && ((mval * 16) > ISDN_SERIAL_XMIT_SIZE)) { |
mreg | 1708 | drivers/isdn/isdn_tty.c | m->mdmreg[mreg] = mval; |
mreg | 1716 | drivers/isdn/isdn_tty.c | isdn_tty_show_profile(mreg, info); |