root/drivers/net/ewrk3.c

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DEFINITIONS

This source file includes following definitions.
  1. ewrk3_probe
  2. ewrk3_hw_init
  3. ewrk3_open
  4. ewrk3_init
  5. ewrk3_queue_pkt
  6. ewrk3_interrupt
  7. ewrk3_rx
  8. ewrk3_tx
  9. ewrk3_close
  10. ewrk3_get_stats
  11. set_multicast_list
  12. SetMulticastFilter
  13. isa_probe
  14. eisa_probe
  15. alloc_device
  16. Read_EEPROM
  17. Write_EEPROM
  18. EthwrkSignature
  19. DevicePresent
  20. get_hw_addr
  21. EISA_signature
  22. ewrk3_ioctl
  23. init_module
  24. cleanup_module

   1 /*  ewrk3.c: A DIGITAL EtherWORKS 3 ethernet driver for Linux.
   2 
   3     Written 1994 by David C. Davies.
   4 
   5     Copyright 1994 Digital Equipment Corporation.
   6 
   7     This software may be used and distributed according to the terms of
   8     the GNU Public License, incorporated herein by reference.
   9 
  10     This driver is written for the Digital Equipment Corporation series
  11     of EtherWORKS ethernet cards:
  12 
  13         DE203 Turbo (BNC)
  14         DE204 Turbo (TP)
  15         DE205 Turbo (TP BNC)
  16 
  17     The driver has been tested on a relatively busy  network using the DE205
  18     card and benchmarked with 'ttcp': it transferred 16M  of data at 975kB/s
  19     (7.8Mb/s) to a DECstation 5000/200.
  20 
  21     The     author  may  be    reached    at  davies@wanton.lkg.dec.com   or
  22     davies@maniac.ultranet.com or  Digital  Equipment Corporation,  550 King
  23     Street, Littleton MA 01460.
  24 
  25     =========================================================================
  26     This driver has been written  substantially  from scratch, although  its
  27     inheritance of style and stack interface from 'depca.c' and in turn from
  28     Donald Becker's 'lance.c' should be obvious.
  29 
  30     The  DE203/4/5 boards  all  use a new proprietary   chip in place of the
  31     LANCE chip used in prior cards  (DEPCA, DE100, DE200/1/2, DE210, DE422).
  32     Use the depca.c driver in the standard distribution  for the LANCE based
  33     cards from DIGITAL; this driver will not work with them.
  34 
  35     The DE203/4/5 cards have 2  main modes: shared memory  and I/O only. I/O
  36     only makes  all the card accesses through  I/O transactions and  no high
  37     (shared)  memory is used. This  mode provides a >48% performance penalty
  38     and  is deprecated in this  driver,  although allowed to provide initial
  39     setup when hardstrapped.
  40 
  41     The shared memory mode comes in 3 flavours: 2kB, 32kB and 64kB. There is
  42     no point in using any mode other than the 2kB  mode - their performances
  43     are virtually identical, although the driver has  been tested in the 2kB
  44     and 32kB modes. I would suggest you uncomment the line:
  45 
  46                              FORCE_2K_MODE;
  47 
  48     to allow the driver to configure the card as a  2kB card at your current
  49     base  address, thus leaving more  room to clutter  your  system box with
  50     other memory hungry boards.
  51 
  52     As many ISA  and EISA cards  can be supported  under this driver  as you
  53     wish, limited primarily  by the available IRQ lines,  rather than by the
  54     available I/O addresses  (24 ISA,  16 EISA).   I have  checked different
  55     configurations of  multiple  depca cards and  ewrk3 cards  and have  not
  56     found a problem yet (provided you have at least depca.c v0.38) ...
  57 
  58     The board IRQ setting   must be at  an unused  IRQ which is  auto-probed
  59     using  Donald  Becker's autoprobe  routines.   All  these cards   are at
  60     {5,10,11,15}.
  61 
  62     No 16MB memory  limitation should exist with this  driver as DMA is  not
  63     used and the common memory area is in low memory on the network card (my
  64     current system has 20MB and I've not had problems yet).
  65 
  66     The ability to load  this driver as a  loadable module has been included
  67     and used  extensively during the  driver development (to save those long
  68     reboot sequences). To utilise this ability, you have to do 8 things:
  69 
  70     0) have a copy of the loadable modules code installed on your system.
  71     1) copy ewrk3.c from the  /linux/drivers/net directory to your favourite
  72     temporary directory.
  73     2) edit the  source code near  line 1898 to reflect  the I/O address and
  74     IRQ you're using.
  75     3) compile  ewrk3.c, but include -DMODULE in  the command line to ensure
  76     that the correct bits are compiled (see end of source code).
  77     4) if you are wanting to add a new  card, goto 5. Otherwise, recompile a
  78     kernel with the ewrk3 configuration turned off and reboot.
  79     5) insmod ewrk3.o
  80           [Alan Cox: Changed this so you can insmod ewrk3.o irq=x io=y]
  81     6) run the net startup bits for your new eth?? interface manually 
  82     (usually /etc/rc.inet[12] at boot time). 
  83     7) enjoy!
  84 
  85     Note that autoprobing is not allowed in loadable modules - the system is
  86     already up and running and you're messing with interrupts.
  87 
  88     To unload a module, turn off the associated interface 
  89     'ifconfig eth?? down' then 'rmmod ewrk3'.
  90 
  91     Promiscuous   mode has been  turned  off  in this driver,   but  all the
  92     multicast  address bits  have been   turned on. This  improved the  send
  93     performance on a busy network by about 13%.
  94 
  95     Ioctl's have now been provided (primarily because  I wanted to grab some
  96     packet size statistics). They  are patterned after 'plipconfig.c' from a
  97     suggestion by Alan Cox.  Using these  ioctls, you can enable promiscuous
  98     mode, add/delete multicast  addresses, change the hardware address,  get
  99     packet size distribution statistics and muck around with the control and
 100     status register. I'll add others if and when the need arises.
 101 
 102     TO DO:
 103     ------
 104 
 105 
 106     Revision History
 107     ----------------
 108 
 109     Version   Date        Description
 110   
 111       0.1     26-aug-94   Initial writing. ALPHA code release.
 112       0.11    31-aug-94   Fixed: 2k mode memory base calc., 
 113                                  LeMAC version calc.,
 114                                  IRQ vector assignments during autoprobe.
 115       0.12    31-aug-94   Tested working on LeMAC2 (DE20[345]-AC) card.
 116                           Fixed up MCA hash table algorithm.
 117       0.20     4-sep-94   Added IOCTL functionality.
 118       0.21    14-sep-94   Added I/O mode.
 119       0.21axp 15-sep-94   Special version for ALPHA AXP Linux V1.0.
 120       0.22    16-sep-94   Added more IOCTLs & tidied up.
 121       0.23    21-sep-94   Added transmit cut through.
 122       0.24    31-oct-94   Added uid checks in some ioctls.
 123       0.30     1-nov-94   BETA code release.
 124       0.31     5-dec-94   Added check/allocate region code.
 125       0.32    16-jan-95   Broadcast packet fix.
 126       0.33    10-Feb-95   Fix recognition bug reported by <bkm@star.rl.ac.uk>.
 127       0.40    27-Dec-95   Rationalise MODULE and autoprobe code.
 128                           Rewrite for portability & updated.
 129                           ALPHA support from <jestabro@amt.tay1.dec.com>
 130                           Added verify_area() calls in depca_ioctl() from
 131                           suggestion by <heiko@colossus.escape.de>.
 132                           Add new multicasting code.
 133       0.41    20-Jan-96   Fix IRQ set up problem reported by 
 134                           <kenneth@bbs.sas.ntu.ac.sg>.
 135 
 136     =========================================================================
 137 */
 138 
 139 static const char *version = "ewrk3.c:v0.41 96/1/20 davies@wanton.lkg.dec.com\n";
 140 
 141 #include <linux/module.h>
 142 
 143 #include <linux/kernel.h>
 144 #include <linux/sched.h>
 145 #include <linux/string.h>
 146 #include <linux/ptrace.h>
 147 #include <linux/errno.h>
 148 #include <linux/ioport.h>
 149 #include <linux/malloc.h>
 150 #include <linux/interrupt.h>
 151 #include <linux/delay.h>
 152 #include <asm/bitops.h>
 153 #include <asm/io.h>
 154 #include <asm/dma.h>
 155 #include <asm/segment.h>
 156 
 157 #include <linux/netdevice.h>
 158 #include <linux/etherdevice.h>
 159 #include <linux/skbuff.h>
 160 
 161 #include <linux/time.h>
 162 #include <linux/types.h>
 163 #include <linux/unistd.h>
 164 
 165 #include "ewrk3.h"
 166 
 167 #ifdef EWRK3_DEBUG
 168 static int ewrk3_debug = EWRK3_DEBUG;
 169 #else
 170 static int ewrk3_debug = 1;
 171 #endif
 172 
 173 #define EWRK3_NDA 0xffe0            /* No Device Address */
 174 
 175 #define PROBE_LENGTH    32
 176 #define ETH_PROM_SIG    0xAA5500FFUL
 177 
 178 #ifndef EWRK3_SIGNATURE
 179 #define EWRK3_SIGNATURE {"DE203","DE204","DE205",""}
 180 #define EWRK3_STRLEN 8
 181 #endif
 182 
 183 #ifndef EWRK3_RAM_BASE_ADDRESSES
 184 #define EWRK3_RAM_BASE_ADDRESSES {0xc0000,0xd0000,0x00000}
 185 #endif
 186 
 187 /*
 188 ** Sets up the I/O area for the autoprobe.
 189 */
 190 #define EWRK3_IO_BASE 0x100             /* Start address for probe search */
 191 #define EWRK3_IOP_INC 0x20              /* I/O address increment */
 192 #define EWRK3_TOTAL_SIZE 0x20           /* required I/O address length */
 193 
 194 #ifndef MAX_NUM_EWRK3S
 195 #define MAX_NUM_EWRK3S 21
 196 #endif
 197 
 198 #ifndef EWRK3_EISA_IO_PORTS 
 199 #define EWRK3_EISA_IO_PORTS 0x0c00      /* I/O port base address, slot 0 */
 200 #endif
 201 
 202 #ifndef MAX_EISA_SLOTS
 203 #define MAX_EISA_SLOTS 16
 204 #define EISA_SLOT_INC 0x1000
 205 #endif
 206 
 207 #define CRC_POLYNOMIAL_BE 0x04c11db7UL   /* Ethernet CRC, big endian */
 208 #define CRC_POLYNOMIAL_LE 0xedb88320UL   /* Ethernet CRC, little endian */
 209 
 210 #define QUEUE_PKT_TIMEOUT (1*HZ)         /* Jiffies */
 211 
 212 /*
 213 ** EtherWORKS 3 shared memory window sizes
 214 */
 215 #define IO_ONLY         0x00
 216 #define SHMEM_2K        0x800
 217 #define SHMEM_32K       0x8000
 218 #define SHMEM_64K       0x10000
 219 
 220 /*
 221 ** EtherWORKS 3 IRQ ENABLE/DISABLE
 222 */
 223 #define ENABLE_IRQs { \
 224   icr |= lp->irq_mask;\
 225   outb(icr, EWRK3_ICR);                     /* Enable the IRQs */\
 226 }
 227 
 228 #define DISABLE_IRQs { \
 229   icr = inb(EWRK3_ICR);\
 230   icr &= ~lp->irq_mask;\
 231   outb(icr, EWRK3_ICR);                     /* Disable the IRQs */\
 232 }
 233 
 234 /*
 235 ** EtherWORKS 3 START/STOP
 236 */
 237 #define START_EWRK3 { \
 238   csr = inb(EWRK3_CSR);\
 239   csr &= ~(CSR_TXD|CSR_RXD);\
 240   outb(csr, EWRK3_CSR);                     /* Enable the TX and/or RX */\
 241 }
 242 
 243 #define STOP_EWRK3 { \
 244   csr = (CSR_TXD|CSR_RXD);\
 245   outb(csr, EWRK3_CSR);                     /* Disable the TX and/or RX */\
 246 }
 247 
 248 /*
 249 ** The EtherWORKS 3 private structure
 250 */
 251 #define EWRK3_PKT_STAT_SZ 16
 252 #define EWRK3_PKT_BIN_SZ  128           /* Should be >=100 unless you
 253                                            increase EWRK3_PKT_STAT_SZ */
 254 
 255 struct ewrk3_private {
 256     char adapter_name[80];              /* Name exported to /proc/ioports */
 257     u_long shmem_base;                  /* Shared memory start address */
 258     u_long shmem_length;                /* Shared memory window length */
 259     struct enet_statistics stats;       /* Public stats */
 260     struct {
 261       u32 bins[EWRK3_PKT_STAT_SZ]; /* Private stats counters */
 262       u32 unicast;
 263       u32 multicast;
 264       u32 broadcast;
 265       u32 excessive_collisions;
 266       u32 tx_underruns;
 267       u32 excessive_underruns;
 268     } pktStats;
 269     u_char irq_mask;                    /* Adapter IRQ mask bits */
 270     u_char mPage;                       /* Maximum 2kB Page number */
 271     u_char lemac;                       /* Chip rev. level */
 272     u_char hard_strapped;               /* Don't allow a full open */
 273     u_char lock;                        /* Lock the page register */
 274     u_char txc;                         /* Transmit cut through */
 275     u_char *mctbl;                      /* Pointer to the multicast table */
 276 };
 277 
 278 /*
 279 ** Force the EtherWORKS 3 card to be in 2kB MODE
 280 */
 281 #define FORCE_2K_MODE { \
 282   shmem_length = SHMEM_2K;\
 283   outb(((mem_start - 0x80000) >> 11), EWRK3_MBR);\
 284 }
 285 
 286 /*
 287 ** Public Functions
 288 */
 289 static int    ewrk3_open(struct device *dev);
 290 static int    ewrk3_queue_pkt(struct sk_buff *skb, struct device *dev);
 291 static void   ewrk3_interrupt(int irq, void *dev_id, struct pt_regs *regs);
 292 static int    ewrk3_close(struct device *dev);
 293 static struct enet_statistics *ewrk3_get_stats(struct device *dev);
 294 static void   set_multicast_list(struct device *dev);
 295 static int    ewrk3_ioctl(struct device *dev, struct ifreq *rq, int cmd);
 296 
 297 /*
 298 ** Private functions
 299 */
 300 static int    ewrk3_hw_init(struct device *dev, u_long iobase);
 301 static void   ewrk3_init(struct device *dev);
 302 static int    ewrk3_rx(struct device *dev);
 303 static int    ewrk3_tx(struct device *dev);
 304 
 305 static void   EthwrkSignature(char * name, char *eeprom_image);
 306 static int    DevicePresent(u_long iobase);
 307 static void   SetMulticastFilter(struct device *dev);
 308 static int    EISA_signature(char *name, s32 eisa_id);
 309 
 310 static int    Read_EEPROM(u_long iobase, u_char eaddr);
 311 static int    Write_EEPROM(short data, u_long iobase, u_char eaddr);
 312 static u_char get_hw_addr (struct device *dev, u_char *eeprom_image, char chipType);
 313 
 314 static void   isa_probe(struct device *dev, u_long iobase);
 315 static void   eisa_probe(struct device *dev, u_long iobase);
 316 static struct device *alloc_device(struct device *dev, u_long iobase);
 317 
 318 
 319 #ifdef MODULE
 320 int  init_module(void);
 321 void cleanup_module(void);
 322 static int autoprobed = 1, loading_module = 1;
 323 
 324 # else
 325 static u_char irq[] = {5,0,10,3,11,9,15,12};
 326 static int autoprobed = 0, loading_module = 0;
 327 
 328 #endif /* MODULE */
 329 
 330 static char name[EWRK3_STRLEN + 1];
 331 static int num_ewrk3s = 0, num_eth = 0;
 332 
 333 /*
 334 ** Miscellaneous defines...
 335 */
 336 #define INIT_EWRK3 {\
 337     outb(EEPROM_INIT, EWRK3_IOPR);\
 338     udelay(1000);\
 339 }
 340 
 341 
 342 
 343 
 344 int ewrk3_probe(struct device *dev)
     /* [previous][next][first][last][top][bottom][index][help] */
 345 {
 346   int tmp = num_ewrk3s, status = -ENODEV;
 347   u_long iobase = dev->base_addr;
 348 
 349   if ((iobase == 0) && loading_module){
 350     printk("Autoprobing is not supported when loading a module based driver.\n");
 351     status = -EIO;
 352   } else {                              /* First probe for the Ethernet */
 353                                         /* Address PROM pattern */
 354     isa_probe(dev, iobase);
 355     eisa_probe(dev, iobase);
 356 
 357     if ((tmp == num_ewrk3s) && (iobase != 0) && loading_module) {
 358       printk("%s: ewrk3_probe() cannot find device at 0x%04lx.\n", dev->name, 
 359                                                                        iobase);
 360     }
 361 
 362     /*
 363     ** Walk the device list to check that at least one device
 364     ** initialised OK
 365     */
 366     for (; (dev->priv == NULL) && (dev->next != NULL); dev = dev->next);
 367 
 368     if (dev->priv) status = 0;
 369     if (iobase == 0) autoprobed = 1;
 370   }
 371 
 372   return status;
 373 }
 374 
 375 static int
 376 ewrk3_hw_init(struct device *dev, u_long iobase)
     /* [previous][next][first][last][top][bottom][index][help] */
 377 {
 378   struct ewrk3_private *lp;
 379   int i, status=0;
 380   u_long mem_start, shmem_length;
 381   u_char cr, cmr, icr, nicsr, lemac, hard_strapped = 0;
 382   u_char eeprom_image[EEPROM_MAX], chksum, eisa_cr = 0;
 383 
 384   /*
 385   ** Stop the EWRK3. Enable the DBR ROM. Disable interrupts and remote boot.
 386   ** This also disables the EISA_ENABLE bit in the EISA Control Register.
 387   */
 388   if (iobase > 0x400) eisa_cr = inb(EISA_CR);
 389   INIT_EWRK3;
 390 
 391   nicsr = inb(EWRK3_CSR);
 392 
 393   icr = inb(EWRK3_ICR);
 394   icr &= 0x70;
 395   outb(icr, EWRK3_ICR);                           /* Disable all the IRQs */
 396 
 397   if (nicsr == (CSR_TXD|CSR_RXD)) {
 398 
 399     /* Check that the EEPROM is alive and well and not living on Pluto... */
 400     for (chksum=0, i=0; i<EEPROM_MAX; i+=2) {
 401       union {
 402         short val;
 403         char c[2];
 404       } tmp;
 405 
 406       tmp.val = (short)Read_EEPROM(iobase, (i>>1));
 407       eeprom_image[i] = tmp.c[0];
 408       eeprom_image[i+1] = tmp.c[1];
 409       chksum += eeprom_image[i] + eeprom_image[i+1];
 410     }
 411 
 412     if (chksum != 0) {                             /* Bad EEPROM Data! */
 413       printk("%s: Device has a bad on-board EEPROM.\n", dev->name);
 414       status = -ENXIO;
 415     } else {
 416       EthwrkSignature(name, eeprom_image);
 417       if (*name != '\0') {                         /* found a EWRK3 device */
 418         dev->base_addr = iobase;
 419       
 420         if (iobase > 0x400) {
 421           outb(eisa_cr, EISA_CR);                  /* Rewrite the EISA CR */
 422         }
 423 
 424         lemac = eeprom_image[EEPROM_CHIPVER];
 425         cmr = inb(EWRK3_CMR);
 426 
 427         if (((lemac == LeMAC) && ((cmr & CMR_NO_EEPROM) != CMR_NO_EEPROM)) ||
 428             ((lemac == LeMAC2) && !(cmr & CMR_HS))) {
 429           printk("%s: %s at %#4lx", dev->name, name, iobase);
 430           hard_strapped = 1;
 431         } else if ((iobase&0x0fff)==EWRK3_EISA_IO_PORTS) {
 432                                                    /* EISA slot address */
 433           printk("%s: %s at %#4lx (EISA slot %ld)", 
 434                                  dev->name, name, iobase, ((iobase>>12)&0x0f));
 435         } else {                                   /* ISA port address */
 436           printk("%s: %s at %#4lx", dev->name, name, iobase);
 437         }
 438         
 439         if (!status) {
 440           printk(", h/w address ");
 441           if (lemac!=LeMAC2) DevicePresent(iobase);/* need after EWRK3_INIT */
 442           status = get_hw_addr(dev, eeprom_image, lemac);
 443           for (i = 0; i < ETH_ALEN - 1; i++) { /* get the ethernet addr. */
 444             printk("%2.2x:", dev->dev_addr[i]);
 445           }
 446           printk("%2.2x,\n", dev->dev_addr[i]);
 447 
 448           if (status) {
 449             printk("      which has an EEPROM CRC error.\n");
 450             status = -ENXIO;
 451           } else {
 452             if (lemac == LeMAC2) {            /* Special LeMAC2 CMR things */
 453               cmr &= ~(CMR_RA | CMR_WB | CMR_LINK | CMR_POLARITY | CMR_0WS);
 454               if (eeprom_image[EEPROM_MISC0] & READ_AHEAD)    cmr |= CMR_RA;
 455               if (eeprom_image[EEPROM_MISC0] & WRITE_BEHIND)  cmr |= CMR_WB;
 456               if (eeprom_image[EEPROM_NETMAN0] & NETMAN_POL)  cmr |= CMR_POLARITY;
 457               if (eeprom_image[EEPROM_NETMAN0] & NETMAN_LINK) cmr |= CMR_LINK;
 458               if (eeprom_image[EEPROM_MISC0] & _0WS_ENA)      cmr |= CMR_0WS;
 459             }
 460             if (eeprom_image[EEPROM_SETUP] & SETUP_DRAM)      cmr |= CMR_DRAM;
 461             outb(cmr, EWRK3_CMR);
 462 
 463             cr = inb(EWRK3_CR);               /* Set up the Control Register */
 464             cr |= eeprom_image[EEPROM_SETUP] & SETUP_APD;
 465             if (cr & SETUP_APD) cr |= eeprom_image[EEPROM_SETUP] & SETUP_PS;
 466             cr |= eeprom_image[EEPROM_MISC0] & FAST_BUS;
 467             cr |= eeprom_image[EEPROM_MISC0] & ENA_16;
 468             outb(cr, EWRK3_CR);
 469 
 470             /* 
 471             ** Determine the base address and window length for the EWRK3
 472             ** RAM from the memory base register.
 473             */
 474             mem_start = inb(EWRK3_MBR);
 475             shmem_length = 0;
 476             if (mem_start != 0) {
 477               if ((mem_start >= 0x0a) && (mem_start <= 0x0f)) {
 478                 mem_start *= SHMEM_64K;
 479                 shmem_length = SHMEM_64K;
 480               } else if ((mem_start >= 0x14) && (mem_start <= 0x1f)) {
 481                 mem_start *= SHMEM_32K;
 482                 shmem_length = SHMEM_32K;
 483               } else if ((mem_start >= 0x40) && (mem_start <= 0xff)) {
 484                 mem_start = mem_start * SHMEM_2K + 0x80000;
 485                 shmem_length = SHMEM_2K;
 486               } else {
 487                 status = -ENXIO;
 488               }
 489             }
 490           
 491             /*
 492             ** See the top of this source code for comments about
 493             ** uncommenting this line.
 494             */
 495 /*          FORCE_2K_MODE;*/
 496 
 497             if (!status) {
 498               if (hard_strapped) {
 499                 printk("      is hard strapped.\n");
 500               } else if (mem_start) {
 501                 printk("      has a %dk RAM window", (int)(shmem_length >> 10));
 502                 printk(" at 0x%.5lx", mem_start);
 503               } else {
 504                 printk("      is in I/O only mode");
 505               }
 506             
 507               /* private area & initialise */
 508               dev->priv = (void *) kmalloc(sizeof(struct ewrk3_private), 
 509                                                                    GFP_KERNEL);
 510               if (dev->priv == NULL) {
 511                 return -ENOMEM;
 512               }
 513               lp = (struct ewrk3_private *)dev->priv;
 514               memset(dev->priv, 0, sizeof(struct ewrk3_private));
 515               lp->shmem_base = mem_start;
 516               lp->shmem_length = shmem_length;
 517               lp->lemac = lemac;
 518               lp->hard_strapped = hard_strapped;
 519 
 520               lp->mPage = 64;
 521               if (cmr & CMR_DRAM) lp->mPage <<= 1 ;/* 2 DRAMS on module */ 
 522 
 523               sprintf(lp->adapter_name,"%s (%s)", name, dev->name);
 524               request_region(iobase, EWRK3_TOTAL_SIZE, lp->adapter_name);
 525 
 526               lp->irq_mask = ICR_TNEM|ICR_TXDM|ICR_RNEM|ICR_RXDM;
 527               
 528               if (!hard_strapped) {
 529                 /*
 530                 ** Enable EWRK3 board interrupts for autoprobing
 531                 */
 532                 icr |= ICR_IE;                     /* Enable interrupts */
 533                 outb(icr, EWRK3_ICR);
 534             
 535                 /* The DMA channel may be passed in on this parameter. */
 536                 dev->dma = 0;
 537         
 538                 /* To auto-IRQ we enable the initialization-done and DMA err,
 539                    interrupts. For now we will always get a DMA error. */
 540                 if (dev->irq < 2) {
 541 #ifndef MODULE
 542                   u_char irqnum;
 543               
 544                   autoirq_setup(0);
 545 
 546                   /* 
 547                   ** Trigger a TNE interrupt.
 548                   */
 549                   icr |=ICR_TNEM;
 550                   outb(1,EWRK3_TDQ);          /* Write to the TX done queue */
 551                   outb(icr, EWRK3_ICR);       /* Unmask the TXD interrupt */
 552               
 553                   irqnum = irq[((icr & IRQ_SEL) >> 4)];
 554               
 555                   dev->irq = autoirq_report(1);
 556                   if ((dev->irq) && (irqnum == dev->irq)) {
 557                     printk(" and uses IRQ%d.\n", dev->irq);
 558                   } else {
 559                     if (!dev->irq) {
 560                       printk(" and failed to detect IRQ line.\n");
 561                     } else if ((irqnum == 1) && (lemac == LeMAC2)) {
 562                       printk(" and an illegal IRQ line detected.\n");
 563                     } else {
 564                       printk(", but incorrect IRQ line detected.\n");
 565                     }
 566                     status = -ENXIO;
 567                   }
 568                 
 569                   DISABLE_IRQs;                 /* Mask all interrupts */
 570 
 571 #endif /* MODULE */
 572                 } else {
 573                   printk(" and requires IRQ%d.\n", dev->irq);
 574                 }
 575               }
 576               if (status) release_region(iobase, EWRK3_TOTAL_SIZE);
 577             } else {
 578               status = -ENXIO;
 579             }
 580           }
 581         }
 582       } else {
 583         status = -ENXIO;
 584       }
 585     }
 586 
 587     if (!status) {
 588       if (ewrk3_debug > 0) {
 589         printk(version);
 590       }
 591       
 592       /* The EWRK3-specific entries in the device structure. */
 593       dev->open = &ewrk3_open;
 594       dev->hard_start_xmit = &ewrk3_queue_pkt;
 595       dev->stop = &ewrk3_close;
 596       dev->get_stats = &ewrk3_get_stats;
 597       dev->set_multicast_list = &set_multicast_list;
 598       dev->do_ioctl = &ewrk3_ioctl;
 599 
 600       dev->mem_start = 0;
 601         
 602       /* Fill in the generic field of the device structure. */
 603       ether_setup(dev);
 604     }
 605   } else {
 606     status = -ENXIO;
 607   }
 608 
 609   return status;
 610 }
 611 
 612 
 613 static int
 614 ewrk3_open(struct device *dev)
     /* [previous][next][first][last][top][bottom][index][help] */
 615 {
 616   struct ewrk3_private *lp = (struct ewrk3_private *)dev->priv;
 617   u_long iobase = dev->base_addr;
 618   int i, status = 0;
 619   u_char icr, csr;
 620 
 621   /*
 622   ** Stop the TX and RX...
 623   */
 624   STOP_EWRK3;
 625 
 626   if (!lp->hard_strapped) {
 627     irq2dev_map[dev->irq] = dev;                   /* For latched interrupts */
 628 
 629     if (request_irq(dev->irq, (void *)ewrk3_interrupt, 0, "ewrk3", NULL)) {
 630       printk("ewrk3_open(): Requested IRQ%d is busy\n",dev->irq);
 631       status = -EAGAIN;
 632     } else {
 633 
 634       /* 
 635       ** Re-initialize the EWRK3... 
 636       */
 637       ewrk3_init(dev);
 638 
 639       if (ewrk3_debug > 1){
 640         printk("%s: ewrk3 open with irq %d\n",dev->name,dev->irq);
 641         printk("  physical address: ");
 642         for (i=0;i<5;i++){
 643           printk("%2.2x:",(u_char)dev->dev_addr[i]);
 644         }
 645         printk("%2.2x\n",(u_char)dev->dev_addr[i]);
 646         if (lp->shmem_length == 0) {
 647           printk("  no shared memory, I/O only mode\n");
 648         } else {
 649           printk("  start of shared memory: 0x%08lx\n",lp->shmem_base);
 650           printk("  window length: 0x%04lx\n",lp->shmem_length);
 651         }
 652         printk("  # of DRAMS: %d\n",((inb(EWRK3_CMR) & 0x02) ? 2 : 1));
 653         printk("  csr:  0x%02x\n", inb(EWRK3_CSR));
 654         printk("  cr:   0x%02x\n", inb(EWRK3_CR));
 655         printk("  icr:  0x%02x\n", inb(EWRK3_ICR));
 656         printk("  cmr:  0x%02x\n", inb(EWRK3_CMR));
 657         printk("  fmqc: 0x%02x\n", inb(EWRK3_FMQC));
 658       }
 659 
 660       dev->tbusy = 0;                         
 661       dev->start = 1;
 662       dev->interrupt = UNMASK_INTERRUPTS;
 663 
 664       /*
 665       ** Unmask EWRK3 board interrupts
 666       */
 667       icr = inb(EWRK3_ICR);
 668       ENABLE_IRQs;
 669 
 670     }
 671   } else {
 672     dev->start = 0;
 673     dev->tbusy = 1;
 674     printk("%s: ewrk3 available for hard strapped set up only.\n", dev->name);
 675     printk("      Run the 'ewrk3setup' utility or remove the hard straps.\n");
 676   }
 677 
 678   MOD_INC_USE_COUNT;
 679 
 680   return status;
 681 }
 682 
 683 /*
 684 ** Initialize the EtherWORKS 3 operating conditions
 685 */
 686 static void
 687 ewrk3_init(struct device *dev)
     /* [previous][next][first][last][top][bottom][index][help] */
 688 {
 689   struct ewrk3_private *lp = (struct ewrk3_private *)dev->priv;
 690   u_char csr, page;
 691   u_long iobase = dev->base_addr;
 692   
 693   /* 
 694   ** Enable any multicasts 
 695   */
 696   set_multicast_list(dev);
 697 
 698   /*
 699   ** Clean out any remaining entries in all the queues here
 700   */
 701   while (inb(EWRK3_TQ));
 702   while (inb(EWRK3_TDQ));
 703   while (inb(EWRK3_RQ));
 704   while (inb(EWRK3_FMQ));
 705 
 706   /*
 707   ** Write a clean free memory queue
 708   */
 709   for (page=1;page<lp->mPage;page++) {      /* Write the free page numbers */
 710     outb(page, EWRK3_FMQ);                  /* to the Free Memory Queue */
 711   }
 712 
 713   lp->lock = 0;                             /* Ensure there are no locks */
 714 
 715   START_EWRK3;                              /* Enable the TX and/or RX */
 716 }
 717 
 718 /* 
 719 ** Writes a socket buffer to the free page queue
 720 */
 721 static int
 722 ewrk3_queue_pkt(struct sk_buff *skb, struct device *dev)
     /* [previous][next][first][last][top][bottom][index][help] */
 723 {
 724   struct ewrk3_private *lp = (struct ewrk3_private *)dev->priv;
 725   u_long iobase = dev->base_addr;
 726   int status = 0;
 727   u_char icr, csr;
 728 
 729   /* Transmitter timeout, serious problems. */
 730   if (dev->tbusy || lp->lock) {
 731     int tickssofar = jiffies - dev->trans_start;
 732     if (tickssofar < QUEUE_PKT_TIMEOUT) {
 733       status = -1;
 734     } else if (!lp->hard_strapped) {
 735       printk("%s: transmit timed/locked out, status %04x, resetting.\n",
 736                                                    dev->name, inb(EWRK3_CSR));
 737         
 738       /*
 739       ** Mask all board interrupts
 740       */
 741       DISABLE_IRQs;
 742 
 743       /*
 744       ** Stop the TX and RX...
 745       */
 746       STOP_EWRK3;
 747 
 748       ewrk3_init(dev);
 749 
 750       /*
 751       ** Unmask EWRK3 board interrupts
 752       */
 753       ENABLE_IRQs;
 754 
 755       dev->tbusy=0;
 756       dev->trans_start = jiffies;
 757     }
 758   } else if (skb == NULL) {
 759     dev_tint(dev);
 760   } else if (skb->len > 0) {
 761 
 762     /* 
 763     ** Block a timer-based transmit from overlapping.  This could better be
 764     ** done with atomic_swap(1, dev->tbusy), but set_bit() works as well. 
 765     */
 766     if (set_bit(0, (void*)&dev->tbusy) != 0)
 767       printk("%s: Transmitter access conflict.\n", dev->name);
 768 
 769     DISABLE_IRQs;                      /* So that the page # remains correct */
 770     
 771     /* 
 772     ** Get a free page from the FMQ when resources are available
 773     */
 774     if (inb(EWRK3_FMQC) > 0) {
 775       u_long buf = 0;
 776       u_char page;
 777 
 778       if ((page = inb(EWRK3_FMQ)) < lp->mPage) {
 779         /*
 780         ** Set up shared memory window and pointer into the window
 781         */
 782         while (set_bit(0, (void *)&lp->lock) != 0); /* Wait for lock to free */
 783         if (lp->shmem_length == IO_ONLY) {
 784           outb(page, EWRK3_IOPR);
 785         } else if (lp->shmem_length == SHMEM_2K) {
 786           buf = lp->shmem_base;
 787           outb(page, EWRK3_MPR);
 788         } else if (lp->shmem_length == SHMEM_32K) {
 789           buf = ((((short)page << 11) & 0x7800) + lp->shmem_base);
 790           outb((page >> 4), EWRK3_MPR);
 791         } else if (lp->shmem_length == SHMEM_64K) {
 792           buf = ((((short)page << 11) & 0xf800) + lp->shmem_base);
 793           outb((page >> 5), EWRK3_MPR);
 794         } else {
 795           status = -1;
 796           printk("%s: Oops - your private data area is hosed!\n",dev->name);
 797         }
 798 
 799         if (!status) {
 800 
 801           /* 
 802           ** Set up the buffer control structures and copy the data from
 803           ** the socket buffer to the shared memory .
 804           */
 805 
 806           if (lp->shmem_length == IO_ONLY) {
 807             int i;
 808             u_char *p = skb->data;
 809             
 810             outb((char)(TCR_QMODE | TCR_PAD | TCR_IFC), EWRK3_DATA);
 811             outb((char)(skb->len & 0xff), EWRK3_DATA);
 812             outb((char)((skb->len >> 8) & 0xff), EWRK3_DATA);
 813             outb((char)0x04, EWRK3_DATA);
 814             for (i=0; i<skb->len; i++) {
 815               outb(*p++, EWRK3_DATA);
 816             }
 817             outb(page, EWRK3_TQ);                      /* Start sending pkt */
 818           } else {
 819             writeb((char)(TCR_QMODE|TCR_PAD|TCR_IFC), (char *)buf);/* ctrl byte*/
 820             buf+=1;
 821             writeb((char)(skb->len & 0xff), (char *)buf);/* length (16 bit xfer)*/
 822             buf+=1;
 823             if (lp->txc) {
 824               writeb((char)(((skb->len >> 8) & 0xff) | XCT), (char *)buf);
 825               buf+=1;
 826               writeb(0x04, (char *)buf);               /* index byte */
 827               buf+=1;
 828               writeb(0x00, (char *)(buf + skb->len));  /* Write the XCT flag */
 829               memcpy_toio(buf, skb->data, PRELOAD);/* Write PRELOAD bytes*/
 830               outb(page, EWRK3_TQ);                    /* Start sending pkt */
 831               memcpy_toio(buf+PRELOAD, skb->data+PRELOAD, skb->len-PRELOAD);
 832               writeb(0xff, (char *)(buf + skb->len));  /* Write the XCT flag */
 833             } else {
 834               writeb((char)((skb->len >> 8) & 0xff), (char *)buf);
 835               buf+=1;
 836               writeb(0x04, (char *)buf);               /* index byte */
 837               buf+=1;
 838               memcpy_toio((char *)buf, skb->data, skb->len);/* Write data bytes */
 839               outb(page, EWRK3_TQ);                    /* Start sending pkt */
 840             }
 841           }
 842 
 843           dev->trans_start = jiffies;
 844           dev_kfree_skb (skb, FREE_WRITE);
 845 
 846         } else {              /* return unused page to the free memory queue */
 847           outb(page, EWRK3_FMQ);
 848         }
 849         lp->lock = 0;         /* unlock the page register */
 850       } else {
 851         printk("ewrk3_queue_pkt(): Invalid free memory page (%d).\n",
 852                                                          (u_char) page);
 853       }
 854     } else {
 855       printk("ewrk3_queue_pkt(): No free resources...\n");
 856       printk("ewrk3_queue_pkt(): CSR: %02x ICR: %02x FMQC: %02x\n",inb(EWRK3_CSR),inb(EWRK3_ICR),inb(EWRK3_FMQC));
 857     }
 858     
 859     /* Check for free resources: clear 'tbusy' if there are some */
 860     if (inb(EWRK3_FMQC) > 0) {
 861       dev->tbusy = 0;
 862     }
 863 
 864     ENABLE_IRQs;
 865   }
 866 
 867   return status;
 868 }
 869 
 870 /*
 871 ** The EWRK3 interrupt handler. 
 872 */
 873 static void
 874 ewrk3_interrupt(int irq, void *dev_id, struct pt_regs * regs)
     /* [previous][next][first][last][top][bottom][index][help] */
 875 {
 876     struct device *dev = (struct device *)(irq2dev_map[irq]);
 877     struct ewrk3_private *lp;
 878     u_long iobase;
 879     u_char icr, cr, csr;
 880 
 881     if (dev == NULL) {
 882         printk ("ewrk3_interrupt(): irq %d for unknown device.\n", irq);
 883     } else {
 884       lp = (struct ewrk3_private *)dev->priv;
 885       iobase = dev->base_addr;
 886 
 887       if (dev->interrupt)
 888         printk("%s: Re-entering the interrupt handler.\n", dev->name);
 889 
 890       dev->interrupt = MASK_INTERRUPTS;
 891 
 892       /* get the interrupt information */
 893       csr = inb(EWRK3_CSR);
 894 
 895       /* 
 896       ** Mask the EWRK3 board interrupts and turn on the LED 
 897       */
 898       DISABLE_IRQs;
 899 
 900       cr = inb(EWRK3_CR);
 901       cr |= CR_LED;
 902       outb(cr, EWRK3_CR);
 903 
 904       if (csr & CSR_RNE)          /* Rx interrupt (packet[s] arrived) */
 905         ewrk3_rx(dev);
 906 
 907       if (csr & CSR_TNE)          /* Tx interrupt (packet sent) */
 908         ewrk3_tx(dev);
 909 
 910       /*
 911       ** Now deal with the TX/RX disable flags. These are set when there
 912       ** are no more resources. If resources free up then enable these
 913       ** interrupts, otherwise mask them - failure to do this will result
 914       ** in the system hanging in an interrupt loop.
 915       */
 916       if (inb(EWRK3_FMQC)) {      /* any resources available? */
 917         lp->irq_mask |= ICR_TXDM|ICR_RXDM;/* enable the interrupt source */
 918         csr &= ~(CSR_TXD|CSR_RXD);/* ensure restart of a stalled TX or RX */
 919         outb(csr, EWRK3_CSR);
 920         dev->tbusy = 0;           /* clear TX busy flag */
 921         mark_bh(NET_BH);
 922       } else {
 923         lp->irq_mask &= ~(ICR_TXDM|ICR_RXDM);/* disable the interrupt source */
 924       }
 925 
 926       /* Unmask the EWRK3 board interrupts and turn off the LED */
 927       cr &= ~CR_LED;
 928       outb(cr, EWRK3_CR);
 929 
 930       dev->interrupt = UNMASK_INTERRUPTS;
 931       ENABLE_IRQs;
 932     }
 933 
 934     return;
 935 }
 936 
 937 static int
 938 ewrk3_rx(struct device *dev)
     /* [previous][next][first][last][top][bottom][index][help] */
 939 {
 940   struct ewrk3_private *lp = (struct ewrk3_private *)dev->priv;
 941   u_long iobase = dev->base_addr;
 942   int i, status = 0;
 943   u_char page, tmpPage = 0, tmpLock = 0;
 944   u_long buf = 0;
 945 
 946   while (inb(EWRK3_RQC) && !status) {        /* Whilst there's incoming data */
 947     if ((page = inb(EWRK3_RQ)) < lp->mPage) {/* Get next entry's buffer page */
 948       /*
 949       ** Preempt any process using the current page register. Check for
 950       ** an existing lock to reduce time taken in I/O transactions.
 951       */
 952       if ((tmpLock = set_bit(0, (void *)&lp->lock)) == 1) {   /* Assert lock */
 953         if (lp->shmem_length == IO_ONLY) {              /* Get existing page */
 954           tmpPage = inb(EWRK3_IOPR);
 955         } else {
 956           tmpPage = inb(EWRK3_MPR);
 957         }
 958       }
 959 
 960       /*
 961       ** Set up shared memory window and pointer into the window
 962       */
 963       if (lp->shmem_length == IO_ONLY) {
 964         outb(page, EWRK3_IOPR);
 965       } else if (lp->shmem_length == SHMEM_2K) {
 966         buf = lp->shmem_base;
 967         outb(page, EWRK3_MPR);
 968       } else if (lp->shmem_length == SHMEM_32K) {
 969         buf = ((((short)page << 11) & 0x7800) + lp->shmem_base);
 970         outb((page >> 4), EWRK3_MPR);
 971       } else if (lp->shmem_length == SHMEM_64K) {
 972         buf = ((((short)page << 11) & 0xf800) + lp->shmem_base);
 973         outb((page >> 5), EWRK3_MPR);
 974       } else {
 975         status = -1;
 976         printk("%s: Oops - your private data area is hosed!\n",dev->name);
 977       }
 978 
 979       if (!status) {
 980         char rx_status;
 981         int pkt_len;
 982 
 983         if (lp->shmem_length == IO_ONLY) {
 984           rx_status = inb(EWRK3_DATA);
 985           pkt_len = inb(EWRK3_DATA);
 986           pkt_len |= ((u_short)inb(EWRK3_DATA) << 8);
 987         } else {
 988           rx_status = readb(buf);
 989           buf+=1;
 990           pkt_len = readw(buf);
 991           buf+=3;
 992         }
 993 
 994         if (!(rx_status & R_ROK)) {         /* There was an error. */
 995           lp->stats.rx_errors++;            /* Update the error stats. */
 996           if (rx_status & R_DBE) lp->stats.rx_frame_errors++;
 997           if (rx_status & R_CRC) lp->stats.rx_crc_errors++;
 998           if (rx_status & R_PLL) lp->stats.rx_fifo_errors++;
 999         } else {
1000           struct sk_buff *skb;
1001 
1002           if ((skb = dev_alloc_skb(pkt_len+2)) != NULL) {
1003             unsigned char *p;
1004             skb->dev = dev;
1005             skb_reserve(skb,2);             /* Align to 16 bytes */
1006             p = skb_put(skb,pkt_len);
1007 
1008             if (lp->shmem_length == IO_ONLY) {
1009               *p = inb(EWRK3_DATA);         /* dummy read */
1010               for (i=0; i<pkt_len; i++) {
1011                 *p++ = inb(EWRK3_DATA);
1012               }
1013             } else {
1014               memcpy_fromio(p, buf, pkt_len);
1015             }
1016 
1017             /* 
1018             ** Notify the upper protocol layers that there is another 
1019             ** packet to handle
1020             */
1021             skb->protocol=eth_type_trans(skb,dev);
1022             netif_rx(skb);
1023 
1024             /*
1025             ** Update stats
1026             */
1027             lp->stats.rx_packets++;
1028             for (i=1; i<EWRK3_PKT_STAT_SZ-1; i++) {
1029               if (pkt_len < i*EWRK3_PKT_BIN_SZ) {
1030                 lp->pktStats.bins[i]++;
1031                 i = EWRK3_PKT_STAT_SZ;
1032               }
1033             }
1034             p = skb->data;                  /* Look at the dest addr */
1035             if (p[0] & 0x01) {              /* Multicast/Broadcast */
1036               if ((*(s32 *)&p[0] == -1) && (*(s16 *)&p[4] == -1)) {
1037                 lp->pktStats.broadcast++;
1038               } else {
1039                 lp->pktStats.multicast++;
1040               }
1041             } else if ((*(s32 *)&p[0] == *(s32 *)&dev->dev_addr[0]) &&
1042                        (*(s16 *)&p[4] == *(s16 *)&dev->dev_addr[4])) {
1043               lp->pktStats.unicast++;
1044             }
1045 
1046             lp->pktStats.bins[0]++;           /* Duplicates stats.rx_packets */
1047             if (lp->pktStats.bins[0] == 0) {  /* Reset counters */
1048               memset(&lp->pktStats, 0, sizeof(lp->pktStats));
1049             }
1050           } else {
1051             printk("%s: Insufficient memory; nuking packet.\n", dev->name);
1052             lp->stats.rx_dropped++;           /* Really, deferred. */
1053             break;
1054           }
1055         }
1056       }
1057       /*
1058       ** Return the received buffer to the free memory queue
1059       */
1060       outb(page, EWRK3_FMQ);
1061 
1062       if (tmpLock) {                          /* If a lock was preempted */
1063         if (lp->shmem_length == IO_ONLY) {    /* Replace old page */
1064           outb(tmpPage, EWRK3_IOPR);
1065         } else {
1066           outb(tmpPage, EWRK3_MPR);
1067         }
1068       }
1069       lp->lock = 0;                           /* Unlock the page register */
1070     } else {
1071       printk("ewrk3_rx(): Illegal page number, page %d\n",page);
1072       printk("ewrk3_rx(): CSR: %02x ICR: %02x FMQC: %02x\n",inb(EWRK3_CSR),inb(EWRK3_ICR),inb(EWRK3_FMQC));
1073     }
1074   }
1075   return status;
1076 }
1077 
1078 /*
1079 ** Buffer sent - check for TX buffer errors.
1080 */
1081 static int
1082 ewrk3_tx(struct device *dev)
     /* [previous][next][first][last][top][bottom][index][help] */
1083 {
1084   struct ewrk3_private *lp = (struct ewrk3_private *)dev->priv;
1085   u_long iobase = dev->base_addr;
1086   u_char tx_status;
1087 
1088   while ((tx_status = inb(EWRK3_TDQ)) > 0) {  /* Whilst there's old buffers */
1089     if (tx_status & T_VSTS) {                 /* The status is valid */
1090       if (tx_status & T_TXE) {
1091         lp->stats.tx_errors++;
1092         if (tx_status & T_NCL)    lp->stats.tx_carrier_errors++;
1093         if (tx_status & T_LCL)    lp->stats.tx_window_errors++;
1094         if (tx_status & T_CTU) {
1095           if ((tx_status & T_COLL) ^ T_XUR) {
1096             lp->pktStats.tx_underruns++;
1097           } else {
1098             lp->pktStats.excessive_underruns++;
1099           }
1100         } else  if (tx_status & T_COLL) {
1101           if ((tx_status & T_COLL) ^ T_XCOLL) {
1102             lp->stats.collisions++;
1103           } else {
1104             lp->pktStats.excessive_collisions++;
1105           }
1106         }
1107       } else {
1108         lp->stats.tx_packets++;
1109       }
1110     }
1111   }
1112 
1113   return 0;
1114 }
1115 
1116 static int
1117 ewrk3_close(struct device *dev)
     /* [previous][next][first][last][top][bottom][index][help] */
1118 {
1119   struct ewrk3_private *lp = (struct ewrk3_private *)dev->priv;
1120   u_long iobase = dev->base_addr;
1121   u_char icr, csr;
1122 
1123   dev->start = 0;
1124   dev->tbusy = 1;
1125 
1126   if (ewrk3_debug > 1) {
1127     printk("%s: Shutting down ethercard, status was %2.2x.\n",
1128            dev->name, inb(EWRK3_CSR));
1129   }
1130 
1131   /* 
1132   ** We stop the EWRK3 here... mask interrupts and stop TX & RX
1133   */
1134   DISABLE_IRQs;
1135 
1136   STOP_EWRK3;
1137 
1138   /*
1139   ** Clean out the TX and RX queues here (note that one entry
1140   ** may get added to either the TXD or RX queues if the the TX or RX
1141   ** just starts processing a packet before the STOP_EWRK3 command
1142   ** is received. This will be flushed in the ewrk3_open() call).
1143   */
1144   while (inb(EWRK3_TQ));
1145   while (inb(EWRK3_TDQ));
1146   while (inb(EWRK3_RQ));
1147 
1148   if (!lp->hard_strapped) {
1149     free_irq(dev->irq, NULL);
1150     
1151     irq2dev_map[dev->irq] = 0;
1152   }
1153 
1154   MOD_DEC_USE_COUNT;
1155 
1156   return 0;
1157 }
1158 
1159 static struct enet_statistics *
1160 ewrk3_get_stats(struct device *dev)
     /* [previous][next][first][last][top][bottom][index][help] */
1161 {
1162   struct ewrk3_private *lp = (struct ewrk3_private *)dev->priv;
1163 
1164   /* Null body since there is no framing error counter */
1165     
1166   return &lp->stats;
1167 }
1168 
1169 /*
1170 ** Set or clear the multicast filter for this adapter.
1171 */
1172 static void
1173 set_multicast_list(struct device *dev)
     /* [previous][next][first][last][top][bottom][index][help] */
1174 {
1175   struct ewrk3_private *lp = (struct ewrk3_private *)dev->priv;
1176   u_long iobase = dev->base_addr;
1177   u_char csr;
1178 
1179   if (irq2dev_map[dev->irq] != NULL) {
1180     csr = inb(EWRK3_CSR);
1181     
1182     if (lp->shmem_length == IO_ONLY) {
1183       lp->mctbl = (char *) PAGE0_HTE;
1184     } else {
1185       lp->mctbl = (char *)(lp->shmem_base + PAGE0_HTE);
1186     }
1187 
1188     csr &= ~(CSR_PME | CSR_MCE);
1189     if (dev->flags & IFF_PROMISC) {         /* set promiscuous mode */
1190       csr |= CSR_PME;
1191       outb(csr, EWRK3_CSR);
1192     } else {
1193       SetMulticastFilter(dev);
1194       csr |= CSR_MCE;
1195       outb(csr, EWRK3_CSR);
1196     }
1197   }
1198 }
1199 
1200 /*
1201 ** Calculate the hash code and update the logical address filter
1202 ** from a list of ethernet multicast addresses.
1203 ** Little endian crc one liner from Matt Thomas, DEC.
1204 **
1205 ** Note that when clearing the table, the broadcast bit must remain asserted
1206 ** to receive broadcast messages.
1207 */
1208 static void SetMulticastFilter(struct device *dev)
     /* [previous][next][first][last][top][bottom][index][help] */
1209 {
1210   struct ewrk3_private *lp = (struct ewrk3_private *)dev->priv;
1211   struct dev_mc_list *dmi=dev->mc_list;
1212   u_long iobase = dev->base_addr;
1213   int i;
1214   char *addrs, j, bit, byte;
1215   short *p = (short *) lp->mctbl;
1216   u16 hashcode;
1217   s32 crc, poly = CRC_POLYNOMIAL_LE;
1218 
1219   while (set_bit(0, (void *)&lp->lock) != 0); /* Wait for lock to free */
1220 
1221   if (lp->shmem_length == IO_ONLY) {
1222     outb(0, EWRK3_IOPR);
1223     outw(EEPROM_OFFSET(lp->mctbl), EWRK3_PIR1);
1224   } else {
1225     outb(0, EWRK3_MPR);
1226   }
1227 
1228   if (dev->flags & IFF_ALLMULTI) {
1229     for (i=0; i<(HASH_TABLE_LEN >> 3); i++) {
1230       if (lp->shmem_length == IO_ONLY) {
1231         outb(0xff, EWRK3_DATA);
1232       } else {                /* memset didn't work here */
1233         writew(0xffff, p);
1234         p++; i++;
1235       }
1236     }
1237   } else {
1238     /* Clear table except for broadcast bit */
1239     if (lp->shmem_length == IO_ONLY) {
1240       for (i=0; i<(HASH_TABLE_LEN >> 4) - 1; i++) {
1241         outb(0x00, EWRK3_DATA);
1242       } 
1243       outb(0x80, EWRK3_DATA); i++;           /* insert the broadcast bit */
1244       for (; i<(HASH_TABLE_LEN >> 3); i++) {
1245         outb(0x00, EWRK3_DATA);
1246       } 
1247     } else {
1248       memset_io(lp->mctbl, 0, (HASH_TABLE_LEN >> 3));
1249       writeb(0x80, (char *)(lp->mctbl + (HASH_TABLE_LEN >> 4) - 1));
1250     }
1251 
1252     /* Update table */
1253     for (i=0;i<dev->mc_count;i++) {          /* for each address in the list */
1254       addrs=dmi->dmi_addr;
1255       dmi=dmi->next;
1256       if ((*addrs & 0x01) == 1) {            /* multicast address? */ 
1257         crc = 0xffffffff;                    /* init CRC for each address */
1258         for (byte=0;byte<ETH_ALEN;byte++) {  /* for each address byte */
1259                                              /* process each address bit */ 
1260           for (bit = *addrs++,j=0;j<8;j++, bit>>=1) {
1261             crc = (crc >> 1) ^ (((crc ^ bit) & 0x01) ? poly : 0);
1262           }
1263         }
1264         hashcode = crc & ((1 << 9) - 1);     /* hashcode is 9 LSb of CRC */
1265 
1266         byte = hashcode >> 3;                /* bit[3-8] -> byte in filter */
1267         bit = 1 << (hashcode & 0x07);        /* bit[0-2] -> bit in byte */
1268 
1269         if (lp->shmem_length == IO_ONLY) {
1270           u_char tmp;
1271 
1272           outw((short)((long)lp->mctbl) + byte, EWRK3_PIR1);
1273           tmp = inb(EWRK3_DATA);
1274           tmp |= bit;
1275           outw((short)((long)lp->mctbl) + byte, EWRK3_PIR1);
1276           outb(tmp, EWRK3_DATA); 
1277         } else {
1278           writeb(readb(lp->mctbl + byte) | bit, lp->mctbl + byte);
1279         }
1280       }
1281     }
1282   }
1283 
1284   lp->lock = 0;                              /* Unlock the page register */
1285 
1286   return;
1287 }
1288 
1289 /*
1290 ** ISA bus I/O device probe
1291 */
1292 static void isa_probe(struct device *dev, u_long ioaddr)
     /* [previous][next][first][last][top][bottom][index][help] */
1293 {
1294   int i = num_ewrk3s, maxSlots;
1295   u_long iobase;
1296 
1297   if (!ioaddr && autoprobed) return ;            /* Been here before ! */
1298   if (ioaddr >= 0x400) return;                   /* Not ISA */
1299 
1300   if (ioaddr == 0) {                     /* Autoprobing */
1301     iobase = EWRK3_IO_BASE;              /* Get the first slot address */
1302     maxSlots = 24;
1303   } else {                               /* Probe a specific location */
1304     iobase = ioaddr;
1305     maxSlots = i + 1;
1306   }
1307 
1308   for (; (i<maxSlots) && (dev!=NULL);iobase+=EWRK3_IOP_INC, i++) {
1309     if (!check_region(iobase, EWRK3_TOTAL_SIZE)) {    
1310       if (DevicePresent(iobase) == 0) {
1311         if ((dev = alloc_device(dev, iobase)) != NULL) {
1312           if (ewrk3_hw_init(dev, iobase) == 0) {
1313             num_ewrk3s++;
1314           }
1315           num_eth++;
1316         }
1317       }
1318     } else if (autoprobed) {
1319       printk("%s: region already allocated at 0x%04lx.\n", dev->name, iobase);
1320     }
1321   }
1322 
1323   return;
1324 }
1325 
1326 /*
1327 ** EISA bus I/O device probe. Probe from slot 1 since slot 0 is usually
1328 ** the motherboard.
1329 */
1330 static void eisa_probe(struct device *dev, u_long ioaddr)
     /* [previous][next][first][last][top][bottom][index][help] */
1331 {
1332   int i, maxSlots;
1333   u_long iobase;
1334   char name[EWRK3_STRLEN];
1335 
1336   if (!ioaddr && autoprobed) return ;            /* Been here before ! */
1337   if (ioaddr < 0x1000) return;                   /* Not EISA */
1338 
1339   if (ioaddr == 0) {                     /* Autoprobing */
1340     iobase = EISA_SLOT_INC;              /* Get the first slot address */
1341     i = 1;
1342     maxSlots = MAX_EISA_SLOTS;
1343   } else {                               /* Probe a specific location */
1344     iobase = ioaddr;
1345     i = (ioaddr >> 12);
1346     maxSlots = i + 1;
1347   }
1348 
1349   for (i=1; (i<maxSlots) && (dev!=NULL); i++, iobase+=EISA_SLOT_INC) {
1350     if (EISA_signature(name, EISA_ID) == 0) {
1351       if (!check_region(iobase, EWRK3_TOTAL_SIZE)) {
1352         if (DevicePresent(iobase) == 0) {
1353           if ((dev = alloc_device(dev, iobase)) != NULL) {
1354             if (ewrk3_hw_init(dev, iobase) == 0) {
1355               num_ewrk3s++;
1356             }
1357             num_eth++;
1358           }
1359         }
1360       } else if (autoprobed) {
1361         printk("%s: region already allocated at 0x%04lx.\n", dev->name, iobase);
1362       }
1363     }
1364   }
1365 
1366   return;
1367 }
1368 
1369 /*
1370 ** Allocate the device by pointing to the next available space in the
1371 ** device structure. Should one not be available, it is created.
1372 */
1373 static struct device *alloc_device(struct device *dev, u_long iobase)
     /* [previous][next][first][last][top][bottom][index][help] */
1374 {
1375   int addAutoProbe = 0;
1376   struct device *tmp = NULL, *ret;
1377   int (*init)(struct device *) = NULL;
1378 
1379   /*
1380   ** Check the device structures for an end of list or unused device
1381   */
1382   if (!loading_module) {
1383     while (dev->next != NULL) {
1384       if ((dev->base_addr == EWRK3_NDA) || (dev->base_addr == 0)) break;
1385       dev = dev->next;                     /* walk through eth device list */
1386       num_eth++;                           /* increment eth device number */
1387     }
1388 
1389     /*
1390     ** If an autoprobe is requested for another device, we must re-insert
1391     ** the request later in the list. Remember the current position first.
1392     */
1393     if ((dev->base_addr == 0) && (num_ewrk3s > 0)) {
1394       addAutoProbe++;
1395       tmp = dev->next;                     /* point to the next device */
1396       init = dev->init;                    /* remember the probe function */
1397     }
1398 
1399     /*
1400     ** If at end of list and can't use current entry, malloc one up. 
1401     ** If memory could not be allocated, print an error message.
1402     */
1403     if ((dev->next == NULL) &&  
1404         !((dev->base_addr == EWRK3_NDA) || (dev->base_addr == 0))){
1405       dev->next = (struct device *)kmalloc(sizeof(struct device) + 8,
1406                                            GFP_KERNEL);
1407 
1408       dev = dev->next;                     /* point to the new device */
1409       if (dev == NULL) {
1410         printk("eth%d: Device not initialised, insufficient memory\n",
1411                num_eth);
1412       } else {
1413         /*
1414         ** If the memory was allocated, point to the new memory area
1415         ** and initialize it (name, I/O address, next device (NULL) and
1416         ** initialisation probe routine).
1417         */
1418         dev->name = (char *)(dev + sizeof(struct device));
1419         if (num_eth > 9999) {
1420           sprintf(dev->name,"eth????");    /* New device name */
1421         } else {
1422           sprintf(dev->name,"eth%d", num_eth);/* New device name */
1423         }
1424         dev->base_addr = iobase;           /* assign the io address */
1425         dev->next = NULL;                  /* mark the end of list */
1426         dev->init = &ewrk3_probe;          /* initialisation routine */
1427         num_ewrk3s++;
1428       }
1429     }
1430     ret = dev;                             /* return current struct, or NULL */
1431   
1432     /*
1433     ** Now figure out what to do with the autoprobe that has to be inserted.
1434     ** Firstly, search the (possibly altered) list for an empty space.
1435     */
1436     if (ret != NULL) {
1437       if (addAutoProbe) {
1438         for (;(tmp->next!=NULL) && (tmp->base_addr!=EWRK3_NDA); tmp=tmp->next);
1439 
1440         /*
1441         ** If no more device structures and can't use the current one, malloc
1442         ** one up. If memory could not be allocated, print an error message.
1443         */
1444         if ((tmp->next == NULL) && !(tmp->base_addr == EWRK3_NDA)) {
1445           tmp->next = (struct device *)kmalloc(sizeof(struct device) + 8,
1446                                                GFP_KERNEL);
1447           tmp = tmp->next;                     /* point to the new device */
1448           if (tmp == NULL) {
1449             printk("%s: Insufficient memory to extend the device list.\n", 
1450                    dev->name);
1451           } else {
1452             /*
1453             ** If the memory was allocated, point to the new memory area
1454             ** and initialize it (name, I/O address, next device (NULL) and
1455             ** initialisation probe routine).
1456             */
1457             tmp->name = (char *)(tmp + sizeof(struct device));
1458             if (num_eth > 9999) {
1459               sprintf(tmp->name,"eth????");       /* New device name */
1460             } else {
1461               sprintf(tmp->name,"eth%d", num_eth);/* New device name */
1462             }
1463             tmp->base_addr = 0;                /* re-insert the io address */
1464             tmp->next = NULL;                  /* mark the end of list */
1465             tmp->init = init;                  /* initialisation routine */
1466           }
1467         } else {                               /* structure already exists */
1468           tmp->base_addr = 0;                  /* re-insert the io address */
1469         }
1470       }
1471     }
1472   } else {
1473     ret = dev;
1474   }
1475 
1476   return ret;
1477 }
1478 
1479 /*
1480 ** Read the EWRK3 EEPROM using this routine
1481 */
1482 static int Read_EEPROM(u_long iobase, u_char eaddr)
     /* [previous][next][first][last][top][bottom][index][help] */
1483 {
1484   int i;
1485 
1486   outb((eaddr & 0x3f), EWRK3_PIR1);     /* set up 6 bits of address info */
1487   outb(EEPROM_RD, EWRK3_IOPR);          /* issue read command */
1488   for (i=0;i<5000;i++) inb(EWRK3_CSR);  /* wait 1msec */
1489 
1490   return inw(EWRK3_EPROM1);             /* 16 bits data return */
1491 }
1492 
1493 /*
1494 ** Write the EWRK3 EEPROM using this routine
1495 */
1496 static int Write_EEPROM(short data, u_long iobase, u_char eaddr)
     /* [previous][next][first][last][top][bottom][index][help] */
1497 {
1498   int i;
1499 
1500   outb(EEPROM_WR_EN, EWRK3_IOPR);       /* issue write enable command */
1501   for (i=0;i<5000;i++) inb(EWRK3_CSR);  /* wait 1msec */
1502   outw(data, EWRK3_EPROM1);             /* write data to register */
1503   outb((eaddr & 0x3f), EWRK3_PIR1);     /* set up 6 bits of address info */
1504   outb(EEPROM_WR, EWRK3_IOPR);          /* issue write command */
1505   for (i=0;i<75000;i++) inb(EWRK3_CSR); /* wait 15msec */
1506   outb(EEPROM_WR_DIS, EWRK3_IOPR);      /* issue write disable command */
1507   for (i=0;i<5000;i++) inb(EWRK3_CSR);  /* wait 1msec */
1508 
1509   return 0;
1510 }
1511 
1512 /*
1513 ** Look for a particular board name in the on-board EEPROM.
1514 */
1515 static void EthwrkSignature(char *name, char *eeprom_image)
     /* [previous][next][first][last][top][bottom][index][help] */
1516 {
1517   u_long i,j,k;
1518   char *signatures[] = EWRK3_SIGNATURE;
1519 
1520   strcpy(name, "");
1521   for (i=0;*signatures[i] != '\0' && *name == '\0';i++) {
1522     for (j=EEPROM_PNAME7,k=0;j<=EEPROM_PNAME0 && k<strlen(signatures[i]);j++) {
1523       if (signatures[i][k] == eeprom_image[j]) {          /* track signature */
1524         k++;
1525       } else {                         /* lost signature; begin search again */
1526         k=0;
1527       }
1528     }
1529     if (k == strlen(signatures[i])) {
1530       for (k=0; k<EWRK3_STRLEN; k++) {
1531         name[k] = eeprom_image[EEPROM_PNAME7 + k];
1532         name[EWRK3_STRLEN] = '\0';
1533       }
1534     }
1535   }
1536 
1537   return;                                   /* return the device name string */
1538 }
1539 
1540 /*
1541 ** Look for a special sequence in the Ethernet station address PROM that
1542 ** is common across all EWRK3 products.
1543 ** 
1544 ** Search the Ethernet address ROM for the signature. Since the ROM address
1545 ** counter can start at an arbitrary point, the search must include the entire
1546 ** probe sequence length plus the (length_of_the_signature - 1).
1547 ** Stop the search IMMEDIATELY after the signature is found so that the
1548 ** PROM address counter is correctly positioned at the start of the
1549 ** ethernet address for later read out.
1550 */
1551 
1552 static int DevicePresent(u_long iobase)
     /* [previous][next][first][last][top][bottom][index][help] */
1553 {
1554   union {
1555     struct {
1556       u32 a;
1557       u32 b;
1558     } llsig;
1559     char Sig[sizeof(u32) << 1];
1560   } dev;
1561   short sigLength;
1562   char data;
1563   int i, j, status = 0;
1564 
1565   dev.llsig.a = ETH_PROM_SIG;
1566   dev.llsig.b = ETH_PROM_SIG;
1567   sigLength = sizeof(u32) << 1;
1568 
1569   for (i=0,j=0;j<sigLength && i<PROBE_LENGTH+sigLength-1;i++) {
1570     data = inb(EWRK3_APROM);
1571     if (dev.Sig[j] == data) {   /* track signature */
1572       j++;
1573     } else {                    /* lost signature; begin search again */
1574       if (data == dev.Sig[0]) {
1575         j=1;
1576       } else {
1577         j=0;
1578       }
1579     }
1580   }
1581 
1582   if (j!=sigLength) {
1583     status = -ENODEV;           /* search failed */
1584   }
1585 
1586   return status;
1587 }
1588 
1589 static u_char get_hw_addr(struct device *dev, u_char *eeprom_image, char chipType)
     /* [previous][next][first][last][top][bottom][index][help] */
1590 {
1591   int i, j, k;
1592   u_short chksum;
1593   u_char crc, lfsr, sd, status = 0;
1594   u_long iobase = dev->base_addr;
1595   u16 tmp;
1596 
1597   if (chipType == LeMAC2) {
1598     for (crc=0x6a, j=0; j<ETH_ALEN; j++) {
1599       sd = dev->dev_addr[j] = eeprom_image[EEPROM_PADDR0 + j];
1600       outb(dev->dev_addr[j], EWRK3_PAR0 + j);
1601       for (k=0; k<8; k++, sd >>= 1) {
1602         lfsr = ((((crc & 0x02) >> 1) ^ (crc & 0x01)) ^ (sd & 0x01)) << 7;
1603         crc = (crc >> 1) + lfsr;
1604       }
1605     }
1606     if (crc != eeprom_image[EEPROM_PA_CRC]) status = -1;
1607   } else {
1608     for (i=0,k=0;i<ETH_ALEN;) {
1609       k <<= 1 ;
1610       if (k > 0xffff) k-=0xffff;
1611 
1612       k += (u_char) (tmp = inb(EWRK3_APROM));
1613       dev->dev_addr[i] = (u_char) tmp;
1614       outb(dev->dev_addr[i], EWRK3_PAR0 + i);
1615       i++;
1616       k += (u_short) ((tmp = inb(EWRK3_APROM)) << 8);
1617       dev->dev_addr[i] = (u_char) tmp;
1618       outb(dev->dev_addr[i], EWRK3_PAR0 + i);
1619       i++;
1620 
1621       if (k > 0xffff) k-=0xffff;
1622     }
1623     if (k == 0xffff) k=0;
1624     chksum = inb(EWRK3_APROM);
1625     chksum |= (inb(EWRK3_APROM)<<8);
1626     if (k != chksum) status = -1;
1627   }
1628 
1629   return status;
1630 }
1631 
1632 /*
1633 ** Look for a particular board name in the EISA configuration space
1634 */
1635 static int EISA_signature(char *name, s32 eisa_id)
     /* [previous][next][first][last][top][bottom][index][help] */
1636 {
1637   u_long i;
1638   char *signatures[] = EWRK3_SIGNATURE;
1639   char ManCode[EWRK3_STRLEN];
1640   union {
1641     s32 ID;
1642     char Id[4];
1643   } Eisa;
1644   int status = 0;
1645 
1646   *name = '\0';
1647   for (i=0; i<4; i++) {
1648     Eisa.Id[i] = inb(eisa_id + i);
1649   }
1650 
1651   ManCode[0]=(((Eisa.Id[0]>>2)&0x1f)+0x40);
1652   ManCode[1]=(((Eisa.Id[1]&0xe0)>>5)+((Eisa.Id[0]&0x03)<<3)+0x40);
1653   ManCode[2]=(((Eisa.Id[2]>>4)&0x0f)+0x30);
1654   ManCode[3]=((Eisa.Id[2]&0x0f)+0x30);
1655   ManCode[4]=(((Eisa.Id[3]>>4)&0x0f)+0x30);
1656   ManCode[5]='\0';
1657 
1658   for (i=0;(*signatures[i] != '\0') && (*name == '\0');i++) {
1659     if (strstr(ManCode, signatures[i]) != NULL) {
1660       strcpy(name,ManCode);
1661       status = 1;
1662     }
1663   }
1664 
1665   return status;                           /* return the device name string */
1666 }
1667 
1668 /*
1669 ** Perform IOCTL call functions here. Some are privileged operations and the
1670 ** effective uid is checked in those cases.
1671 */
1672 static int ewrk3_ioctl(struct device *dev, struct ifreq *rq, int cmd)
     /* [previous][next][first][last][top][bottom][index][help] */
1673 {
1674   struct ewrk3_private *lp = (struct ewrk3_private *)dev->priv;
1675   struct ewrk3_ioctl *ioc = (struct ewrk3_ioctl *) &rq->ifr_data;
1676   u_long iobase = dev->base_addr;
1677   int i, j, status = 0;
1678   u_char csr;
1679   union {
1680     u_char addr[HASH_TABLE_LEN * ETH_ALEN];
1681     u_short val[(HASH_TABLE_LEN * ETH_ALEN) >> 1];
1682   } tmp;
1683 
1684   switch(ioc->cmd) {
1685   case EWRK3_GET_HWADDR:             /* Get the hardware address */
1686     for (i=0; i<ETH_ALEN; i++) {
1687       tmp.addr[i] = dev->dev_addr[i];
1688     }
1689     ioc->len = ETH_ALEN;
1690     if (!(status = verify_area(VERIFY_WRITE, (void *)ioc->data, ioc->len))) {
1691       memcpy_tofs(ioc->data, tmp.addr, ioc->len);
1692     }
1693 
1694     break;
1695   case EWRK3_SET_HWADDR:             /* Set the hardware address */
1696     if (suser()) {
1697       if (!(status = verify_area(VERIFY_READ, (void *)ioc->data, ETH_ALEN))) {
1698         csr = inb(EWRK3_CSR);
1699         csr |= (CSR_TXD|CSR_RXD);
1700         outb(csr, EWRK3_CSR);                  /* Disable the TX and RX */
1701 
1702         memcpy_fromfs(tmp.addr,ioc->data,ETH_ALEN);
1703         for (i=0; i<ETH_ALEN; i++) {
1704           dev->dev_addr[i] = tmp.addr[i];
1705           outb(tmp.addr[i], EWRK3_PAR0 + i);
1706         }
1707 
1708         csr &= ~(CSR_TXD|CSR_RXD);             /* Enable the TX and RX */
1709         outb(csr, EWRK3_CSR);
1710       }
1711     } else {
1712       status = -EPERM;
1713     }
1714 
1715     break;
1716   case EWRK3_SET_PROM:               /* Set Promiscuous Mode */
1717     if (suser()) {
1718       csr = inb(EWRK3_CSR);
1719       csr |= CSR_PME;
1720       csr &= ~CSR_MCE;
1721       outb(csr, EWRK3_CSR);
1722     } else {
1723       status = -EPERM;
1724     }
1725 
1726     break;
1727   case EWRK3_CLR_PROM:               /* Clear Promiscuous Mode */
1728     if (suser()) {
1729       csr = inb(EWRK3_CSR);
1730       csr &= ~CSR_PME;
1731       outb(csr, EWRK3_CSR);
1732     } else {
1733       status = -EPERM;
1734     }
1735 
1736     break;
1737   case EWRK3_SAY_BOO:                /* Say "Boo!" to the kernel log file */
1738     printk("%s: Boo!\n", dev->name);
1739 
1740     break;
1741   case EWRK3_GET_MCA:                /* Get the multicast address table */
1742     if (!(status = verify_area(VERIFY_WRITE, ioc->data, ioc->len))) {
1743       while (set_bit(0, (void *)&lp->lock) != 0); /* Wait for lock to free */
1744       if (lp->shmem_length == IO_ONLY) {
1745         outb(0, EWRK3_IOPR);
1746         outw(PAGE0_HTE, EWRK3_PIR1);
1747         for (i=0; i<(HASH_TABLE_LEN >> 3); i++) {
1748           tmp.addr[i] = inb(EWRK3_DATA);
1749         }
1750       } else {
1751         outb(0, EWRK3_MPR);
1752         memcpy_fromio(tmp.addr, (char *)(lp->shmem_base + PAGE0_HTE), (HASH_TABLE_LEN >> 3));
1753       }
1754       ioc->len = (HASH_TABLE_LEN >> 3);
1755       memcpy_tofs(ioc->data, tmp.addr, ioc->len); 
1756     }
1757     lp->lock = 0;                               /* Unlock the page register */
1758 
1759     break;
1760   case EWRK3_SET_MCA:                /* Set a multicast address */
1761     if (suser()) {
1762       if (!(status=verify_area(VERIFY_READ, ioc->data, ETH_ALEN*ioc->len))) {
1763         memcpy_fromfs(tmp.addr, ioc->data, ETH_ALEN * ioc->len);
1764         set_multicast_list(dev);
1765       }
1766     } else {
1767       status = -EPERM;
1768     }
1769 
1770     break;
1771   case EWRK3_CLR_MCA:                /* Clear all multicast addresses */
1772     if (suser()) {
1773       set_multicast_list(dev);
1774     } else {
1775       status = -EPERM;
1776     }
1777 
1778     break;
1779   case EWRK3_MCA_EN:                 /* Enable multicast addressing */
1780     if (suser()) {
1781       csr = inb(EWRK3_CSR);
1782       csr |= CSR_MCE;
1783       csr &= ~CSR_PME;
1784       outb(csr, EWRK3_CSR);
1785     } else {
1786       status = -EPERM;
1787     }
1788 
1789     break;
1790   case EWRK3_GET_STATS:              /* Get the driver statistics */
1791     cli();
1792     ioc->len = sizeof(lp->pktStats);
1793     if (!(status=verify_area(VERIFY_WRITE, ioc->data, ioc->len))) {
1794       memcpy_tofs(ioc->data, &lp->pktStats, ioc->len); 
1795     }
1796     sti();
1797 
1798     break;
1799   case EWRK3_CLR_STATS:              /* Zero out the driver statistics */
1800     if (suser()) {
1801       cli();
1802       memset(&lp->pktStats, 0, sizeof(lp->pktStats));
1803       sti();
1804     } else {
1805       status = -EPERM;
1806     }
1807 
1808     break;
1809   case EWRK3_GET_CSR:                /* Get the CSR Register contents */
1810     tmp.addr[0] = inb(EWRK3_CSR);
1811     ioc->len = 1;
1812     if (!(status=verify_area(VERIFY_WRITE, ioc->data, ioc->len))) {
1813       memcpy_tofs(ioc->data, tmp.addr, ioc->len);
1814     }
1815 
1816     break;
1817   case EWRK3_SET_CSR:                /* Set the CSR Register contents */
1818     if (suser()) {
1819       if (!(status=verify_area(VERIFY_READ, ioc->data, 1))) {
1820         memcpy_fromfs(tmp.addr, ioc->data, 1);
1821         outb(tmp.addr[0], EWRK3_CSR);
1822       }
1823     } else {
1824       status = -EPERM;
1825     }
1826 
1827     break;
1828   case EWRK3_GET_EEPROM:             /* Get the EEPROM contents */
1829     if (suser()) {
1830       for (i=0; i<(EEPROM_MAX>>1); i++) {
1831         tmp.val[i] = (short)Read_EEPROM(iobase, i);
1832       }
1833       i = EEPROM_MAX;
1834       tmp.addr[i++] = inb(EWRK3_CMR);            /* Config/Management Reg. */
1835       for (j=0;j<ETH_ALEN;j++) {
1836         tmp.addr[i++] = inb(EWRK3_PAR0 + j);
1837       }
1838       ioc->len = EEPROM_MAX + 1 + ETH_ALEN;
1839       if (!(status=verify_area(VERIFY_WRITE, ioc->data, ioc->len))) {
1840         memcpy_tofs(ioc->data, tmp.addr, ioc->len);
1841       }
1842     } else {
1843       status = -EPERM;
1844     }
1845 
1846     break;
1847   case EWRK3_SET_EEPROM:             /* Set the EEPROM contents */
1848     if (suser()) {
1849       if (!(status=verify_area(VERIFY_READ, ioc->data, EEPROM_MAX))) {
1850         memcpy_fromfs(tmp.addr, ioc->data, EEPROM_MAX);
1851         for (i=0; i<(EEPROM_MAX>>1); i++) {
1852           Write_EEPROM(tmp.val[i], iobase, i);
1853         }
1854       }
1855     } else {
1856       status = -EPERM;
1857     }
1858 
1859     break;
1860   case EWRK3_GET_CMR:                /* Get the CMR Register contents */
1861     tmp.addr[0] = inb(EWRK3_CMR);
1862     ioc->len = 1;
1863     if (!(status=verify_area(VERIFY_WRITE, ioc->data, ioc->len))) {
1864       memcpy_tofs(ioc->data, tmp.addr, ioc->len);
1865     }
1866 
1867     break;
1868   case EWRK3_SET_TX_CUT_THRU:        /* Set TX cut through mode */
1869     if (suser()) {
1870       lp->txc = 1;
1871     } else {
1872       status = -EPERM;
1873     }
1874 
1875     break;
1876   case EWRK3_CLR_TX_CUT_THRU:        /* Clear TX cut through mode */
1877     if (suser()) {
1878       lp->txc = 0;
1879     } else {
1880       status = -EPERM;
1881     }
1882 
1883     break;
1884   default:
1885     status = -EOPNOTSUPP;
1886   }
1887 
1888   return status;
1889 }
1890 
1891 #ifdef MODULE
1892 static char devicename[9] = { 0, };
1893 static struct device thisEthwrk = {
1894   devicename, /* device name is inserted by /linux/drivers/net/net_init.c */
1895   0, 0, 0, 0,
1896   0x300, 5,   /* I/O address, IRQ */
1897   0, 0, 0, NULL, ewrk3_probe };
1898         
1899 static int io=0x300;    /* <--- EDIT THESE LINES FOR YOUR CONFIGURATION */
1900 static int irq=5;       /* or use the insmod io= irq= options           */
1901 
1902 int
1903 init_module(void)
     /* [previous][next][first][last][top][bottom][index][help] */
1904 {
1905   thisEthwrk.base_addr=io;
1906   thisEthwrk.irq=irq;
1907   if (register_netdev(&thisEthwrk) != 0)
1908     return -EIO;
1909   return 0;
1910 }
1911 
1912 void
1913 cleanup_module(void)
     /* [previous][next][first][last][top][bottom][index][help] */
1914 {
1915   if (thisEthwrk.priv) {
1916     kfree(thisEthwrk.priv);
1917     thisEthwrk.priv = NULL;
1918   }
1919   thisEthwrk.irq = 0;
1920 
1921   unregister_netdev(&thisEthwrk);
1922   release_region(thisEthwrk.base_addr, EWRK3_TOTAL_SIZE);
1923 }
1924 #endif /* MODULE */
1925 
1926 
1927 /*
1928  * Local variables:
1929  *  kernel-compile-command: "gcc -D__KERNEL__ -I/usr/src/linux/net/inet -Wall -Wstrict-prototypes -O2 -m486 -c ewrk3.c"
1930  *
1931  *  module-compile-command: "gcc -D__KERNEL__ -DMODULE -I/usr/src/linux/net/inet -Wall -Wstrict-prototypes -O2 -m486 -c ewrk3.c"
1932  * End:
1933  */
1934 

/* [previous][next][first][last][top][bottom][index][help] */