taglinefilesource code
reg114arch/alpha/kernel/bios32.cunsigned int base, mask, size, reg;
reg120arch/alpha/kernel/bios32.cfor (reg = PCI_BASE_ADDRESS_0; reg <= PCI_BASE_ADDRESS_5; reg += 4) {
reg125arch/alpha/kernel/bios32.cpcibios_write_config_dword(bus->number, dev->devfn, reg,
reg127arch/alpha/kernel/bios32.cpcibios_read_config_dword(bus->number, dev->devfn, reg, &base);
reg151arch/alpha/kernel/bios32.creg, base | 0x1);
reg172arch/alpha/kernel/bios32.creg += 4;  /* skip extra 4 bytes */
reg231arch/alpha/kernel/bios32.creg, base);
reg70arch/alpha/kernel/ptrace.c#define PT_REG(reg)  (PAGE_SIZE - sizeof(struct pt_regs)  \
reg71arch/alpha/kernel/ptrace.c+ (long)&((struct pt_regs *)0)->reg)
reg72arch/alpha/kernel/ptrace.c#define SW_REG(reg)  (PAGE_SIZE - sizeof(struct pt_regs)  \
reg74arch/alpha/kernel/ptrace.c+ (long)&((struct switch_stack *)0)->reg)
reg180arch/alpha/kernel/traps.casmlinkage void do_entUna(void * va, unsigned long opcode, unsigned long reg,
reg192arch/alpha/kernel/traps.cregs.pc - 4, va, opcode, reg);
reg201arch/alpha/kernel/traps.cif (reg >= 16 && reg <= 18)
reg202arch/alpha/kernel/traps.creg += 19;
reg205arch/alpha/kernel/traps.c*(reg+regs.regs) = (int) ldl_u(va);
reg208arch/alpha/kernel/traps.c*(reg+regs.regs) = ldq_u(va);
reg211arch/alpha/kernel/traps.cstl_u(*(reg+regs.regs), va);
reg214arch/alpha/kernel/traps.cstq_u(*(reg+regs.regs), va);
reg218arch/alpha/kernel/traps.cregs.pc, va, opcode, reg);
reg279arch/alpha/kernel/traps.casmlinkage void do_entUnaUser(void * va, unsigned long opcode, unsigned long reg,
reg286arch/alpha/kernel/traps.cextern void alpha_write_fp_reg (unsigned long reg, unsigned long val);
reg287arch/alpha/kernel/traps.cextern unsigned long alpha_read_fp_reg (unsigned long reg);
reg297arch/alpha/kernel/traps.c*pc_addr - 4, va, opcode, reg);
reg324arch/alpha/kernel/traps.cif (reg < 9) {
reg325arch/alpha/kernel/traps.creg_addr += 7 + reg;      /* v0-t7 in SAVE_ALL frame */
reg326arch/alpha/kernel/traps.c} else if (reg < 16) {
reg327arch/alpha/kernel/traps.creg_addr += (reg - 9);      /* s0-s6 in entUna frame */
reg328arch/alpha/kernel/traps.c} else if (reg < 19) {
reg329arch/alpha/kernel/traps.creg_addr += 7 + 20 + 3 + (reg - 16);  /* a0-a2 in PAL frame */
reg330arch/alpha/kernel/traps.c} else if (reg < 29) {
reg331arch/alpha/kernel/traps.creg_addr += 7 + 9 + (reg - 19);    /* a3-at in SAVE_ALL frame */
reg333arch/alpha/kernel/traps.cswitch (reg) {
reg350arch/alpha/kernel/traps.calpha_write_fp_reg(reg, s_mem_to_reg(ldl_u(va)));
reg353arch/alpha/kernel/traps.calpha_write_fp_reg(reg, s_reg_to_mem(ldl_u(va)));
reg356arch/alpha/kernel/traps.ccase 0x23: alpha_write_fp_reg(reg, ldq_u(va)); break;  /* ldt */
reg357arch/alpha/kernel/traps.ccase 0x27: stq_u(alpha_read_fp_reg(reg), va);  break;  /* stt */
reg369arch/alpha/kernel/traps.cif (opcode >= 0x28 && reg == 30 && dir == VERIFY_WRITE) {
reg61arch/alpha/math-emu/fp-emul.calpha_read_fp_reg (unsigned long reg)
reg65arch/alpha/math-emu/fp-emul.cswitch (reg) {
reg112arch/alpha/math-emu/fp-emul.c# define LDT(reg,val)  \
reg113arch/alpha/math-emu/fp-emul.casm volatile ("ldt $f"#reg",%0" :: "m"(val));
reg115arch/alpha/math-emu/fp-emul.c# define LDT(reg,val)  \
reg116arch/alpha/math-emu/fp-emul.casm volatile ("ldt $f"#reg",0(%0)" :: "r"(&val));
reg120arch/alpha/math-emu/fp-emul.calpha_write_fp_reg (unsigned long reg, unsigned long val)
reg122arch/alpha/math-emu/fp-emul.cswitch (reg) {
reg612arch/i386/kernel/smp.cint reg;
reg621arch/i386/kernel/smp.creg = apic_read(APIC_VERSION);
reg622arch/i386/kernel/smp.cSMP_PRINTK(("Getting VERSION: %x\n", reg));
reg625arch/i386/kernel/smp.creg = apic_read(APIC_VERSION);
reg626arch/i386/kernel/smp.cSMP_PRINTK(("Getting VERSION: %x\n", reg));
reg640arch/i386/kernel/smp.creg = apic_read(APIC_LVT0);
reg641arch/i386/kernel/smp.cSMP_PRINTK(("Getting LVT0: %x\n", reg));
reg643arch/i386/kernel/smp.creg = apic_read(APIC_LVT1);
reg644arch/i386/kernel/smp.cSMP_PRINTK(("Getting LVT1: %x\n", reg));
reg61drivers/block/ali14xx.ctypedef struct { byte reg, data; } RegInitializer;
reg100drivers/block/ali14xx.cstatic inline byte inReg (byte reg)
reg102drivers/block/ali14xx.coutb_p(reg, regPort);
reg109drivers/block/ali14xx.cstatic void outReg (byte data, byte reg)
reg111drivers/block/ali14xx.coutb_p(reg, regPort);
reg207drivers/block/ali14xx.cfor (p = initData; p->reg != 0; ++p)
reg208drivers/block/ali14xx.coutReg(p->data, p->reg);
reg37drivers/block/rz1000.cunsigned short reg;
reg40drivers/block/rz1000.cif ((rc = pcibios_read_config_word (bus, fn, PCI_COMMAND, &reg))) {
reg42drivers/block/rz1000.c} else if (!(reg & 1)) {
reg45drivers/block/rz1000.cif ((rc = pcibios_read_config_word(bus, fn, 0x40, &reg))
reg46drivers/block/rz1000.c|| (rc =  pcibios_write_config_word(bus, fn, 0x40, reg & 0xdfff)))
reg901drivers/char/ftape/fdc-io.cbyte reg[10];
reg916drivers/char/ftape/fdc-io.cfor (i = 0; i < NR_ITEMS(reg); ++i) {
reg917drivers/char/ftape/fdc-io.cfdc_read(&reg[i]);
reg918drivers/char/ftape/fdc-io.cTRACEx2(6, "Register %d = 0x%02x", i, reg[i]);
reg920drivers/char/ftape/fdc-io.cfdc_fifo_state = (reg[8] & 0x20) == 0;
reg921drivers/char/ftape/fdc-io.cfdc_lock_state = reg[7] & 0x80;
reg922drivers/char/ftape/fdc-io.cfdc_fifo_thr = 1 + (reg[8] & 0x0f);
reg279drivers/char/scc.cInReg(register io_port port, register unsigned char reg)
reg283drivers/char/scc.cOutb(port, reg);
reg289drivers/char/scc.cOutb(port, reg);
reg295drivers/char/scc.cOutReg(register io_port port, register unsigned char reg, register unsigned char val)
reg298drivers/char/scc.cOutb(port, reg); udelay(SCC_LDELAY);
reg301drivers/char/scc.cOutb(port, reg);
reg307drivers/char/scc.cwr(register struct scc_channel *scc, register unsigned char reg, register unsigned char val)
reg309drivers/char/scc.cOutReg(scc->ctrl, reg, (scc->wreg[reg] = val));
reg313drivers/char/scc.cor(register struct scc_channel *scc, register unsigned char reg, register unsigned char val)
reg315drivers/char/scc.cOutReg(scc->ctrl, reg, (scc->wreg[reg] |= val));
reg319drivers/char/scc.ccl(register struct scc_channel *scc, register unsigned char reg, register unsigned char val)
reg321drivers/char/scc.cOutReg(scc->ctrl, reg, (scc->wreg[reg] &= ~val));
reg818drivers/net/3c59x.cint win, reg;
reg824drivers/net/3c59x.cfor (reg = 0; reg < 16; reg++)
reg825drivers/net/3c59x.cprintk(" %2.2x", inb(ioaddr+reg));
reg158drivers/net/atp.hwrite_reg(short port, unsigned char reg, unsigned char value)
reg161drivers/net/atp.houtb(EOC | reg, port + PAR_DATA);
reg162drivers/net/atp.houtval = WrAddr | reg;
reg177drivers/net/atp.hwrite_reg_high(short port, unsigned char reg, unsigned char value)
reg179drivers/net/atp.hunsigned char outval = EOC | HNib | reg;
reg197drivers/net/atp.hwrite_reg_byte(short port, unsigned char reg, unsigned char value)
reg200drivers/net/atp.houtb(EOC | reg, port + PAR_DATA);   /* Reset the address register. */
reg201drivers/net/atp.houtval = WrAddr | reg;
reg223drivers/net/de4x5.cint reg;
reg234drivers/net/de4x5.cint reg;
reg561drivers/net/de4x5.cstatic int     test_mii_reg(struct device *dev, int reg, int mask, int pol, long msec);
reg2381drivers/net/de4x5.cstatic int test_mii_reg(struct device *dev, int reg, int mask, int pol, long msec)
reg2391drivers/net/de4x5.creg = mii_rd(reg, lp->phy[lp->active].addr, DE4X5_MII) & mask;
reg2392drivers/net/de4x5.ctest = (reg ^ pol) & mask;
reg2395drivers/net/de4x5.creg = 100 | TIMER_CB;
reg2400drivers/net/de4x5.creturn reg;
reg2410drivers/net/de4x5.cspd = mii_rd(lp->phy[lp->active].spd.reg, lp->phy[lp->active].addr, DE4X5_MII);
reg402drivers/net/de620.cde620_set_register(struct device *dev, byte reg, byte value)
reg405drivers/net/de620.coutb(reg, DATA_PORT);
reg412drivers/net/de620.cde620_get_register(struct device *dev, byte reg)
reg416drivers/net/de620.cde620_send_command(dev,reg);
reg340drivers/net/hp100.h#define hp100_inb( reg ) \
reg341drivers/net/hp100.hinb( ioaddr + HP100_REG_##reg )
reg342drivers/net/hp100.h#define hp100_inw( reg ) \
reg343drivers/net/hp100.hinw( ioaddr + HP100_REG_##reg )
reg344drivers/net/hp100.h#define hp100_inl( reg ) \
reg345drivers/net/hp100.hinl( ioaddr + HP100_REG_##reg )
reg346drivers/net/hp100.h#define hp100_outb( data, reg ) \
reg347drivers/net/hp100.houtb( data, ioaddr + HP100_REG_##reg )
reg348drivers/net/hp100.h#define hp100_outw( data, reg ) \
reg349drivers/net/hp100.houtw( data, ioaddr + HP100_REG_##reg )
reg350drivers/net/hp100.h#define hp100_outl( data, reg ) \
reg351drivers/net/hp100.houtl( data, ioaddr + HP100_REG_##reg )
reg352drivers/net/hp100.h#define hp100_orb( data, reg ) \
reg353drivers/net/hp100.houtb( inb( ioaddr + HP100_REG_##reg ) | (data), ioaddr + HP100_REG_##reg )
reg354drivers/net/hp100.h#define hp100_orw( data, reg ) \
reg355drivers/net/hp100.houtw( inw( ioaddr + HP100_REG_##reg ) | (data), ioaddr + HP100_REG_##reg )
reg356drivers/net/hp100.h#define hp100_andb( data, reg ) \
reg357drivers/net/hp100.houtb( inb( ioaddr + HP100_REG_##reg ) & (data), ioaddr + HP100_REG_##reg )
reg358drivers/net/hp100.h#define hp100_andw( data, reg ) \
reg359drivers/net/hp100.houtw( inw( ioaddr + HP100_REG_##reg ) & (data), ioaddr + HP100_REG_##reg )
reg112drivers/net/ni65.c#define writereg(val,reg) {outw(reg,PORT+L_ADDRREG);inw(PORT+L_ADDRREG); \
reg114drivers/net/ni65.c#define readreg(reg) (outw(reg,PORT+L_ADDRREG),inw(PORT+L_ADDRREG),\
reg564drivers/pci/pci.cint reg, len = 0;
reg648drivers/pci/pci.cfor (reg = PCI_BASE_ADDRESS_0; reg <= PCI_BASE_ADDRESS_5; reg += 4) {
reg652drivers/pci/pci.cpcibios_read_config_dword(bus, devfn, reg, &l);
reg678drivers/pci/pci.creg += 4;
reg679drivers/pci/pci.cpcibios_read_config_dword(bus, devfn, reg, &l);
reg108drivers/scsi/g_NCR5380.h#define NCR5380_read(reg) (inb(NCR5380_map_name + (reg)))
reg109drivers/scsi/g_NCR5380.h#define NCR5380_write(reg, value) (outb((value), (NCR5380_map_name + (reg))))
reg133drivers/scsi/g_NCR5380.h#define NCR5380_read(reg) (*(NCR5380_map_name + NCR53C400_mem_base + (reg)))
reg134drivers/scsi/g_NCR5380.h#define NCR5380_write(reg, value) (*(NCR5380_map_name + NCR53C400_mem_base + (reg)) = value)
reg492drivers/scsi/pas16.cregister unsigned short reg = (unsigned short) (instance->io_port + 
reg498drivers/scsi/pas16.cinsb( reg, d, i );
reg525drivers/scsi/pas16.cregister unsigned short reg = (instance->io_port + P_DATA_REG_OFFSET);
reg530drivers/scsi/pas16.coutsb( reg, s, i );
reg163drivers/scsi/pas16.h#define PAS16_io_port(reg) ( io_port + pas16_offset[(reg)] )
reg166drivers/scsi/pas16.h#define NCR5380_read(reg) ( inb(PAS16_io_port(reg)) )
reg167drivers/scsi/pas16.h#define NCR5380_write(reg, value) ( outb((value),PAS16_io_port(reg)) )
reg169drivers/scsi/pas16.h#define NCR5380_read(reg)            \
reg171drivers/scsi/pas16.h, instance->hostno, (reg), PAS16_io_port(reg))), inb( PAS16_io_port(reg)) )
reg173drivers/scsi/pas16.h#define NCR5380_write(reg, value)           \
reg175drivers/scsi/pas16.hinstance->hostno, (value), (reg), PAS16_io_port(reg)),  \
reg176drivers/scsi/pas16.houtb( (value),PAS16_io_port(reg) ) )
reg324drivers/scsi/t128.cregister unsigned char *reg = (unsigned char *) (instance->base + 
reg336drivers/scsi/t128.c*d++ = *reg;
reg368drivers/scsi/t128.cregister unsigned char *reg = (unsigned char *) (instance->base + 
reg379drivers/scsi/t128.c*reg = *s++;
reg141drivers/scsi/t128.h#define T128_address(reg) (base + T_5380_OFFSET + ((reg) * 0x20))
reg144drivers/scsi/t128.h#define NCR5380_read(reg) (*(T128_address(reg)))
reg145drivers/scsi/t128.h#define NCR5380_write(reg, value) (*(T128_address(reg)) = (value))
reg147drivers/scsi/t128.h#define NCR5380_read(reg)            \
reg149drivers/scsi/t128.h, instance->hostno, (reg), T128_address(reg))), *(T128_address(reg)))
reg151drivers/scsi/t128.h#define NCR5380_write(reg, value) {          \
reg153drivers/scsi/t128.hinstance->hostno, (value), (reg), T128_address(reg));  \
reg154drivers/scsi/t128.h*(T128_address(reg)) = (value);          \
reg322drivers/scsi/ultrastor.cstatic inline unsigned char xchgb(unsigned char reg,
reg325drivers/scsi/ultrastor.c__asm__ ("xchgb %0,%1" : "=q" (reg), "=m" (*mem) : "0" (reg));
reg326drivers/scsi/ultrastor.creturn reg;
reg134drivers/sound/ad1848.cad_read (ad1848_info * devc, int reg)
reg145drivers/sound/ad1848.coutb ((unsigned char) (reg & 0xff) | devc->MCE_bit, io_Index_Addr (devc));
reg154drivers/sound/ad1848.cad_write (ad1848_info * devc, int reg, int data)
reg165drivers/sound/ad1848.coutb ((unsigned char) (reg & 0xff) | devc->MCE_bit, io_Index_Addr (devc));
reg262drivers/sound/gus_wave.cgus_write8 (int reg, unsigned int data)
reg269drivers/sound/gus_wave.coutb (reg, u_Command);
reg276drivers/sound/gus_wave.cgus_read8 (int reg)
reg283drivers/sound/gus_wave.coutb (reg | 0x80, u_Command);
reg291drivers/sound/gus_wave.cgus_look8 (int reg)
reg298drivers/sound/gus_wave.coutb (reg, u_Command);
reg306drivers/sound/gus_wave.cgus_write16 (int reg, unsigned int data)
reg313drivers/sound/gus_wave.coutb (reg, u_Command);
reg322drivers/sound/gus_wave.cgus_read16 (int reg)
reg330drivers/sound/gus_wave.coutb (reg | 0x80, u_Command);
reg341drivers/sound/gus_wave.cgus_write_addr (int reg, unsigned long address, int is16bit)
reg360drivers/sound/gus_wave.cgus_write16 (reg, (unsigned short) ((address >> 7) & 0xffff));
reg361drivers/sound/gus_wave.cgus_write16 (reg + 1, (unsigned short) ((address << 9) & 0xffff));
reg364drivers/sound/gus_wave.cgus_write16 (reg, (unsigned short) ((address >> 7) & 0xffff));
reg365drivers/sound/gus_wave.cgus_write16 (reg + 1, (unsigned short) ((address << 9) & 0xffff));
reg152drivers/sound/sb_dsp.cess_write (unsigned char reg, unsigned char data)
reg156drivers/sound/sb_dsp.cif (!sb_dsp_command (reg))
reg163drivers/sound/sb_dsp.cess_read (unsigned char reg)
reg172drivers/sound/sb_dsp.cif (!sb_dsp_command (reg))
reg253drivers/sound/sb_mixer.cint             reg, val;
reg289drivers/sound/sb_mixer.creg = smw_mix_regs[dev];
reg290drivers/sound/sb_mixer.cif (reg == 0)
reg292drivers/sound/sb_mixer.csb_setmixer (reg, (24 - (24 * left / 100)) | 0x20);  /* 24=mute, 0=max */
reg293drivers/sound/sb_mixer.csb_setmixer (reg + 1, (24 - (24 * right / 100)) | 0x40);
reg176drivers/sound/sound_calls.hunsigned char gus_read8 (int reg);
reg177drivers/sound/sound_calls.hvoid gus_write8(int reg, unsigned int data);
reg129drivers/sound/sscape.csscape_read (struct sscape_info *devc, int reg)
reg136drivers/sound/sscape.coutb (reg, PORT (ODIE_ADDR));
reg143drivers/sound/sscape.csscape_write (struct sscape_info *devc, int reg, int data)
reg149drivers/sound/sscape.coutb (reg, PORT (ODIE_ADDR));
reg469fs/proc/array.c# define PT_REG(reg)    (PAGE_SIZE - sizeof(struct pt_regs)  \
reg470fs/proc/array.c+ (long)&((struct pt_regs *)0)->reg)
reg18include/asm-alpha/io.hunsigned long  *reg;
reg39include/asm-alpha/io.h*hae.reg = new_hae;
reg49include/asm-alpha/reg.h#define CORE_REG(reg, ubase) \
reg50include/asm-alpha/reg.h(((unsigned long *)((unsigned long)(ubase)))[reg])
reg215include/asm-i386/smp.hextern __inline void apic_write(unsigned long reg, unsigned long v)
reg217include/asm-i386/smp.h*((volatile unsigned long *)(apic_reg+reg))=v;
reg220include/asm-i386/smp.hextern __inline unsigned long apic_read(unsigned long reg)
reg222include/asm-i386/smp.hreturn *((volatile unsigned long *)(apic_reg+reg));
reg75include/asm-mips/reg.h#define CORE_REG(reg, ubase) \
reg76include/asm-mips/reg.h(((unsigned long *)((unsigned long)(ubase)))[reg])
reg54include/asm-sparc/kgdb.h#define SAVE_KGDB_GLOBALS(reg) \
reg55include/asm-sparc/kgdb.hstd     %g0, [%reg + REGWIN_SZ + KGDB_G0]; \
reg56include/asm-sparc/kgdb.hstd     %g2, [%reg + REGWIN_SZ + KGDB_G2]; \
reg57include/asm-sparc/kgdb.hstd     %g4, [%reg + REGWIN_SZ + KGDB_G4]; \
reg58include/asm-sparc/kgdb.hstd     %g6, [%reg + REGWIN_SZ + KGDB_G6];
reg60include/asm-sparc/kgdb.h#define SAVE_KGDB_INS(reg) \
reg61include/asm-sparc/kgdb.hstd     %i0, [%reg + REGWIN_SZ + KGDB_I0]; \
reg62include/asm-sparc/kgdb.hstd     %i2, [%reg + REGWIN_SZ + KGDB_I2]; \
reg63include/asm-sparc/kgdb.hstd     %i4, [%reg + REGWIN_SZ + KGDB_I4]; \
reg64include/asm-sparc/kgdb.hstd     %i6, [%reg + REGWIN_SZ + KGDB_I6];
reg66include/asm-sparc/kgdb.h#define SAVE_KGDB_SREGS(reg, reg_y, reg_psr, reg_wim, reg_tbr, reg_pc, reg_npc) \
reg67include/asm-sparc/kgdb.hst      %reg_y, [%reg + REGWIN_SZ + KGDB_Y]; \
reg68include/asm-sparc/kgdb.hst      %reg_psr, [%reg + REGWIN_SZ + KGDB_PSR]; \
reg69include/asm-sparc/kgdb.hst      %reg_wim, [%reg + REGWIN_SZ + KGDB_WIM]; \
reg70include/asm-sparc/kgdb.hst      %reg_tbr, [%reg + REGWIN_SZ + KGDB_TBR]; \
reg71include/asm-sparc/kgdb.hst      %reg_pc, [%reg + REGWIN_SZ + KGDB_PC]; \
reg72include/asm-sparc/kgdb.hst      %reg_npc, [%reg + REGWIN_SZ + KGDB_NPC];
reg74include/asm-sparc/kgdb.h#define LOAD_KGDB_GLOBALS(reg) \
reg75include/asm-sparc/kgdb.hld      [%reg + REGWIN_SZ + KGDB_G1], %g1; \
reg76include/asm-sparc/kgdb.hldd     [%reg + REGWIN_SZ + KGDB_G2], %g2; \
reg77include/asm-sparc/kgdb.hldd     [%reg + REGWIN_SZ + KGDB_G4], %g4; \
reg78include/asm-sparc/kgdb.hldd     [%reg + REGWIN_SZ + KGDB_G6], %g6;
reg80include/asm-sparc/kgdb.h#define LOAD_KGDB_INS(reg) \
reg81include/asm-sparc/kgdb.hldd     [%reg + REGWIN_SZ + KGDB_I0], %i0; \
reg82include/asm-sparc/kgdb.hldd     [%reg + REGWIN_SZ + KGDB_I2], %i2; \
reg83include/asm-sparc/kgdb.hldd     [%reg + REGWIN_SZ + KGDB_I4], %i4; \
reg84include/asm-sparc/kgdb.hldd     [%reg + REGWIN_SZ + KGDB_I6], %i6;
reg86include/asm-sparc/kgdb.h#define LOAD_KGDB_SREGS(reg, reg_y_and_psr, reg_pc_and_npc) \
reg87include/asm-sparc/kgdb.hldd     [%reg + REGWIN_SZ + KGDB_Y], %reg_y_and_psr; \
reg88include/asm-sparc/kgdb.hldd     [%reg + REGWIN_SZ + KGDB_PC], %reg_pc_and_npc;
reg24include/asm-sparc/winmacro.h#define STORE_WINDOW(reg) \
reg25include/asm-sparc/winmacro.hstd  %l0, [%reg + RW_L0]; \
reg26include/asm-sparc/winmacro.hstd  %l2, [%reg + RW_L2]; \
reg27include/asm-sparc/winmacro.hstd  %l4, [%reg + RW_L4]; \
reg28include/asm-sparc/winmacro.hstd  %l6, [%reg + RW_L6]; \
reg29include/asm-sparc/winmacro.hstd  %i0, [%reg + RW_I0]; \
reg30include/asm-sparc/winmacro.hstd  %i2, [%reg + RW_I2]; \
reg31include/asm-sparc/winmacro.hstd  %i4, [%reg + RW_I4]; \
reg32include/asm-sparc/winmacro.hstd  %i6, [%reg + RW_I6];
reg35include/asm-sparc/winmacro.h#define LOAD_WINDOW(reg) \
reg36include/asm-sparc/winmacro.hldd  [%reg + RW_L0], %l0; \
reg37include/asm-sparc/winmacro.hldd  [%reg + RW_L2], %l2; \
reg38include/asm-sparc/winmacro.hldd  [%reg + RW_L4], %l4; \
reg39include/asm-sparc/winmacro.hldd  [%reg + RW_L6], %l6; \
reg40include/asm-sparc/winmacro.hldd  [%reg + RW_I0], %i0; \
reg41include/asm-sparc/winmacro.hldd  [%reg + RW_I2], %i2; \
reg42include/asm-sparc/winmacro.hldd  [%reg + RW_I4], %i4; \
reg43include/asm-sparc/winmacro.hldd  [%reg + RW_I6], %i6;