tag	line	file	source code
reg	114	arch/alpha/kernel/bios32.c	unsigned int base, mask, size, reg;
reg	120	arch/alpha/kernel/bios32.c	for (reg = PCI_BASE_ADDRESS_0; reg <= PCI_BASE_ADDRESS_5; reg += 4) {
reg	125	arch/alpha/kernel/bios32.c	pcibios_write_config_dword(bus->number, dev->devfn, reg,
reg	127	arch/alpha/kernel/bios32.c	pcibios_read_config_dword(bus->number, dev->devfn, reg, &base);
reg	151	arch/alpha/kernel/bios32.c	reg, base | 0x1);
reg	172	arch/alpha/kernel/bios32.c	reg += 4;  /* skip extra 4 bytes */
reg	231	arch/alpha/kernel/bios32.c	reg, base);
reg	70	arch/alpha/kernel/ptrace.c	#define PT_REG(reg)  (PAGE_SIZE - sizeof(struct pt_regs)  \
reg	71	arch/alpha/kernel/ptrace.c	+ (long)&((struct pt_regs *)0)->reg)
reg	72	arch/alpha/kernel/ptrace.c	#define SW_REG(reg)  (PAGE_SIZE - sizeof(struct pt_regs)  \
reg	74	arch/alpha/kernel/ptrace.c	+ (long)&((struct switch_stack *)0)->reg)
reg	180	arch/alpha/kernel/traps.c	asmlinkage void do_entUna(void * va, unsigned long opcode, unsigned long reg,
reg	192	arch/alpha/kernel/traps.c	regs.pc - 4, va, opcode, reg);
reg	201	arch/alpha/kernel/traps.c	if (reg >= 16 && reg <= 18)
reg	202	arch/alpha/kernel/traps.c	reg += 19;
reg	205	arch/alpha/kernel/traps.c	*(reg+regs.regs) = (int) ldl_u(va);
reg	208	arch/alpha/kernel/traps.c	*(reg+regs.regs) = ldq_u(va);
reg	211	arch/alpha/kernel/traps.c	stl_u(*(reg+regs.regs), va);
reg	214	arch/alpha/kernel/traps.c	stq_u(*(reg+regs.regs), va);
reg	218	arch/alpha/kernel/traps.c	regs.pc, va, opcode, reg);
reg	279	arch/alpha/kernel/traps.c	asmlinkage void do_entUnaUser(void * va, unsigned long opcode, unsigned long reg,
reg	286	arch/alpha/kernel/traps.c	extern void alpha_write_fp_reg (unsigned long reg, unsigned long val);
reg	287	arch/alpha/kernel/traps.c	extern unsigned long alpha_read_fp_reg (unsigned long reg);
reg	297	arch/alpha/kernel/traps.c	*pc_addr - 4, va, opcode, reg);
reg	324	arch/alpha/kernel/traps.c	if (reg < 9) {
reg	325	arch/alpha/kernel/traps.c	reg_addr += 7 + reg;      /* v0-t7 in SAVE_ALL frame */
reg	326	arch/alpha/kernel/traps.c	} else if (reg < 16) {
reg	327	arch/alpha/kernel/traps.c	reg_addr += (reg - 9);      /* s0-s6 in entUna frame */
reg	328	arch/alpha/kernel/traps.c	} else if (reg < 19) {
reg	329	arch/alpha/kernel/traps.c	reg_addr += 7 + 20 + 3 + (reg - 16);  /* a0-a2 in PAL frame */
reg	330	arch/alpha/kernel/traps.c	} else if (reg < 29) {
reg	331	arch/alpha/kernel/traps.c	reg_addr += 7 + 9 + (reg - 19);    /* a3-at in SAVE_ALL frame */
reg	333	arch/alpha/kernel/traps.c	switch (reg) {
reg	350	arch/alpha/kernel/traps.c	alpha_write_fp_reg(reg, s_mem_to_reg(ldl_u(va)));
reg	353	arch/alpha/kernel/traps.c	alpha_write_fp_reg(reg, s_reg_to_mem(ldl_u(va)));
reg	356	arch/alpha/kernel/traps.c	case 0x23: alpha_write_fp_reg(reg, ldq_u(va)); break;  /* ldt */
reg	357	arch/alpha/kernel/traps.c	case 0x27: stq_u(alpha_read_fp_reg(reg), va);  break;  /* stt */
reg	369	arch/alpha/kernel/traps.c	if (opcode >= 0x28 && reg == 30 && dir == VERIFY_WRITE) {
reg	61	arch/alpha/math-emu/fp-emul.c	alpha_read_fp_reg (unsigned long reg)
reg	65	arch/alpha/math-emu/fp-emul.c	switch (reg) {
reg	112	arch/alpha/math-emu/fp-emul.c	# define LDT(reg,val)  \
reg	113	arch/alpha/math-emu/fp-emul.c	asm volatile ("ldt $f"#reg",%0" :: "m"(val));
reg	115	arch/alpha/math-emu/fp-emul.c	# define LDT(reg,val)  \
reg	116	arch/alpha/math-emu/fp-emul.c	asm volatile ("ldt $f"#reg",0(%0)" :: "r"(&val));
reg	120	arch/alpha/math-emu/fp-emul.c	alpha_write_fp_reg (unsigned long reg, unsigned long val)
reg	122	arch/alpha/math-emu/fp-emul.c	switch (reg) {
reg	612	arch/i386/kernel/smp.c	int reg;
reg	621	arch/i386/kernel/smp.c	reg = apic_read(APIC_VERSION);
reg	622	arch/i386/kernel/smp.c	SMP_PRINTK(("Getting VERSION: %x\n", reg));
reg	625	arch/i386/kernel/smp.c	reg = apic_read(APIC_VERSION);
reg	626	arch/i386/kernel/smp.c	SMP_PRINTK(("Getting VERSION: %x\n", reg));
reg	640	arch/i386/kernel/smp.c	reg = apic_read(APIC_LVT0);
reg	641	arch/i386/kernel/smp.c	SMP_PRINTK(("Getting LVT0: %x\n", reg));
reg	643	arch/i386/kernel/smp.c	reg = apic_read(APIC_LVT1);
reg	644	arch/i386/kernel/smp.c	SMP_PRINTK(("Getting LVT1: %x\n", reg));
reg	61	drivers/block/ali14xx.c	typedef struct { byte reg, data; } RegInitializer;
reg	100	drivers/block/ali14xx.c	static inline byte inReg (byte reg)
reg	102	drivers/block/ali14xx.c	outb_p(reg, regPort);
reg	109	drivers/block/ali14xx.c	static void outReg (byte data, byte reg)
reg	111	drivers/block/ali14xx.c	outb_p(reg, regPort);
reg	207	drivers/block/ali14xx.c	for (p = initData; p->reg != 0; ++p)
reg	208	drivers/block/ali14xx.c	outReg(p->data, p->reg);
reg	37	drivers/block/rz1000.c	unsigned short reg;
reg	40	drivers/block/rz1000.c	if ((rc = pcibios_read_config_word (bus, fn, PCI_COMMAND, &reg))) {
reg	42	drivers/block/rz1000.c	} else if (!(reg & 1)) {
reg	45	drivers/block/rz1000.c	if ((rc = pcibios_read_config_word(bus, fn, 0x40, &reg))
reg	46	drivers/block/rz1000.c	|| (rc =  pcibios_write_config_word(bus, fn, 0x40, reg & 0xdfff)))
reg	901	drivers/char/ftape/fdc-io.c	byte reg[10];
reg	916	drivers/char/ftape/fdc-io.c	for (i = 0; i < NR_ITEMS(reg); ++i) {
reg	917	drivers/char/ftape/fdc-io.c	fdc_read(&reg[i]);
reg	918	drivers/char/ftape/fdc-io.c	TRACEx2(6, "Register %d = 0x%02x", i, reg[i]);
reg	920	drivers/char/ftape/fdc-io.c	fdc_fifo_state = (reg[8] & 0x20) == 0;
reg	921	drivers/char/ftape/fdc-io.c	fdc_lock_state = reg[7] & 0x80;
reg	922	drivers/char/ftape/fdc-io.c	fdc_fifo_thr = 1 + (reg[8] & 0x0f);
reg	279	drivers/char/scc.c	InReg(register io_port port, register unsigned char reg)
reg	283	drivers/char/scc.c	Outb(port, reg);
reg	289	drivers/char/scc.c	Outb(port, reg);
reg	295	drivers/char/scc.c	OutReg(register io_port port, register unsigned char reg, register unsigned char val)
reg	298	drivers/char/scc.c	Outb(port, reg); udelay(SCC_LDELAY);
reg	301	drivers/char/scc.c	Outb(port, reg);
reg	307	drivers/char/scc.c	wr(register struct scc_channel *scc, register unsigned char reg, register unsigned char val)
reg	309	drivers/char/scc.c	OutReg(scc->ctrl, reg, (scc->wreg[reg] = val));
reg	313	drivers/char/scc.c	or(register struct scc_channel *scc, register unsigned char reg, register unsigned char val)
reg	315	drivers/char/scc.c	OutReg(scc->ctrl, reg, (scc->wreg[reg] |= val));
reg	319	drivers/char/scc.c	cl(register struct scc_channel *scc, register unsigned char reg, register unsigned char val)
reg	321	drivers/char/scc.c	OutReg(scc->ctrl, reg, (scc->wreg[reg] &= ~val));
reg	818	drivers/net/3c59x.c	int win, reg;
reg	824	drivers/net/3c59x.c	for (reg = 0; reg < 16; reg++)
reg	825	drivers/net/3c59x.c	printk(" %2.2x", inb(ioaddr+reg));
reg	158	drivers/net/atp.h	write_reg(short port, unsigned char reg, unsigned char value)
reg	161	drivers/net/atp.h	outb(EOC | reg, port + PAR_DATA);
reg	162	drivers/net/atp.h	outval = WrAddr | reg;
reg	177	drivers/net/atp.h	write_reg_high(short port, unsigned char reg, unsigned char value)
reg	179	drivers/net/atp.h	unsigned char outval = EOC | HNib | reg;
reg	197	drivers/net/atp.h	write_reg_byte(short port, unsigned char reg, unsigned char value)
reg	200	drivers/net/atp.h	outb(EOC | reg, port + PAR_DATA);   /* Reset the address register. */
reg	201	drivers/net/atp.h	outval = WrAddr | reg;
reg	223	drivers/net/de4x5.c	int reg;
reg	234	drivers/net/de4x5.c	int reg;
reg	561	drivers/net/de4x5.c	static int     test_mii_reg(struct device *dev, int reg, int mask, int pol, long msec);
reg	2381	drivers/net/de4x5.c	static int test_mii_reg(struct device *dev, int reg, int mask, int pol, long msec)
reg	2391	drivers/net/de4x5.c	reg = mii_rd(reg, lp->phy[lp->active].addr, DE4X5_MII) & mask;
reg	2392	drivers/net/de4x5.c	test = (reg ^ pol) & mask;
reg	2395	drivers/net/de4x5.c	reg = 100 | TIMER_CB;
reg	2400	drivers/net/de4x5.c	return reg;
reg	2410	drivers/net/de4x5.c	spd = mii_rd(lp->phy[lp->active].spd.reg, lp->phy[lp->active].addr, DE4X5_MII);
reg	402	drivers/net/de620.c	de620_set_register(struct device *dev, byte reg, byte value)
reg	405	drivers/net/de620.c	outb(reg, DATA_PORT);
reg	412	drivers/net/de620.c	de620_get_register(struct device *dev, byte reg)
reg	416	drivers/net/de620.c	de620_send_command(dev,reg);
reg	340	drivers/net/hp100.h	#define hp100_inb( reg ) \
reg	341	drivers/net/hp100.h	inb( ioaddr + HP100_REG_##reg )
reg	342	drivers/net/hp100.h	#define hp100_inw( reg ) \
reg	343	drivers/net/hp100.h	inw( ioaddr + HP100_REG_##reg )
reg	344	drivers/net/hp100.h	#define hp100_inl( reg ) \
reg	345	drivers/net/hp100.h	inl( ioaddr + HP100_REG_##reg )
reg	346	drivers/net/hp100.h	#define hp100_outb( data, reg ) \
reg	347	drivers/net/hp100.h	outb( data, ioaddr + HP100_REG_##reg )
reg	348	drivers/net/hp100.h	#define hp100_outw( data, reg ) \
reg	349	drivers/net/hp100.h	outw( data, ioaddr + HP100_REG_##reg )
reg	350	drivers/net/hp100.h	#define hp100_outl( data, reg ) \
reg	351	drivers/net/hp100.h	outl( data, ioaddr + HP100_REG_##reg )
reg	352	drivers/net/hp100.h	#define hp100_orb( data, reg ) \
reg	353	drivers/net/hp100.h	outb( inb( ioaddr + HP100_REG_##reg ) | (data), ioaddr + HP100_REG_##reg )
reg	354	drivers/net/hp100.h	#define hp100_orw( data, reg ) \
reg	355	drivers/net/hp100.h	outw( inw( ioaddr + HP100_REG_##reg ) | (data), ioaddr + HP100_REG_##reg )
reg	356	drivers/net/hp100.h	#define hp100_andb( data, reg ) \
reg	357	drivers/net/hp100.h	outb( inb( ioaddr + HP100_REG_##reg ) & (data), ioaddr + HP100_REG_##reg )
reg	358	drivers/net/hp100.h	#define hp100_andw( data, reg ) \
reg	359	drivers/net/hp100.h	outw( inw( ioaddr + HP100_REG_##reg ) & (data), ioaddr + HP100_REG_##reg )
reg	112	drivers/net/ni65.c	#define writereg(val,reg) {outw(reg,PORT+L_ADDRREG);inw(PORT+L_ADDRREG); \
reg	114	drivers/net/ni65.c	#define readreg(reg) (outw(reg,PORT+L_ADDRREG),inw(PORT+L_ADDRREG),\
reg	564	drivers/pci/pci.c	int reg, len = 0;
reg	648	drivers/pci/pci.c	for (reg = PCI_BASE_ADDRESS_0; reg <= PCI_BASE_ADDRESS_5; reg += 4) {
reg	652	drivers/pci/pci.c	pcibios_read_config_dword(bus, devfn, reg, &l);
reg	678	drivers/pci/pci.c	reg += 4;
reg	679	drivers/pci/pci.c	pcibios_read_config_dword(bus, devfn, reg, &l);
reg	109	drivers/scsi/g_NCR5380.h	#define NCR5380_read(reg) (inb(NCR5380_map_name + (reg)))
reg	110	drivers/scsi/g_NCR5380.h	#define NCR5380_write(reg, value) (outb((value), (NCR5380_map_name + (reg))))
reg	134	drivers/scsi/g_NCR5380.h	#define NCR5380_read(reg) (*(NCR5380_map_name + NCR53C400_mem_base + (reg)))
reg	135	drivers/scsi/g_NCR5380.h	#define NCR5380_write(reg, value) (*(NCR5380_map_name + NCR53C400_mem_base + (reg)) = value)
reg	492	drivers/scsi/pas16.c	register unsigned short reg = (unsigned short) (instance->io_port +
reg	498	drivers/scsi/pas16.c	insb( reg, d, i );
reg	525	drivers/scsi/pas16.c	register unsigned short reg = (instance->io_port + P_DATA_REG_OFFSET);
reg	530	drivers/scsi/pas16.c	outsb( reg, s, i );
reg	163	drivers/scsi/pas16.h	#define PAS16_io_port(reg) ( io_port + pas16_offset[(reg)] )
reg	166	drivers/scsi/pas16.h	#define NCR5380_read(reg) ( inb(PAS16_io_port(reg)) )
reg	167	drivers/scsi/pas16.h	#define NCR5380_write(reg, value) ( outb((value),PAS16_io_port(reg)) )
reg	169	drivers/scsi/pas16.h	#define NCR5380_read(reg)            \
reg	171	drivers/scsi/pas16.h	, instance->hostno, (reg), PAS16_io_port(reg))), inb( PAS16_io_port(reg)) )
reg	173	drivers/scsi/pas16.h	#define NCR5380_write(reg, value)           \
reg	175	drivers/scsi/pas16.h	instance->hostno, (value), (reg), PAS16_io_port(reg)),  \
reg	176	drivers/scsi/pas16.h	outb( (value),PAS16_io_port(reg) ) )
reg	324	drivers/scsi/t128.c	register unsigned char *reg = (unsigned char *) (instance->base +
reg	336	drivers/scsi/t128.c	*d++ = *reg;
reg	368	drivers/scsi/t128.c	register unsigned char *reg = (unsigned char *) (instance->base +
reg	379	drivers/scsi/t128.c	*reg = *s++;
reg	141	drivers/scsi/t128.h	#define T128_address(reg) (base + T_5380_OFFSET + ((reg) * 0x20))
reg	144	drivers/scsi/t128.h	#define NCR5380_read(reg) (*(T128_address(reg)))
reg	145	drivers/scsi/t128.h	#define NCR5380_write(reg, value) (*(T128_address(reg)) = (value))
reg	147	drivers/scsi/t128.h	#define NCR5380_read(reg)            \
reg	149	drivers/scsi/t128.h	, instance->hostno, (reg), T128_address(reg))), *(T128_address(reg)))
reg	151	drivers/scsi/t128.h	#define NCR5380_write(reg, value) {          \
reg	153	drivers/scsi/t128.h	instance->hostno, (value), (reg), T128_address(reg));  \
reg	154	drivers/scsi/t128.h	*(T128_address(reg)) = (value);          \
reg	322	drivers/scsi/ultrastor.c	static inline unsigned char xchgb(unsigned char reg,
reg	325	drivers/scsi/ultrastor.c	__asm__ ("xchgb %0,%1" : "=q" (reg), "=m" (*mem) : "0" (reg));
reg	326	drivers/scsi/ultrastor.c	return reg;
reg	134	drivers/sound/ad1848.c	ad_read (ad1848_info * devc, int reg)
reg	145	drivers/sound/ad1848.c	outb ((unsigned char) (reg & 0xff) | devc->MCE_bit, io_Index_Addr (devc));
reg	154	drivers/sound/ad1848.c	ad_write (ad1848_info * devc, int reg, int data)
reg	165	drivers/sound/ad1848.c	outb ((unsigned char) (reg & 0xff) | devc->MCE_bit, io_Index_Addr (devc));
reg	262	drivers/sound/gus_wave.c	gus_write8 (int reg, unsigned int data)
reg	269	drivers/sound/gus_wave.c	outb (reg, u_Command);
reg	276	drivers/sound/gus_wave.c	gus_read8 (int reg)
reg	283	drivers/sound/gus_wave.c	outb (reg | 0x80, u_Command);
reg	291	drivers/sound/gus_wave.c	gus_look8 (int reg)
reg	298	drivers/sound/gus_wave.c	outb (reg, u_Command);
reg	306	drivers/sound/gus_wave.c	gus_write16 (int reg, unsigned int data)
reg	313	drivers/sound/gus_wave.c	outb (reg, u_Command);
reg	322	drivers/sound/gus_wave.c	gus_read16 (int reg)
reg	330	drivers/sound/gus_wave.c	outb (reg | 0x80, u_Command);
reg	341	drivers/sound/gus_wave.c	gus_write_addr (int reg, unsigned long address, int is16bit)
reg	360	drivers/sound/gus_wave.c	gus_write16 (reg, (unsigned short) ((address >> 7) & 0xffff));
reg	361	drivers/sound/gus_wave.c	gus_write16 (reg + 1, (unsigned short) ((address << 9) & 0xffff));
reg	364	drivers/sound/gus_wave.c	gus_write16 (reg, (unsigned short) ((address >> 7) & 0xffff));
reg	365	drivers/sound/gus_wave.c	gus_write16 (reg + 1, (unsigned short) ((address << 9) & 0xffff));
reg	152	drivers/sound/sb_dsp.c	ess_write (unsigned char reg, unsigned char data)
reg	156	drivers/sound/sb_dsp.c	if (!sb_dsp_command (reg))
reg	163	drivers/sound/sb_dsp.c	ess_read (unsigned char reg)
reg	172	drivers/sound/sb_dsp.c	if (!sb_dsp_command (reg))
reg	253	drivers/sound/sb_mixer.c	int             reg, val;
reg	289	drivers/sound/sb_mixer.c	reg = smw_mix_regs[dev];
reg	290	drivers/sound/sb_mixer.c	if (reg == 0)
reg	292	drivers/sound/sb_mixer.c	sb_setmixer (reg, (24 - (24 * left / 100)) | 0x20);  /* 24=mute, 0=max */
reg	293	drivers/sound/sb_mixer.c	sb_setmixer (reg + 1, (24 - (24 * right / 100)) | 0x40);
reg	176	drivers/sound/sound_calls.h	unsigned char gus_read8 (int reg);
reg	177	drivers/sound/sound_calls.h	void gus_write8(int reg, unsigned int data);
reg	129	drivers/sound/sscape.c	sscape_read (struct sscape_info *devc, int reg)
reg	136	drivers/sound/sscape.c	outb (reg, PORT (ODIE_ADDR));
reg	143	drivers/sound/sscape.c	sscape_write (struct sscape_info *devc, int reg, int data)
reg	149	drivers/sound/sscape.c	outb (reg, PORT (ODIE_ADDR));
reg	472	fs/proc/array.c	# define PT_REG(reg)    (PAGE_SIZE - sizeof(struct pt_regs)  \
reg	473	fs/proc/array.c	+ (long)&((struct pt_regs *)0)->reg)
reg	18	include/asm-alpha/io.h	unsigned long  *reg;
reg	39	include/asm-alpha/io.h	*hae.reg = new_hae;
reg	49	include/asm-alpha/reg.h	#define CORE_REG(reg, ubase) \
reg	50	include/asm-alpha/reg.h	(((unsigned long *)((unsigned long)(ubase)))[reg])
reg	215	include/asm-i386/smp.h	extern __inline void apic_write(unsigned long reg, unsigned long v)
reg	217	include/asm-i386/smp.h	*((volatile unsigned long *)(apic_reg+reg))=v;
reg	220	include/asm-i386/smp.h	extern __inline unsigned long apic_read(unsigned long reg)
reg	222	include/asm-i386/smp.h	return *((volatile unsigned long *)(apic_reg+reg));
reg	75	include/asm-mips/reg.h	#define CORE_REG(reg, ubase) \
reg	76	include/asm-mips/reg.h	(((unsigned long *)((unsigned long)(ubase)))[reg])
reg	54	include/asm-sparc/kgdb.h	#define SAVE_KGDB_GLOBALS(reg) \
reg	55	include/asm-sparc/kgdb.h	std     %g0, [%reg + REGWIN_SZ + KGDB_G0]; \
reg	56	include/asm-sparc/kgdb.h	std     %g2, [%reg + REGWIN_SZ + KGDB_G2]; \
reg	57	include/asm-sparc/kgdb.h	std     %g4, [%reg + REGWIN_SZ + KGDB_G4]; \
reg	58	include/asm-sparc/kgdb.h	std     %g6, [%reg + REGWIN_SZ + KGDB_G6];
reg	60	include/asm-sparc/kgdb.h	#define SAVE_KGDB_INS(reg) \
reg	61	include/asm-sparc/kgdb.h	std     %i0, [%reg + REGWIN_SZ + KGDB_I0]; \
reg	62	include/asm-sparc/kgdb.h	std     %i2, [%reg + REGWIN_SZ + KGDB_I2]; \
reg	63	include/asm-sparc/kgdb.h	std     %i4, [%reg + REGWIN_SZ + KGDB_I4]; \
reg	64	include/asm-sparc/kgdb.h	std     %i6, [%reg + REGWIN_SZ + KGDB_I6];
reg	66	include/asm-sparc/kgdb.h	#define SAVE_KGDB_SREGS(reg, reg_y, reg_psr, reg_wim, reg_tbr, reg_pc, reg_npc) \
reg	67	include/asm-sparc/kgdb.h	st      %reg_y, [%reg + REGWIN_SZ + KGDB_Y]; \
reg	68	include/asm-sparc/kgdb.h	st      %reg_psr, [%reg + REGWIN_SZ + KGDB_PSR]; \
reg	69	include/asm-sparc/kgdb.h	st      %reg_wim, [%reg + REGWIN_SZ + KGDB_WIM]; \
reg	70	include/asm-sparc/kgdb.h	st      %reg_tbr, [%reg + REGWIN_SZ + KGDB_TBR]; \
reg	71	include/asm-sparc/kgdb.h	st      %reg_pc, [%reg + REGWIN_SZ + KGDB_PC]; \
reg	72	include/asm-sparc/kgdb.h	st      %reg_npc, [%reg + REGWIN_SZ + KGDB_NPC];
reg	74	include/asm-sparc/kgdb.h	#define LOAD_KGDB_GLOBALS(reg) \
reg	75	include/asm-sparc/kgdb.h	ld      [%reg + REGWIN_SZ + KGDB_G1], %g1; \
reg	76	include/asm-sparc/kgdb.h	ldd     [%reg + REGWIN_SZ + KGDB_G2], %g2; \
reg	77	include/asm-sparc/kgdb.h	ldd     [%reg + REGWIN_SZ + KGDB_G4], %g4; \
reg	78	include/asm-sparc/kgdb.h	ldd     [%reg + REGWIN_SZ + KGDB_G6], %g6;
reg	80	include/asm-sparc/kgdb.h	#define LOAD_KGDB_INS(reg) \
reg	81	include/asm-sparc/kgdb.h	ldd     [%reg + REGWIN_SZ + KGDB_I0], %i0; \
reg	82	include/asm-sparc/kgdb.h	ldd     [%reg + REGWIN_SZ + KGDB_I2], %i2; \
reg	83	include/asm-sparc/kgdb.h	ldd     [%reg + REGWIN_SZ + KGDB_I4], %i4; \
reg	84	include/asm-sparc/kgdb.h	ldd     [%reg + REGWIN_SZ + KGDB_I6], %i6;
reg	86	include/asm-sparc/kgdb.h	#define LOAD_KGDB_SREGS(reg, reg_y_and_psr, reg_pc_and_npc) \
reg	87	include/asm-sparc/kgdb.h	ldd     [%reg + REGWIN_SZ + KGDB_Y], %reg_y_and_psr; \
reg	88	include/asm-sparc/kgdb.h	ldd     [%reg + REGWIN_SZ + KGDB_PC], %reg_pc_and_npc;
reg	24	include/asm-sparc/winmacro.h	#define STORE_WINDOW(reg) \
reg	25	include/asm-sparc/winmacro.h	std  %l0, [%reg + RW_L0]; \
reg	26	include/asm-sparc/winmacro.h	std  %l2, [%reg + RW_L2]; \
reg	27	include/asm-sparc/winmacro.h	std  %l4, [%reg + RW_L4]; \
reg	28	include/asm-sparc/winmacro.h	std  %l6, [%reg + RW_L6]; \
reg	29	include/asm-sparc/winmacro.h	std  %i0, [%reg + RW_I0]; \
reg	30	include/asm-sparc/winmacro.h	std  %i2, [%reg + RW_I2]; \
reg	31	include/asm-sparc/winmacro.h	std  %i4, [%reg + RW_I4]; \
reg	32	include/asm-sparc/winmacro.h	std  %i6, [%reg + RW_I6];
reg	35	include/asm-sparc/winmacro.h	#define LOAD_WINDOW(reg) \
reg	36	include/asm-sparc/winmacro.h	ldd  [%reg + RW_L0], %l0; \
reg	37	include/asm-sparc/winmacro.h	ldd  [%reg + RW_L2], %l2; \
reg	38	include/asm-sparc/winmacro.h	ldd  [%reg + RW_L4], %l4; \
reg	39	include/asm-sparc/winmacro.h	ldd  [%reg + RW_L6], %l6; \
reg	40	include/asm-sparc/winmacro.h	ldd  [%reg + RW_I0], %i0; \
reg	41	include/asm-sparc/winmacro.h	ldd  [%reg + RW_I2], %i2; \
reg	42	include/asm-sparc/winmacro.h	ldd  [%reg + RW_I4], %i4; \
reg	43	include/asm-sparc/winmacro.h	ldd  [%reg + RW_I6], %i6;