This source file includes following definitions.
- pci_lookup_dev
- pci_strclass
- pci_strvendor
- pci_strdev
- burst_bridge
- sprint_dev_config
- get_pci_list
- pci_malloc
- scan_bus
- pci_init
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8
9 #include <linux/config.h>
10 #include <linux/ptrace.h>
11 #include <linux/types.h>
12 #include <linux/kernel.h>
13 #include <linux/bios32.h>
14 #include <linux/pci.h>
15 #include <linux/string.h>
16
17 #include <asm/page.h>
18
19 struct pci_bus pci_root;
20 struct pci_dev *pci_devices = 0;
21
22
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27
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29
30
31
32 #define DEVICE(vid,did,name) \
33 {PCI_VENDOR_ID_##vid, PCI_DEVICE_ID_##did, (name), 0xff}
34
35 #define BRIDGE(vid,did,name,bridge) \
36 {PCI_VENDOR_ID_##vid, PCI_DEVICE_ID_##did, (name), (bridge)}
37
38
39
40
41
42
43 struct pci_dev_info dev_info[] = {
44 DEVICE( COMPAQ, COMPAQ_1280, "QVision 1280/p"),
45 DEVICE( COMPAQ, COMPAQ_THUNDER, "ThunderLAN"),
46 DEVICE( NCR, NCR_53C810, "53c810"),
47 DEVICE( NCR, NCR_53C820, "53c820"),
48 DEVICE( NCR, NCR_53C825, "53c825"),
49 DEVICE( NCR, NCR_53C815, "53c815"),
50 DEVICE( ATI, ATI_68800, "68800AX"),
51 DEVICE( ATI, ATI_215CT222, "215CT222"),
52 DEVICE( ATI, ATI_210888CX, "210888CX"),
53 DEVICE( ATI, ATI_210888GX, "210888GX"),
54 DEVICE( VLSI, VLSI_82C592, "82C592-FC1"),
55 DEVICE( VLSI, VLSI_82C593, "82C593-FC1"),
56 DEVICE( VLSI, VLSI_82C594, "82C594-AFC2"),
57 DEVICE( VLSI, VLSI_82C597, "82C597-AFC2"),
58 DEVICE( ADL, ADL_2301, "2301"),
59 DEVICE( NS, NS_87410, "87410"),
60 DEVICE( TSENG, TSENG_W32P_2, "ET4000W32P"),
61 DEVICE( TSENG, TSENG_W32P_b, "ET4000W32P rev B"),
62 DEVICE( TSENG, TSENG_W32P_c, "ET4000W32P rev C"),
63 DEVICE( TSENG, TSENG_W32P_d, "ET4000W32P rev D"),
64 DEVICE( WEITEK, WEITEK_P9000, "P9000"),
65 DEVICE( WEITEK, WEITEK_P9100, "P9100"),
66 BRIDGE( DEC, DEC_BRD, "DC21050", 0x00),
67 DEVICE( DEC, DEC_TULIP, "DC21040"),
68 DEVICE( DEC, DEC_TGA, "DC21030"),
69 DEVICE( DEC, DEC_TULIP_FAST, "DC21140"),
70 DEVICE( DEC, DEC_FDDI, "DEFPA"),
71 DEVICE( DEC, DEC_TULIP_PLUS, "DC21041"),
72 DEVICE( CIRRUS, CIRRUS_5430, "GD 5430"),
73 DEVICE( CIRRUS, CIRRUS_5434_4, "GD 5434"),
74 DEVICE( CIRRUS, CIRRUS_5434_8, "GD 5434"),
75 DEVICE( CIRRUS, CIRRUS_5436, "GD 5436"),
76 DEVICE( CIRRUS, CIRRUS_6729, "CL 6729"),
77 DEVICE( CIRRUS, CIRRUS_7542, "CL 7542"),
78 DEVICE( CIRRUS, CIRRUS_7543, "CL 7543"),
79 DEVICE( IBM, IBM_82G2675, "82G2675"),
80 DEVICE( WD, WD_7197, "WD 7197"),
81 DEVICE( AMD, AMD_LANCE, "79C970"),
82 DEVICE( AMD, AMD_SCSI, "53C974"),
83 DEVICE( TRIDENT, TRIDENT_9420, "TG 9420"),
84 DEVICE( TRIDENT, TRIDENT_9440, "TG 9440"),
85 DEVICE( TRIDENT, TRIDENT_9660, "TG 9660"),
86 DEVICE( AI, AI_M1435, "M1435"),
87 DEVICE( MATROX, MATROX_MGA_2, "Atlas PX2085"),
88 DEVICE( MATROX, MATROX_MIL ,"Millenium"),
89 DEVICE( MATROX, MATROX_MGA_IMP, "MGA Impression"),
90 DEVICE( CT, CT_65545, "65545"),
91 DEVICE( CT, CT_65548, "65548"),
92 DEVICE( MIRO, MIRO_36050, "ZR36050"),
93 DEVICE( FD, FD_36C70, "TMC-18C30"),
94 DEVICE( SI, SI_6201, "6201"),
95 DEVICE( SI, SI_6202, "6202"),
96 DEVICE( SI, SI_6205, "6205"),
97 DEVICE( SI, SI_503, "85C503"),
98 DEVICE( SI, SI_501, "85C501"),
99 DEVICE( SI, SI_496, "85C496"),
100 DEVICE( SI, SI_601, "85C601"),
101 DEVICE( SI, SI_5511, "85C5511"),
102 DEVICE( SI, SI_5513, "85C5513"),
103 DEVICE( HP, HP_J2585A, "J2585A"),
104 DEVICE( PCTECH, PCTECH_RZ1000, "RZ1000 (buggy)"),
105 DEVICE( PCTECH, PCTECH_RZ1001, "RZ1001 (buggy?)"),
106 DEVICE( DPT, DPT, "SmartCache/Raid"),
107 DEVICE( OPTI, OPTI_92C178, "92C178"),
108 DEVICE( OPTI, OPTI_82C557, "82C557"),
109 DEVICE( OPTI, OPTI_82C558, "82C558"),
110 DEVICE( OPTI, OPTI_82C621, "82C621"),
111 DEVICE( OPTI, OPTI_82C822, "82C822"),
112 DEVICE( SGS, SGS_2000, "STG 2000X"),
113 DEVICE( SGS, SGS_1764, "STG 1764X"),
114 DEVICE( BUSLOGIC, BUSLOGIC_946C_2,"BT-946C"),
115 DEVICE( BUSLOGIC, BUSLOGIC_946C, "BT-946C"),
116 DEVICE( BUSLOGIC, BUSLOGIC_930, "BT-930"),
117 DEVICE( OAK, OAK_OTI107, "OTI107"),
118 DEVICE( PROMISE, PROMISE_5300, "DC5030"),
119 DEVICE( N9, N9_I128, "Imagine 128"),
120 DEVICE( N9, N9_I128_2, "Imagine 128v2"),
121 DEVICE( UMC, UMC_UM8673F, "UM8673F"),
122 BRIDGE( UMC, UMC_UM8891A, "UM8891A", 0x01),
123 DEVICE( UMC, UMC_UM8886BF, "UM8886BF"),
124 DEVICE( UMC, UMC_UM8886A, "UM8886A"),
125 BRIDGE( UMC, UMC_UM8881F, "UM8881F", 0x02),
126 DEVICE( UMC, UMC_UM8886F, "UM8886F"),
127 DEVICE( UMC, UMC_UM9017F, "UM9017F"),
128 DEVICE( UMC, UMC_UM8886N, "UM8886N"),
129 DEVICE( UMC, UMC_UM8891N, "UM8891N"),
130 DEVICE( X, X_AGX016, "ITT AGX016"),
131 DEVICE( NEXGEN, NEXGEN_82C501, "82C501"),
132 DEVICE( QLOGIC, QLOGIC_ISP1020, "ISP1020"),
133 DEVICE( QLOGIC, QLOGIC_ISP1022, "ISP1022"),
134 DEVICE( LEADTEK, LEADTEK_805, "S3 805"),
135 DEVICE( CONTAQ, CONTAQ_82C599, "82C599"),
136 DEVICE( CMD, CMD_640, "640 (buggy)"),
137 DEVICE( CMD, CMD_646, "646"),
138 DEVICE( VISION, VISION_QD8500, "QD-8500"),
139 DEVICE( VISION, VISION_QD8580, "QD-8580"),
140 DEVICE( SIERRA, SIERRA_STB, "STB Horizon 64"),
141 DEVICE( ACC, ACC_2056, "2056"),
142 DEVICE( WINBOND, WINBOND_83769, "W83769F"),
143 DEVICE( WINBOND, WINBOND_82C105, "SL82C105"),
144 DEVICE( 3COM, 3COM_3C590, "3C590 10bT"),
145 DEVICE( 3COM, 3COM_3C595TX, "3C595 100bTX"),
146 DEVICE( 3COM, 3COM_3C595T4, "3C595 100bT4"),
147 DEVICE( 3COM, 3COM_3C595MII, "3C595 100b-MII"),
148 DEVICE( AL, AL_M1445, "M1445"),
149 DEVICE( AL, AL_M1449, "M1449"),
150 DEVICE( AL, AL_M1451, "M1451"),
151 DEVICE( AL, AL_M1461, "M1461"),
152 DEVICE( AL, AL_M1489, "M1489"),
153 DEVICE( AL, AL_M1511, "M1511"),
154 DEVICE( AL, AL_M1513, "M1513"),
155 DEVICE( AL, AL_M4803, "M4803"),
156 DEVICE( ASP, ASP_ABP940, "ABP940"),
157 DEVICE( IMS, IMS_8849, "8849"),
158 DEVICE( TEKRAM2, TEKRAM2_690c, "DC690c"),
159 DEVICE( AMCC, AMCC_MYRINET, "Myrinet PCI (M2-PCI-32)"),
160 DEVICE( INTERG, INTERG_1680, "IGA-1680"),
161 DEVICE( REALTEK, REALTEK_8029, "8029"),
162 DEVICE( INIT, INIT_320P, "320 P"),
163 DEVICE( VIA, VIA_82C505, "VT 82C505"),
164 DEVICE( VIA, VIA_82C561, "VT 82C561"),
165 DEVICE( VIA, VIA_82C576, "VT 82C576 3V"),
166 DEVICE( VIA, VIA_82C416, "VT 82C416MV"),
167 DEVICE( VORTEX, VORTEX_GDT60x0, "GDT 60x0"),
168 DEVICE( VORTEX, VORTEX_GDT6000B,"GDT 6000b"),
169 DEVICE( VORTEX, VORTEX_GDT6x10, "GDT 6110/6510"),
170 DEVICE( VORTEX, VORTEX_GDT6x20, "GDT 6120/6520"),
171 DEVICE( VORTEX, VORTEX_GDT6530, "GDT 6530"),
172 DEVICE( VORTEX, VORTEX_GDT6550, "GDT 6550"),
173 DEVICE( VORTEX, VORTEX_GDT6x17, "GDT 6117/6517"),
174 DEVICE( VORTEX, VORTEX_GDT6x27, "GDT 6127/6527"),
175 DEVICE( VORTEX, VORTEX_GDT6537, "GDT 6537"),
176 DEVICE( VORTEX, VORTEX_GDT6557, "GDT 6557"),
177 DEVICE( VORTEX, VORTEX_GDT6x15, "GDT 6115/6515"),
178 DEVICE( VORTEX, VORTEX_GDT6x25, "GDT 6125/6525"),
179 DEVICE( VORTEX, VORTEX_GDT6535, "GDT 6535"),
180 DEVICE( VORTEX, VORTEX_GDT6555, "GDT 6555"),
181 DEVICE( EF, EF_ATM_FPGA, "155P-MF1 (FPGA)"),
182 DEVICE( EF, EF_ATM_ASIC, "155P-MF1 (ASIC)"),
183 DEVICE( IMAGINGTECH, IMAGINGTECH_ICPCI, "MVC IC-PCI"),
184 DEVICE( FORE, FORE_PCA200PC, "PCA-200PC"),
185 DEVICE( FORE, FORE_PCA200E, "PCA-200E"),
186 DEVICE( PLX, PLX_9060, "PCI9060 i960 bridge"),
187 DEVICE( ALLIANCE, ALLIANCE_PROMOTIO, "Promotion-6410"),
188 DEVICE( ALLIANCE, ALLIANCE_PROVIDEO, "Provideo"),
189 DEVICE( VMIC, VMIC_VME, "VMIVME-7587"),
190 DEVICE( MUTECH, MUTECH_MV1000, "MV-1000"),
191 DEVICE( ZEITNET, ZEITNET_1221, "1221"),
192 DEVICE( ZEITNET, ZEITNET_1225, "1225"),
193 DEVICE( SPECIALIX, SPECIALIX_XIO, "XIO/SIO host"),
194 DEVICE( SPECIALIX, SPECIALIX_RIO, "RIO host"),
195 DEVICE( RP, RP8OCTA, "RocketPort 8 Oct"),
196 DEVICE( RP, RP8INTF, "RocketPort 8 Intf"),
197 DEVICE( RP, RP16INTF, "RocketPort 16 Intf"),
198 DEVICE( RP, RP32INTF, "RocketPort 32 Intf"),
199 DEVICE( CYCLADES, CYCLADES_Y, "Cyclome-Y"),
200 DEVICE( SYMPHONY, SYMPHONY_101, "82C101"),
201 DEVICE( TEKRAM, TEKRAM_DC290, "DC-290"),
202 DEVICE( AVANCE, AVANCE_2302, "ALG-2302"),
203 DEVICE( S3, S3_811, "Trio32/Trio64"),
204 DEVICE( S3, S3_868, "Vision 868"),
205 DEVICE( S3, S3_928, "Vision 928-P"),
206 DEVICE( S3, S3_864_1, "Vision 864-P"),
207 DEVICE( S3, S3_864_2, "Vision 864-P"),
208 DEVICE( S3, S3_964_1, "Vision 964-P"),
209 DEVICE( S3, S3_964_2, "Vision 964-P"),
210 DEVICE( S3, S3_968, "Vision 968"),
211 DEVICE( INTEL, INTEL_82375, "82375EB"),
212 BRIDGE( INTEL, INTEL_82424, "82424ZX Saturn", 0x00),
213 DEVICE( INTEL, INTEL_82378, "82378IB"),
214 DEVICE( INTEL, INTEL_82430, "82430ZX Aries"),
215 BRIDGE( INTEL, INTEL_82434, "82434LX Mercury/Neptune", 0x00),
216 DEVICE( INTEL, INTEL_7116, "SAA7116"),
217 DEVICE( INTEL, INTEL_82596, "82596"),
218 DEVICE( INTEL, INTEL_82865, "82865"),
219 DEVICE( INTEL, INTEL_82557, "82557"),
220 DEVICE( INTEL, INTEL_82437, "82437"),
221 DEVICE( INTEL, INTEL_82371_0, "82371 Triton PIIX"),
222 DEVICE( INTEL, INTEL_82371_1, "82371 Triton PIIX"),
223 DEVICE( INTEL, INTEL_P6, "Orion P6"),
224 DEVICE( ADAPTEC, ADAPTEC_7850, "AIC-7850"),
225 DEVICE( ADAPTEC, ADAPTEC_7855, "AIC-7855"),
226 DEVICE( ADAPTEC, ADAPTEC_7870, "AIC-7870"),
227 DEVICE( ADAPTEC, ADAPTEC_7871, "AIC-7871"),
228 DEVICE( ADAPTEC, ADAPTEC_7872, "AIC-7872"),
229 DEVICE( ADAPTEC, ADAPTEC_7873, "AIC-7873"),
230 DEVICE( ADAPTEC, ADAPTEC_7874, "AIC-7874"),
231 DEVICE( ADAPTEC, ADAPTEC_7880, "AIC-7880U"),
232 DEVICE( ADAPTEC, ADAPTEC_7881, "AIC-7881U"),
233 DEVICE( ADAPTEC, ADAPTEC_7882, "AIC-7882U"),
234 DEVICE( ADAPTEC, ADAPTEC_7883, "AIC-7883U"),
235 DEVICE( ADAPTEC, ADAPTEC_7884, "AIC-7884U"),
236 DEVICE( ATRONICS, ATRONICS_2015, "IDE-2015PL"),
237 DEVICE( HER, HER_STING, "Stingray"),
238 DEVICE( HER, HER_STINGARK, "Stingray ARK 2000PV")
239 };
240
241
242 #ifdef CONFIG_PCI_OPTIMIZE
243
244
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258
259 struct optimization_type {
260 const char *type;
261 const char *off;
262 const char *on;
263 } bridge_optimization[] = {
264 {"Cache L2", "write through", "write back"},
265 {"CPU-PCI posted write", "off", "on"},
266 {"CPU-Memory posted write", "off", "on"},
267 {"PCI-Memory posted write", "off", "on"},
268 {"PCI burst", "off", "on"}
269 };
270
271 #define NUM_OPTIMIZATIONS \
272 (sizeof(bridge_optimization) / sizeof(bridge_optimization[0]))
273
274 struct bridge_mapping_type {
275 unsigned char addr;
276 unsigned char mask;
277 unsigned char value;
278 } bridge_mapping[] = {
279
280
281
282
283
284
285
286 {0x0 ,0x02 ,0x02 },
287 {0x53 ,0x02 ,0x02 },
288 {0x53 ,0x01 ,0x01 },
289 {0x54 ,0x01 ,0x01 },
290 {0x54 ,0x02 ,0x02 },
291
292
293
294
295
296 {0x50 ,0x10 ,0x00 },
297 {0x51 ,0x40 ,0x40 },
298 {0x0 ,0x0 ,0x0 },
299 {0x0 ,0x0 ,0x0 },
300 {0x0 ,0x0 ,0x0 },
301
302
303
304
305
306
307 {0x0 ,0x1 ,0x1 },
308 {0x0 ,0x2 ,0x0 },
309 {0x0 ,0x0 ,0x0 },
310 {0x0 ,0x0 ,0x0 },
311 {0x0 ,0x0 ,0x0 }
312 };
313
314 #endif
315
316
317
318
319
320 struct pci_dev_info *pci_lookup_dev(unsigned int vendor, unsigned int dev)
321 {
322 int min = 0,
323 max = sizeof(dev_info)/sizeof(dev_info[0]) - 1;
324
325 for ( ; ; )
326 {
327 int i = (min + max) >> 1;
328 long order;
329
330 order = dev_info[i].vendor - (long) vendor;
331 if (!order)
332 order = dev_info[i].device - (long) dev;
333
334 if (order < 0)
335 {
336 min = i + 1;
337 if ( min > max )
338 return 0;
339 continue;
340 }
341
342 if (order > 0)
343 {
344 max = i - 1;
345 if ( min > max )
346 return 0;
347 continue;
348 }
349
350 return & dev_info[ i ];
351 }
352 }
353
354 const char *pci_strclass (unsigned int class)
355 {
356 switch (class >> 8) {
357 case PCI_CLASS_NOT_DEFINED: return "Non-VGA device";
358 case PCI_CLASS_NOT_DEFINED_VGA: return "VGA compatible device";
359
360 case PCI_CLASS_STORAGE_SCSI: return "SCSI storage controller";
361 case PCI_CLASS_STORAGE_IDE: return "IDE interface";
362 case PCI_CLASS_STORAGE_FLOPPY: return "Floppy disk controller";
363 case PCI_CLASS_STORAGE_IPI: return "IPI bus controller";
364 case PCI_CLASS_STORAGE_RAID: return "RAID bus controller";
365 case PCI_CLASS_STORAGE_OTHER: return "Unknown mass storage controller";
366
367 case PCI_CLASS_NETWORK_ETHERNET: return "Ethernet controller";
368 case PCI_CLASS_NETWORK_TOKEN_RING: return "Token ring network controller";
369 case PCI_CLASS_NETWORK_FDDI: return "FDDI network controller";
370 case PCI_CLASS_NETWORK_ATM: return "ATM network controller";
371 case PCI_CLASS_NETWORK_OTHER: return "Network controller";
372
373 case PCI_CLASS_DISPLAY_VGA: return "VGA compatible controller";
374 case PCI_CLASS_DISPLAY_XGA: return "XGA compatible controller";
375 case PCI_CLASS_DISPLAY_OTHER: return "Display controller";
376
377 case PCI_CLASS_MULTIMEDIA_VIDEO: return "Multimedia video controller";
378 case PCI_CLASS_MULTIMEDIA_AUDIO: return "Multimedia audio controller";
379 case PCI_CLASS_MULTIMEDIA_OTHER: return "Multimedia controller";
380
381 case PCI_CLASS_MEMORY_RAM: return "RAM memory";
382 case PCI_CLASS_MEMORY_FLASH: return "FLASH memory";
383 case PCI_CLASS_MEMORY_OTHER: return "Memory";
384
385 case PCI_CLASS_BRIDGE_HOST: return "Host bridge";
386 case PCI_CLASS_BRIDGE_ISA: return "ISA bridge";
387 case PCI_CLASS_BRIDGE_EISA: return "EISA bridge";
388 case PCI_CLASS_BRIDGE_MC: return "MicroChannel bridge";
389 case PCI_CLASS_BRIDGE_PCI: return "PCI bridge";
390 case PCI_CLASS_BRIDGE_PCMCIA: return "PCMCIA bridge";
391 case PCI_CLASS_BRIDGE_NUBUS: return "NuBus bridge";
392 case PCI_CLASS_BRIDGE_CARDBUS: return "CardBus bridge";
393 case PCI_CLASS_BRIDGE_OTHER: return "Bridge";
394
395 case PCI_CLASS_COMMUNICATION_SERIAL: return "Serial controller";
396 case PCI_CLASS_COMMUNICATION_PARALLEL: return "Parallel controller";
397 case PCI_CLASS_COMMUNICATION_OTHER: return "Communication controller";
398
399 case PCI_CLASS_SYSTEM_PIC: return "PIC";
400 case PCI_CLASS_SYSTEM_DMA: return "DMA controller";
401 case PCI_CLASS_SYSTEM_TIMER: return "Timer";
402 case PCI_CLASS_SYSTEM_RTC: return "RTC";
403 case PCI_CLASS_SYSTEM_OTHER: return "System peripheral";
404
405 case PCI_CLASS_INPUT_KEYBOARD: return "Keyboard controller";
406 case PCI_CLASS_INPUT_PEN: return "Digitizer Pen";
407 case PCI_CLASS_INPUT_MOUSE: return "Mouse controller";
408 case PCI_CLASS_INPUT_OTHER: return "Input device controller";
409
410 case PCI_CLASS_DOCKING_GENERIC: return "Generic Docking Station";
411 case PCI_CLASS_DOCKING_OTHER: return "Docking Station";
412
413 case PCI_CLASS_PROCESSOR_386: return "386";
414 case PCI_CLASS_PROCESSOR_486: return "486";
415 case PCI_CLASS_PROCESSOR_PENTIUM: return "Pentium";
416 case PCI_CLASS_PROCESSOR_ALPHA: return "Alpha";
417 case PCI_CLASS_PROCESSOR_POWERPC: return "Power PC";
418 case PCI_CLASS_PROCESSOR_CO: return "Co-processor";
419
420 case PCI_CLASS_SERIAL_FIREWIRE: return "FireWire (IEEE 1394)";
421 case PCI_CLASS_SERIAL_ACCESS: return "ACCESS Bus";
422 case PCI_CLASS_SERIAL_SSA: return "SSA";
423 case PCI_CLASS_SERIAL_FIBER: return "Fiber Channel";
424
425 default: return "Unknown class";
426 }
427 }
428
429
430 const char *pci_strvendor(unsigned int vendor)
431 {
432 switch (vendor) {
433 case PCI_VENDOR_ID_COMPAQ: return "Compaq";
434 case PCI_VENDOR_ID_NCR: return "NCR";
435 case PCI_VENDOR_ID_ATI: return "ATI";
436 case PCI_VENDOR_ID_VLSI: return "VLSI";
437 case PCI_VENDOR_ID_ADL: return "Advance Logic";
438 case PCI_VENDOR_ID_NS: return "NS";
439 case PCI_VENDOR_ID_TSENG: return "Tseng'Lab";
440 case PCI_VENDOR_ID_WEITEK: return "Weitek";
441 case PCI_VENDOR_ID_DEC: return "DEC";
442 case PCI_VENDOR_ID_CIRRUS: return "Cirrus Logic";
443 case PCI_VENDOR_ID_IBM: return "IBM";
444 case PCI_VENDOR_ID_WD: return "Western Digital";
445 case PCI_VENDOR_ID_AMD: return "AMD";
446 case PCI_VENDOR_ID_TRIDENT: return "Trident";
447 case PCI_VENDOR_ID_AI: return "Acer Incorporated";
448 case PCI_VENDOR_ID_MATROX: return "Matrox";
449 case PCI_VENDOR_ID_CT: return "Chips & Technologies";
450 case PCI_VENDOR_ID_MIRO: return "Miro";
451 case PCI_VENDOR_ID_FD: return "Future Domain";
452 case PCI_VENDOR_ID_SI: return "Silicon Integrated Systems";
453 case PCI_VENDOR_ID_HP: return "Hewlett Packard";
454 case PCI_VENDOR_ID_PCTECH: return "PCTECH";
455 case PCI_VENDOR_ID_DPT: return "DPT";
456 case PCI_VENDOR_ID_OPTI: return "OPTI";
457 case PCI_VENDOR_ID_SGS: return "SGS Thomson";
458 case PCI_VENDOR_ID_BUSLOGIC: return "BusLogic";
459 case PCI_VENDOR_ID_OAK: return "OAK";
460 case PCI_VENDOR_ID_PROMISE: return "Promise Technology";
461 case PCI_VENDOR_ID_N9: return "Number Nine";
462 case PCI_VENDOR_ID_UMC: return "UMC";
463 case PCI_VENDOR_ID_X: return "X TECHNOLOGY";
464 case PCI_VENDOR_ID_NEXGEN: return "Nexgen";
465 case PCI_VENDOR_ID_QLOGIC: return "Q Logic";
466 case PCI_VENDOR_ID_LEADTEK: return "Leadtek Research";
467 case PCI_VENDOR_ID_CONTAQ: return "Contaq";
468 case PCI_VENDOR_ID_FOREX: return "Forex";
469 case PCI_VENDOR_ID_OLICOM: return "Olicom";
470 case PCI_VENDOR_ID_CMD: return "CMD";
471 case PCI_VENDOR_ID_VISION: return "Vision";
472 case PCI_VENDOR_ID_SIERRA: return "Sierra";
473 case PCI_VENDOR_ID_ACC: return "ACC MICROELECTRONICS";
474 case PCI_VENDOR_ID_WINBOND: return "Winbond";
475 case PCI_VENDOR_ID_3COM: return "3Com";
476 case PCI_VENDOR_ID_AL: return "Acer Labs";
477 case PCI_VENDOR_ID_ASP: return "Advanced System Products";
478 case PCI_VENDOR_ID_IMS: return "IMS";
479 case PCI_VENDOR_ID_TEKRAM2: return "Tekram";
480 case PCI_VENDOR_ID_AMCC: return "AMCC";
481 case PCI_VENDOR_ID_INTERG: return "Intergraphics";
482 case PCI_VENDOR_ID_REALTEK: return "Realtek";
483 case PCI_VENDOR_ID_INIT: return "Initio Corp";
484 case PCI_VENDOR_ID_VIA: return "VIA Technologies";
485 case PCI_VENDOR_ID_VORTEX: return "VORTEX";
486 case PCI_VENDOR_ID_EF: return "Efficient Networks";
487 case PCI_VENDOR_ID_FORE: return "Fore Systems";
488 case PCI_VENDOR_ID_IMAGINGTECH: return "Imaging Technology";
489 case PCI_VENDOR_ID_PLX: return "PLX";
490 case PCI_VENDOR_ID_ALLIANCE: return "Alliance";
491 case PCI_VENDOR_ID_VMIC: return "VMIC";
492 case PCI_VENDOR_ID_MUTECH: return "Mutech";
493 case PCI_VENDOR_ID_TOSHIBA: return "Toshiba";
494 case PCI_VENDOR_ID_ZEITNET: return "ZeitNet";
495 case PCI_VENDOR_ID_SPECIALIX: return "Specialix";
496 case PCI_VENDOR_ID_RP: return "Comtrol";
497 case PCI_VENDOR_ID_CYCLADES: return "Cyclades";
498 case PCI_VENDOR_ID_SYMPHONY: return "Symphony";
499 case PCI_VENDOR_ID_TEKRAM: return "Tekram";
500 case PCI_VENDOR_ID_AVANCE: return "Avance";
501 case PCI_VENDOR_ID_S3: return "S3 Inc.";
502 case PCI_VENDOR_ID_INTEL: return "Intel";
503 case PCI_VENDOR_ID_ADAPTEC: return "Adaptec";
504 case PCI_VENDOR_ID_ATRONICS: return "Atronics";
505 case PCI_VENDOR_ID_HER: return "Hercules";
506 default: return "Unknown vendor";
507 }
508 }
509
510
511 const char *pci_strdev(unsigned int vendor, unsigned int device)
512 {
513 struct pci_dev_info *info;
514
515 info = pci_lookup_dev(vendor, device);
516 return info ? info->name : "Unknown device";
517 }
518
519
520
521
522
523
524 static void burst_bridge(unsigned char bus, unsigned char devfn,
525 unsigned char pos, int turn_on)
526 {
527 #ifdef CONFIG_PCI_OPTIMIZE
528 struct bridge_mapping_type *bmap;
529 unsigned char val;
530 int i;
531
532 pos *= NUM_OPTIMIZATIONS;
533 printk("PCI bridge optimization.\n");
534 for (i = 0; i < NUM_OPTIMIZATIONS; i++) {
535 printk(" %s: ", bridge_optimization[i].type);
536 bmap = &bridge_mapping[pos + i];
537 if (!bmap->addr) {
538 printk("Not supported.");
539 } else {
540 pcibios_read_config_byte(bus, devfn, bmap->addr, &val);
541 if ((val & bmap->mask) == bmap->value) {
542 printk("%s.", bridge_optimization[i].on);
543 if (!turn_on) {
544 pcibios_write_config_byte(bus, devfn,
545 bmap->addr,
546 (val | bmap->mask)
547 - bmap->value);
548 printk("Changed! Now %s.", bridge_optimization[i].off);
549 }
550 } else {
551 printk("%s.", bridge_optimization[i].off);
552 if (turn_on) {
553 pcibios_write_config_byte(bus, devfn,
554 bmap->addr,
555 (val & (0xff - bmap->mask))
556 + bmap->value);
557 printk("Changed! Now %s.", bridge_optimization[i].on);
558 }
559 }
560 }
561 printk("\n");
562 }
563 #endif
564 }
565
566
567
568
569
570
571
572
573 static int sprint_dev_config(struct pci_dev *dev, char *buf, int size)
574 {
575 unsigned long base;
576 unsigned int l, class_rev, bus, devfn;
577 unsigned short vendor, device, status;
578 unsigned char bist, latency, min_gnt, max_lat;
579 int reg, len = 0;
580 const char *str;
581
582 bus = dev->bus->number;
583 devfn = dev->devfn;
584
585 pcibios_read_config_dword(bus, devfn, PCI_CLASS_REVISION, &class_rev);
586 pcibios_read_config_word (bus, devfn, PCI_VENDOR_ID, &vendor);
587 pcibios_read_config_word (bus, devfn, PCI_DEVICE_ID, &device);
588 pcibios_read_config_word (bus, devfn, PCI_STATUS, &status);
589 pcibios_read_config_byte (bus, devfn, PCI_BIST, &bist);
590 pcibios_read_config_byte (bus, devfn, PCI_LATENCY_TIMER, &latency);
591 pcibios_read_config_byte (bus, devfn, PCI_MIN_GNT, &min_gnt);
592 pcibios_read_config_byte (bus, devfn, PCI_MAX_LAT, &max_lat);
593 if (len + 80 > size) {
594 return -1;
595 }
596 len += sprintf(buf + len, " Bus %2d, device %3d, function %2d:\n",
597 bus, PCI_SLOT(devfn), PCI_FUNC(devfn));
598
599 if (len + 80 > size) {
600 return -1;
601 }
602 len += sprintf(buf + len, " %s: %s %s (rev %d).\n ",
603 pci_strclass(class_rev >> 8), pci_strvendor(vendor),
604 pci_strdev(vendor, device), class_rev & 0xff);
605
606 if (!pci_lookup_dev(vendor, device)) {
607 len += sprintf(buf + len,
608 "Vendor id=%x. Device id=%x.\n ",
609 vendor, device);
610 }
611
612 str = 0;
613 switch (status & PCI_STATUS_DEVSEL_MASK) {
614 case PCI_STATUS_DEVSEL_FAST: str = "Fast devsel. "; break;
615 case PCI_STATUS_DEVSEL_MEDIUM: str = "Medium devsel. "; break;
616 case PCI_STATUS_DEVSEL_SLOW: str = "Slow devsel. "; break;
617 }
618 if (len + strlen(str) > size) {
619 return -1;
620 }
621 len += sprintf(buf + len, str);
622
623 if (status & PCI_STATUS_FAST_BACK) {
624 # define fast_b2b_capable "Fast back-to-back capable. "
625 if (len + strlen(fast_b2b_capable) > size) {
626 return -1;
627 }
628 len += sprintf(buf + len, fast_b2b_capable);
629 # undef fast_b2b_capable
630 }
631
632 if (bist & PCI_BIST_CAPABLE) {
633 # define BIST_capable "BIST capable. "
634 if (len + strlen(BIST_capable) > size) {
635 return -1;
636 }
637 len += sprintf(buf + len, BIST_capable);
638 # undef BIST_capable
639 }
640
641 if (dev->irq) {
642 if (len + 40 > size) {
643 return -1;
644 }
645 len += sprintf(buf + len, "IRQ %d. ", dev->irq);
646 }
647
648 if (dev->master) {
649 if (len + 80 > size) {
650 return -1;
651 }
652 len += sprintf(buf + len, "Master Capable. ");
653 if (latency)
654 len += sprintf(buf + len, "Latency=%d. ", latency);
655 else
656 len += sprintf(buf + len, "No bursts. ");
657 if (min_gnt)
658 len += sprintf(buf + len, "Min Gnt=%d.", min_gnt);
659 if (max_lat)
660 len += sprintf(buf + len, "Max Lat=%d.", max_lat);
661 }
662
663 for (reg = PCI_BASE_ADDRESS_0; reg <= PCI_BASE_ADDRESS_5; reg += 4) {
664 if (len + 40 > size) {
665 return -1;
666 }
667 pcibios_read_config_dword(bus, devfn, reg, &l);
668 base = l;
669 if (!base) {
670 continue;
671 }
672
673 if (base & PCI_BASE_ADDRESS_SPACE_IO) {
674 len += sprintf(buf + len,
675 "\n I/O at 0x%lx.",
676 base & PCI_BASE_ADDRESS_IO_MASK);
677 } else {
678 const char *pref, *type = "unknown";
679
680 if (base & PCI_BASE_ADDRESS_MEM_PREFETCH) {
681 pref = "P";
682 } else {
683 pref = "Non-p";
684 }
685 switch (base & PCI_BASE_ADDRESS_MEM_TYPE_MASK) {
686 case PCI_BASE_ADDRESS_MEM_TYPE_32:
687 type = "32 bit"; break;
688 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
689 type = "20 bit"; break;
690 case PCI_BASE_ADDRESS_MEM_TYPE_64:
691 type = "64 bit";
692
693 reg += 4;
694 pcibios_read_config_dword(bus, devfn, reg, &l);
695 base |= ((u64) l) << 32;
696 break;
697 }
698 len += sprintf(buf + len,
699 "\n %srefetchable %s memory at "
700 "0x%lx.", pref, type,
701 base & PCI_BASE_ADDRESS_MEM_MASK);
702 }
703 }
704
705 len += sprintf(buf + len, "\n");
706 return len;
707 }
708
709
710
711
712
713
714 int get_pci_list(char *buf)
715 {
716 int nprinted, len, size;
717 struct pci_dev *dev;
718 # define MSG "\nwarning: page-size limit reached!\n"
719
720
721 size = PAGE_SIZE - (strlen(MSG) + 1);
722 len = sprintf(buf, "PCI devices found:\n");
723
724 for (dev = pci_devices; dev; dev = dev->next) {
725 nprinted = sprint_dev_config(dev, buf + len, size - len);
726 if (nprinted < 0) {
727 return len + sprintf(buf + len, MSG);
728 }
729 len += nprinted;
730 }
731 return len;
732 }
733
734
735
736
737
738
739 static void *pci_malloc(long size, unsigned long *mem_startp)
740 {
741 void *mem;
742
743 #ifdef DEBUG
744 printk("...pci_malloc(size=%ld,mem=%p)", size, *mem_startp);
745 #endif
746 mem = (void*) *mem_startp;
747 *mem_startp += (size + sizeof(void*) - 1) & ~(sizeof(void*) - 1);
748 memset(mem, 0, size);
749 return mem;
750 }
751
752
753 static unsigned int scan_bus(struct pci_bus *bus, unsigned long *mem_startp)
754 {
755 unsigned int devfn, l, max;
756 unsigned char cmd, tmp, hdr_type = 0;
757 struct pci_dev_info *info;
758 struct pci_dev *dev;
759 struct pci_bus *child;
760
761 #ifdef DEBUG
762 printk("...scan_bus(busno=%d,mem=%p)\n", bus->number, *mem_startp);
763 #endif
764
765 max = bus->secondary;
766 for (devfn = 0; devfn < 0xff; ++devfn) {
767 if (PCI_FUNC(devfn) == 0) {
768 pcibios_read_config_byte(bus->number, devfn,
769 PCI_HEADER_TYPE, &hdr_type);
770 } else if (!(hdr_type & 0x80)) {
771
772 continue;
773 }
774
775 pcibios_read_config_dword(bus->number, devfn, PCI_VENDOR_ID,
776 &l);
777
778 if (l == 0xffffffff || l == 0x00000000) {
779 hdr_type = 0;
780 continue;
781 }
782
783 dev = pci_malloc(sizeof(*dev), mem_startp);
784 dev->bus = bus;
785
786
787
788
789
790 dev->next = pci_devices;
791 pci_devices = dev;
792
793 dev->devfn = devfn;
794 dev->vendor = l & 0xffff;
795 dev->device = (l >> 16) & 0xffff;
796
797
798
799
800
801
802 info = pci_lookup_dev(dev->vendor, dev->device);
803 if (!info) {
804 printk("Warning : Unknown PCI device (%x:%x). Please read include/linux/pci.h \n",
805 dev->vendor, dev->device);
806 } else {
807
808 if (info->bridge_type != 0xff) {
809 burst_bridge(bus->number, devfn,
810 info->bridge_type, 1);
811 }
812 }
813
814
815 pcibios_read_config_byte(bus->number, devfn, PCI_COMMAND,
816 &cmd);
817 pcibios_write_config_byte(bus->number, devfn, PCI_COMMAND,
818 cmd | PCI_COMMAND_MASTER);
819 pcibios_read_config_byte(bus->number, devfn, PCI_COMMAND,
820 &tmp);
821 dev->master = ((tmp & PCI_COMMAND_MASTER) != 0);
822 pcibios_write_config_byte(bus->number, devfn, PCI_COMMAND,
823 cmd);
824
825
826 pcibios_read_config_byte(bus->number, devfn,
827 PCI_INTERRUPT_LINE, &dev->irq);
828
829
830 pcibios_read_config_dword(bus->number, devfn,
831 PCI_CLASS_REVISION, &l);
832 l = l >> 8;
833 dev->class = l;
834
835
836
837
838 dev->sibling = bus->devices;
839 bus->devices = dev;
840
841 if (dev->class >> 8 == PCI_CLASS_BRIDGE_PCI) {
842 unsigned int buses;
843 unsigned short cr;
844
845
846
847
848 child = pci_malloc(sizeof(*child), mem_startp);
849 child->next = bus->children;
850 bus->children = child;
851 child->self = dev;
852 child->parent = bus;
853
854
855
856
857
858 child->number = child->secondary = ++max;
859 child->primary = bus->secondary;
860 child->subordinate = 0xff;
861
862
863
864
865 pcibios_read_config_word(bus->number, devfn,
866 PCI_COMMAND, &cr);
867 pcibios_write_config_word(bus->number, devfn,
868 PCI_COMMAND, 0x0000);
869 pcibios_write_config_word(bus->number, devfn,
870 PCI_STATUS, 0xffff);
871
872
873
874 pcibios_read_config_dword(bus->number, devfn, 0x18,
875 &buses);
876 buses &= 0xff000000;
877 buses |= (((unsigned int)(child->primary) << 0) |
878 ((unsigned int)(child->secondary) << 8) |
879 ((unsigned int)(child->subordinate) << 16));
880 pcibios_write_config_dword(bus->number, devfn, 0x18,
881 buses);
882
883
884
885 max = scan_bus(child, mem_startp);
886
887
888
889
890 child->subordinate = max;
891 buses = (buses & 0xff00ffff)
892 | ((unsigned int)(child->subordinate) << 16);
893 pcibios_write_config_dword(bus->number, devfn, 0x18,
894 buses);
895 pcibios_write_config_word(bus->number, devfn,
896 PCI_COMMAND, cr);
897 }
898 }
899
900
901
902
903
904
905
906 return max;
907 }
908
909
910 unsigned long pci_init (unsigned long mem_start, unsigned long mem_end)
911 {
912 mem_start = pcibios_init(mem_start, mem_end);
913
914 if (!pcibios_present()) {
915 printk("pci_init: no BIOS32 detected\n");
916 return mem_start;
917 }
918
919 printk("Probing PCI hardware.\n");
920
921 memset(&pci_root, 0, sizeof(pci_root));
922 pci_root.subordinate = scan_bus(&pci_root, &mem_start);
923
924
925 mem_start = pcibios_fixup(mem_start, mem_end);
926
927 #ifdef DEBUG
928 {
929 int len = get_pci_list((char*)mem_start);
930 if (len) {
931 ((char *) mem_start)[len] = '\0';
932 printk("%s\n", (char *) mem_start);
933 }
934 }
935 #endif
936 return mem_start;
937 }
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