1 /* $Id: head.S,v 1.47 1996/02/15 09:11:57 davem Exp $ 2 * head.S: The initial boot code for the Sparc port of Linux. 3 * 4 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) 5 * Copyright (C) 1995 Peter Zaitcev (Zaitcev@ipmce.su) 6 */ 7
8 #include <linux/version.h>
9
10 #include <asm/cprefix.h>
11 #include <asm/head.h>
12 #include <asm/asi.h>
13 #include <asm/contregs.h>
14 #include <asm/ptrace.h>
15 #include <asm/psr.h>
16 #include <asm/page.h>
17 #include <asm/kdebug.h>
18 #include <asm/winmacro.h>
19
20 .data
21 /* 22 * The following are used with the prom_vector node-ops to figure out 23 * the cpu-type 24 */ 25
26 .align 4
27 .globl C_LABEL(cputyp)
28 C_LABEL(cputyp):
29 .word 1
30
31 .align 4
32 .globl C_LABEL(cputypval)
33 C_LABEL(cputypval):
34 .asciz "sun4c"
35 .ascii " "
36
37 C_LABEL(cputypvalend):
38 C_LABEL(cputypvallen) = C_LABEL(cputypvar) - C_LABEL(cputypval)
39
40 .align 4
41 /* 42 * Sun people can't spell worth damn. "compatability" indeed. 43 * At least we *know* we can't spell, and use a spell-checker. 44 */ 45
46 /* Uh, actually Linus it is I who cannot spell. Too much murky 47 * Sparc assembly will do this to ya. 48 */ 49 C_LABEL(cputypvar):
50 .asciz "compatability"
51
52 /* Tested on SS-5, SS-10. Probably someone at Sun applied a spell-checker. */ 53 .align 4
54 C_LABEL(cputypvar_sun4m):
55 .asciz "compatible"
56
57 .align 4
58 sun4_notsup:
59 .asciz "Sparc-Linux sun4 support not implemented yet\n\n"
60 .align 4
61
62 sun4d_notsup:
63 .asciz "Sparc-Linux sun4d support does not exist\n\n"
64 .align 4
65
66 sun4e_notsup:
67 .asciz "Sparc-Linux sun4e support does not exist\n\n"
68 .align 4
69
70 sun4u_notsup:
71 .asciz "Sparc-Linux sun4u support does not exist\n\n"
72 .align 4
73
74 /* The Sparc trap table, bootloader gives us control at _start. */ 75 .text
76 .globl start, _stext, _start, __stext
77 .globl C_LABEL(trapbase)
78 _start: /* danger danger */ 79 __stext:
80 _stext:
81 start:
82 C_LABEL(trapbase):
83 /* We get control passed to us here at t_zero. */ 84 t_zero: b gokernel; nop; nop; nop;
85 t_tflt: SPARC_TFAULT /* Inst. Access Exception */ 86 t_bins: TRAP_ENTRY(0x2, bad_instruction) /* Illegal Instruction */ 87 t_pins: TRAP_ENTRY(0x3, priv_instruction) /* Privileged Instruction */ 88 t_fpd: TRAP_ENTRY(0x4, fpd_trap_handler) /* Floating Point Disabled */ 89 t_wovf: WINDOW_SPILL /* Window Overflow */ 90 t_wunf: WINDOW_FILL /* Window Underflow */ 91 t_mna: TRAP_ENTRY(0x7, mna_handler) /* Memory Address Not Aligned */ 92 t_fpe: TRAP_ENTRY(0x8, fpe_trap_handler) /* Floating Point Exception */ 93 t_dflt: SPARC_DFAULT /* Data Miss Exception */ 94 t_tio: TRAP_ENTRY(0xa, do_tag_overflow) /* Tagged Instruction Ovrflw */ 95 t_wpt: TRAP_ENTRY(0xb, do_watchpoint) /* Watchpoint Detected */ 96 t_badc: BAD_TRAP(0xc) BAD_TRAP(0xd) BAD_TRAP(0xe) BAD_TRAP(0xf) BAD_TRAP(0x10)
97 t_irq1: TRAP_ENTRY_INTERRUPT(1) /* IRQ Software/SBUS Level 1 */ 98 t_irq2: TRAP_ENTRY_INTERRUPT(2) /* IRQ SBUS Level 2 */ 99 t_irq3: TRAP_ENTRY_INTERRUPT(3) /* IRQ SCSI/DMA/SBUS Level 3 */ 100 t_irq4: TRAP_ENTRY_INTERRUPT(4) /* IRQ Software Level 4 */ 101 t_irq5: TRAP_ENTRY_INTERRUPT(5) /* IRQ SBUS/Ethernet Level 5 */ 102 t_irq6: TRAP_ENTRY_INTERRUPT(6) /* IRQ Software Level 6 */ 103 t_irq7: TRAP_ENTRY_INTERRUPT(7) /* IRQ Video/SBUS Level 5 */ 104 t_irq8: TRAP_ENTRY_INTERRUPT(8) /* IRQ SBUS Level 6 */ 105 t_irq9: TRAP_ENTRY_INTERRUPT(9) /* IRQ SBUS Level 7 */ 106 t_irq10:TRAP_ENTRY_INTERRUPT(10) /* IRQ Timer #1 (one we use) */ 107 t_irq11:TRAP_ENTRY_INTERRUPT(11) /* IRQ Floppy Intr. */ 108 t_irq12:TRAP_ENTRY_INTERRUPT(12) /* IRQ Zilog serial chip */ 109 t_irq13:TRAP_ENTRY_INTERRUPT(13) /* IRQ Audio Intr. */ 110 t_irq14:TRAP_ENTRY_INTERRUPT(14) /* IRQ Timer #2 */ 111 t_nmi: NMI_TRAP /* Level 15 (NMI) */ 112 t_racc: TRAP_ENTRY(0x20, do_reg_access) /* General Register Access Error */ 113 t_iacce:BAD_TRAP(0x21) /* Instr Access Error */ 114 t_bad22:BAD_TRAP(0x22) BAD_TRAP(0x23)
115 t_cpdis:TRAP_ENTRY(0x24, do_cp_disabled) /* Co-Processor Disabled */ 116 t_uflsh:TRAP_ENTRY(0x25, do_bad_flush) /* Unimplemented FLUSH inst. */ 117 t_bad26:BAD_TRAP(0x26) BAD_TRAP(0x27)
118 t_cpexc:TRAP_ENTRY(0x28, do_cp_exception) /* Co-Processor Exception */ 119 t_dacce:BAD_TRAP(0x29) /* Data Access Error */ 120 t_hwdz: TRAP_ENTRY(0x2a, do_hw_divzero) /* Division by zero, you lose... */ 121 t_dserr:BAD_TRAP(0x2b) /* Data Store Error */ 122 t_daccm:BAD_TRAP(0x2c) /* Data Access MMU-Miss */ 123 t_bad2d:BAD_TRAP(0x2d) BAD_TRAP(0x2e) BAD_TRAP(0x2f) BAD_TRAP(0x30) BAD_TRAP(0x31)
124 t_bad32:BAD_TRAP(0x32) BAD_TRAP(0x33) BAD_TRAP(0x34) BAD_TRAP(0x35) BAD_TRAP(0x36)
125 t_bad37:BAD_TRAP(0x37) BAD_TRAP(0x38) BAD_TRAP(0x39) BAD_TRAP(0x3a) BAD_TRAP(0x3b)
126 t_iaccm:BAD_TRAP(0x3c) /* Instr Access MMU-Miss */ 127 t_bad3d:BAD_TRAP(0x3d) BAD_TRAP(0x3e) BAD_TRAP(0x3f) BAD_TRAP(0x40) BAD_TRAP(0x41)
128 t_bad42:BAD_TRAP(0x42) BAD_TRAP(0x43) BAD_TRAP(0x44) BAD_TRAP(0x45) BAD_TRAP(0x46)
129 t_bad47:BAD_TRAP(0x47) BAD_TRAP(0x48) BAD_TRAP(0x49) BAD_TRAP(0x4a) BAD_TRAP(0x4b)
130 t_bad4c:BAD_TRAP(0x4c) BAD_TRAP(0x4d) BAD_TRAP(0x4e) BAD_TRAP(0x4f) BAD_TRAP(0x50)
131 t_bad51:BAD_TRAP(0x51) BAD_TRAP(0x52) BAD_TRAP(0x53) BAD_TRAP(0x54) BAD_TRAP(0x55)
132 t_bad56:BAD_TRAP(0x56) BAD_TRAP(0x57) BAD_TRAP(0x58) BAD_TRAP(0x59) BAD_TRAP(0x5a)
133 t_bad5b:BAD_TRAP(0x5b) BAD_TRAP(0x5c) BAD_TRAP(0x5d) BAD_TRAP(0x5e) BAD_TRAP(0x5f)
134 t_bad60:BAD_TRAP(0x60) BAD_TRAP(0x61) BAD_TRAP(0x62) BAD_TRAP(0x63) BAD_TRAP(0x64)
135 t_bad65:BAD_TRAP(0x65) BAD_TRAP(0x66) BAD_TRAP(0x67) BAD_TRAP(0x68) BAD_TRAP(0x69)
136 t_bad6a:BAD_TRAP(0x6a) BAD_TRAP(0x6b) BAD_TRAP(0x6c) BAD_TRAP(0x6d) BAD_TRAP(0x6e)
137 t_bad6f:BAD_TRAP(0x6f) BAD_TRAP(0x70) BAD_TRAP(0x71) BAD_TRAP(0x72) BAD_TRAP(0x73)
138 t_bad74:BAD_TRAP(0x74) BAD_TRAP(0x75) BAD_TRAP(0x76) BAD_TRAP(0x77) BAD_TRAP(0x78)
139 t_bad79:BAD_TRAP(0x79) BAD_TRAP(0x7a) BAD_TRAP(0x7b) BAD_TRAP(0x7c) BAD_TRAP(0x7d)
140 t_bad7e:BAD_TRAP(0x7e) BAD_TRAP(0x7f)
141 t_sunos:SUNOS_SYSCALL_TRAP /* SunOS System Call */ 142 t_sbkpt:BAD_TRAP(0x81) /* Software Breakpoint/KGDB */ 143 t_divz: BAD_TRAP(0x82) /* Divide by zero trap */ 144 t_flwin:TRAP_ENTRY(0x83, do_flush_windows) /* Flush Windows Trap */ 145 t_clwin:BAD_TRAP(0x84) /* Clean Windows Trap */ 146 t_rchk: BAD_TRAP(0x85) /* Range Check */ 147 t_funal:BAD_TRAP(0x86) /* Fix Unaligned Access Trap */ 148 t_iovf: BAD_TRAP(0x87) /* Integer Overflow Trap */ 149 t_slowl:SOLARIS_SYSCALL_TRAP /* Slowaris System Call */ 150 t_netbs:NETBSD_SYSCALL_TRAP /* Net-B.S. System Call */ 151 t_bad8a:BAD_TRAP(0x8a) BAD_TRAP(0x8b) BAD_TRAP(0x8c) BAD_TRAP(0x8d) BAD_TRAP(0x8e)
152 t_bad8f:BAD_TRAP(0x8f)
153 t_linux:LINUX_SYSCALL_TRAP /* Linux System Call */ 154 t_bad91:BAD_TRAP(0x91) BAD_TRAP(0x92) BAD_TRAP(0x93) BAD_TRAP(0x94) BAD_TRAP(0x95)
155 t_bad96:BAD_TRAP(0x96) BAD_TRAP(0x97) BAD_TRAP(0x98) BAD_TRAP(0x99) BAD_TRAP(0x9a)
156 t_bad9b:BAD_TRAP(0x9b) BAD_TRAP(0x9c) BAD_TRAP(0x9d) BAD_TRAP(0x9e) BAD_TRAP(0x9f)
157 t_getcc:GETCC_TRAP /* Get Condition Codes */ 158 t_setcc:SETCC_TRAP /* Set Condition Codes */ 159 t_bada2:BAD_TRAP(0xa2) BAD_TRAP(0xa3) BAD_TRAP(0xa4) BAD_TRAP(0xa5) BAD_TRAP(0xa6)
160 t_bada7:BAD_TRAP(0xa7) BAD_TRAP(0xa8) BAD_TRAP(0xa9) BAD_TRAP(0xaa) BAD_TRAP(0xab)
161 t_badac:BAD_TRAP(0xac) BAD_TRAP(0xad) BAD_TRAP(0xae) BAD_TRAP(0xaf) BAD_TRAP(0xb0)
162 t_badb1:BAD_TRAP(0xb1) BAD_TRAP(0xb2) BAD_TRAP(0xb3) BAD_TRAP(0xb4) BAD_TRAP(0xb5)
163 t_badb6:BAD_TRAP(0xb6) BAD_TRAP(0xb7) BAD_TRAP(0xb8) BAD_TRAP(0xb9) BAD_TRAP(0xba)
164 t_badbb:BAD_TRAP(0xbb) BAD_TRAP(0xbc) BAD_TRAP(0xbd) BAD_TRAP(0xbe) BAD_TRAP(0xbf)
165 t_badc0:BAD_TRAP(0xc0) BAD_TRAP(0xc1) BAD_TRAP(0xc2) BAD_TRAP(0xc3) BAD_TRAP(0xc4)
166 t_badc5:BAD_TRAP(0xc5) BAD_TRAP(0xc6) BAD_TRAP(0xc7) BAD_TRAP(0xc8) BAD_TRAP(0xc9)
167 t_badca:BAD_TRAP(0xca) BAD_TRAP(0xcb) BAD_TRAP(0xcc) BAD_TRAP(0xcd) BAD_TRAP(0xce)
168 t_badcf:BAD_TRAP(0xcf) BAD_TRAP(0xd0) BAD_TRAP(0xd1) BAD_TRAP(0xd2) BAD_TRAP(0xd3)
169 t_badd4:BAD_TRAP(0xd4) BAD_TRAP(0xd5) BAD_TRAP(0xd6) BAD_TRAP(0xd7) BAD_TRAP(0xd8)
170 t_badd9:BAD_TRAP(0xd9) BAD_TRAP(0xda) BAD_TRAP(0xdb) BAD_TRAP(0xdc) BAD_TRAP(0xdd)
171 t_badde:BAD_TRAP(0xde) BAD_TRAP(0xdf) BAD_TRAP(0xe0) BAD_TRAP(0xe1) BAD_TRAP(0xe2)
172 t_bade3:BAD_TRAP(0xe3) BAD_TRAP(0xe4) BAD_TRAP(0xe5) BAD_TRAP(0xe6) BAD_TRAP(0xe7)
173 t_bade8:BAD_TRAP(0xe8) BAD_TRAP(0xe9) BAD_TRAP(0xea) BAD_TRAP(0xeb) BAD_TRAP(0xec)
174 t_baded:BAD_TRAP(0xed) BAD_TRAP(0xee) BAD_TRAP(0xef) BAD_TRAP(0xf0) BAD_TRAP(0xf1)
175 t_badf2:BAD_TRAP(0xf2) BAD_TRAP(0xf3) BAD_TRAP(0xf4) BAD_TRAP(0xf5) BAD_TRAP(0xf6)
176 t_badf7:BAD_TRAP(0xf7) BAD_TRAP(0xf8) BAD_TRAP(0xf9) BAD_TRAP(0xfa) BAD_TRAP(0xfb)
177 t_badfc:BAD_TRAP(0xfc) BAD_TRAP(0xfd)
178 dbtrap: BAD_TRAP(0xfe) /* Debugger/PROM breakpoint #1 */ 179 dbtrap2:BAD_TRAP(0xff) /* Debugger/PROM breakpoint #2 */ 180
181 .globl C_LABEL(end_traptable)
182 C_LABEL(end_traptable):
183
184 .skip 4096
185
186 /* This was the only reasonable way I could think of to properly align 187 * these page-table data structures. 188 */ 189 .globl C_LABEL(bootup_user_stack)
190 .globl C_LABEL(bootup_kernel_stack)
191 .globl C_LABEL(pg0)
192 .globl C_LABEL(empty_bad_page)
193 .globl C_LABEL(empty_bad_page_table)
194 .globl C_LABEL(empty_zero_page)
195 .globl C_LABEL(swapper_pg_dir)
196 C_LABEL(bootup_user_stack): .skip 0x1000
197 C_LABEL(bootup_kernel_stack): .skip 0x1000
198 C_LABEL(swapper_pg_dir): .skip 0x1000
199 C_LABEL(pg0): .skip 0x1000
200 C_LABEL(empty_bad_page): .skip 0x1000
201 C_LABEL(empty_bad_page_table): .skip 0x1000
202 C_LABEL(empty_zero_page): .skip 0x1000
203
204
205 /* Cool, here we go. Pick up the romvec pointer in %o0 and stash it in 206 * %g7 and at prom_vector_p. And also quickly check whether we are on 207 * a v0, v2, or v3 prom. 208 */ 209 gokernel:
210 /* Ok, it's nice to know, as early as possible, if we 211 * are already mapped where we expect to be in virtual 212 * memory. The Solaris /boot elf format bootloader 213 * will peek into our elf header and load us where 214 * we want to be, otherwise we have to re-map. 215 * 216 * Some boot loaders don't place the jmp'rs address 217 * in %o7, so we do a pc-relative call to a local 218 * label, then see what %o7 has. 219 */ 220
221 /* XXX Sparc V9 detection goes here XXX */ 222
223 mov %o7, %g4 ! Save %o7
224
225 /* Jump to it, and pray... */ 226 current_pc:
227 call 1f
228 nop
229
230 1:
231 mov %o7, %g3
232
233 got_pc:
234 mov %g4, %o7 /* Previous %o7. */ 235
236 mov %o0, %l0 ! stash away romvec
237 mov %o0, %g7 ! put it here too
238 mov %o1, %l1 ! stash away debug_vec too
239
240 /* Ok, let's check out our run time program counter. */ 241 set current_pc, %g5
242 cmp %g3, %g5
243 be already_mapped
244 nop
245
246 /* %l6 will hold the offset we have to subtract 247 * from absolute symbols in order to access areas 248 * in our own image. If already mapped this is 249 * just plain zero, else it is PAGE_OFFSET which is 250 * also KERNBASE. 251 */ 252 set PAGE_OFFSET, %l6
253 b copy_prom_lvl14
254 nop
255
256 already_mapped:
257 mov 0, %l6
258
259 /* Copy over the Prom's level 14 clock handler. */ 260 copy_prom_lvl14:
261 rd %tbr, %g1
262 andn %g1, 0xfff, %g1 ! proms trap table base
263 or %g0, (0x1e<<4), %g2 ! offset to lvl14 intr
264 or %g1, %g2, %g2
265 set t_irq14, %g3
266 sub %g3, %l6, %g3
267 ldd [%g2], %g4
268 std %g4, [%g3]
269 ldd [%g2 + 0x8], %g4
270 std %g4, [%g3 + 0x8] ! Copy proms handler
271
272 /* Must determine whether we are on a sun4c MMU, SRMMU, or SUN4/400 MUTANT 273 * MMU so we can remap ourselves properly. DONT TOUCH %l0 thru %l5 in these 274 * remapping routines, we need their values afterwards! 275 * 276 * XXX UGH, need to write some sun4u SpitFire remapping V9 code RSN... XXX 277 */ 278 /* Now check whether we are already mapped, if we 279 * are we can skip all this garbage coming up. 280 */ 281 copy_prom_done:
282 cmp %l6, 0
283 be go_to_highmem ! this will be a nop then
284 nop
285
286 set LOAD_ADDR, %g6
287 cmp %g7, %g6
288 bne remap_not_a_sun4 ! This is not a Sun4
289 nop
290
291 or %g0, 0x1, %g1
292 lduba [%g1] ASI_CONTROL, %g1 ! Only safe to try on Sun4.
293 subcc %g1, 0x24, %g0 ! Is this a mutant Sun4/400???
294 be sun4_mutant_remap ! Ugh, it is...
295 nop
296
297 remap_not_a_sun4:
298 lda [%g0] ASI_M_MMUREGS, %g1 ! same as ASI_PTE on sun4c
299 and %g1, 0x1, %g1 ! Test SRMMU Enable bit ;-)
300 cmp %g1, 0x0
301 be sun4c_remap ! A sun4c MMU or normal Sun4
302 nop
303 srmmu_remap:
304 /* First, check for a viking (TI) module. */ 305 set 0x40000000, %g2
306 rd %psr, %g3
307 and %g2, %g3, %g3
308 subcc %g3, 0x0, %g0
309 bz srmmu_nviking
310 nop
311
312 /* Figure out what kind of viking we are on. 313 * We need to know if we have to play with the 314 * AC bit and disable traps or not. 315 */ 316
317 /* I've only seen MicroSparc's on SparcClassics with this 318 * bit set. 319 */ 320 set 0x800, %g2
321 lda [%g0] ASI_M_MMUREGS, %g3 ! peek in the control reg
322 and %g2, %g3, %g3
323 subcc %g3, 0x0, %g0
324 bnz srmmu_nviking ! is in mbus mode
325 nop
326
327 rd %psr, %g3 ! DONT TOUCH %g3
328 andn %g3, PSR_ET, %g2
329 wr %g2, 0x0, %psr
330 WRITE_PAUSE
331
332 /* Get context table pointer, then convert to 333 * a physical address, which is 36 bits. 334 */ 335 set AC_M_CTPR, %g4
336 lda [%g4] ASI_M_MMUREGS, %g4
337 sll %g4, 0x4, %g4 ! We use this below
338 ! DONT TOUCH %g4
339
340 /* Set the AC bit in the Viking's MMU control reg. */ 341 lda [%g0] ASI_M_MMUREGS, %g5 ! DONT TOUCH %g5
342 set 0x8000, %g6 ! AC bit mask
343 or %g5, %g6, %g6 ! Or it in...
344 sta %g6, [%g0] ASI_M_MMUREGS ! Close your eyes...
345
346 /* Grrr, why does it seem like every other load/store 347 * on the sun4m is in some ASI space... 348 * Fine with me, let's get the pointer to the level 1 349 * page table directory and fetch it's entry. 350 */ 351 lda [%g4] ASI_M_BYPASS, %o1 ! This is a level 1 ptr
352 srl %o1, 0x4, %o1 ! Clear low 4 bits
353 sll %o1, 0x8, %o1 ! Make physical
354
355 /* Ok, pull in the PTD. */ 356 lda [%o1] ASI_M_BYPASS, %o2 ! This is the 0x0 16MB pgd
357
358 /* Calculate to KERNBASE entry. 359 * 360 * XXX Should not use imperical constant, but Gas gets an XXX 361 * XXX upset stomach with the bitshift I would have to use XXX 362 */ 363 add %o1, 0x3c0, %o3
364
365 /* Poke the entry into the calculated address. */ 366 sta %o2, [%o3] ASI_M_BYPASS
367
368 /* I don't get it Sun, if you engineered all these 369 * boot loaders and the PROM (thank you for the debugging 370 * features btw) why did you not have them load kernel 371 * images up in high address space, since this is necessary 372 * for ABI compliance anyways? Does this low-mapping provide 373 * enhanced interoperability? 374 * 375 * "The PROM is the computer." 376 */ 377
378 /* Ok, restore the MMU control register we saved in %g5 */ 379 sta %g5, [%g0] ASI_M_MMUREGS ! POW... ouch
380
381 /* Turn traps back on. We saved it in %g3 earlier. */ 382 wr %g3, 0x0, %psr ! tick tock, tick tock
383
384 /* Now we burn precious CPU cycles due to bad engineering. */ 385 WRITE_PAUSE
386
387 /* Wow, all that just to move a 32-bit value from one 388 * place to another... Jump to high memory. 389 */ 390 b go_to_highmem
391 nop
392
393 /* This works on viking's in Mbus mode and all 394 * other MBUS modules. It is virtually the same as 395 * the above madness sans turning traps off and flipping 396 * the AC bit. 397 */ 398 srmmu_nviking:
399 set AC_M_CTPR, %g1
400 lda [%g1] ASI_M_MMUREGS, %g1 ! get ctx table ptr
401 sll %g1, 0x4, %g1 ! make physical addr
402 lda [%g1] ASI_M_BYPASS, %g1 ! ptr to level 1 pg_table
403 srl %g1, 0x4, %g1
404 sll %g1, 0x8, %g1 ! make phys addr for l1 tbl
405
406 lda [%g1] ASI_M_BYPASS, %g2 ! get level1 entry for 0x0
407 add %g1, 0x3c0, %g3 ! XXX AWAY WITH IMPERICALS
408 sta %g2, [%g3] ASI_M_BYPASS ! place at KERNBASE entry
409 b go_to_highmem
410 nop ! wheee....
411
412 /* This remaps the kernel on Sun4/4xx machines 413 * that have the Sun Mutant Three Level MMU. 414 * It's like a platypus, Sun didn't have the 415 * SRMMU in conception so they kludged the three 416 * level logic in the regular Sun4 MMU probably. 417 * 418 * Basically, you take each entry in the top level 419 * directory that maps the low 3MB starting at 420 * address zero and put the mapping in the KERNBASE 421 * slots. These top level pgd's are called regmaps. 422 */ 423 sun4_mutant_remap:
424 or %g0, %g0, %g3 ! source base
425 sethi %hi(KERNBASE), %g4 ! destination base
426 or %g4, %lo(KERNBASE), %g4
427 sethi %hi(0x300000), %g5
428 or %g5, %lo(0x300000), %g5 ! upper bound 3MB
429 or %g0, 0x1, %l6
430 sll %l6, 24, %l6 ! Regmap mapping size
431 add %g3, 0x2, %g3 ! Base magic
432 add %g4, 0x2, %g4 ! Base magic
433
434 /* Main remapping loop on Sun4-Mutant-MMU. 435 * "I am not an animal..." -Famous Mutant Person 436 */ 437 sun4_mutant_loop:
438 lduha [%g3] ASI_REGMAP, %g2 ! Get lower entry
439 stha %g2, [%g4] ASI_REGMAP ! Store in high entry
440 add %g4, %l6, %g4 ! Move up high memory ptr
441 subcc %g3, %g5, %g0 ! Reached our limit?
442 blu sun4_mutant_loop ! Nope, loop again
443 add %g3, %l6, %g3 ! delay, Move up low ptr
444 b go_to_highmem ! Jump to high memory.
445 nop
446
447 /* The following works for normal (ie. non Sun4/400) Sun4 MMU's */ 448 sun4c_remap:
449 mov 0, %g3 ! source base
450 set KERNBASE, %g4 ! destination base
451 set 0x300000, %g5 ! upper bound 3MB
452 mov 1, %l6
453 sll %l6, 18, %l6 ! sun4c mmu segmap size
454 sun4c_remap_loop:
455 lda [%g3] ASI_SEGMAP, %g6 ! load phys_seg
456 sta %g6, [%g4] ASI_SEGMAP ! store new virt mapping
457 add %g3, %l6, %g3 ! Increment source ptr
458 subcc %g3, %g5, %g0 ! Reached limit?
459 bl sun4c_remap_loop ! Nope, loop again
460 add %g4, %l6, %g4 ! delay, Increment dest ptr
461
462 /* Now do a non-relative jump so that PC is in high-memory */ 463 go_to_highmem:
464 set execute_in_high_mem, %g1
465 jmpl %g1, %g0
466 nop
467
468 /* Acquire boot time privileged register values, this will help debugging. 469 * I figure out and store nwindows and nwindowsm1 later on. 470 */ 471 execute_in_high_mem:
472 mov %l0, %o0 ! put back romvec
473 mov %l1, %o1 ! and debug_vec
474
475 sethi %hi( C_LABEL(prom_vector_p) ), %g1
476 st %o0, [%g1 + %lo( C_LABEL(prom_vector_p) )]
477
478 sethi %hi( C_LABEL(linux_dbvec) ), %g1
479 st %o1, [%g1 + %lo( C_LABEL(linux_dbvec) )]
480
481 ld [%o0 + 0x4], %o3
482 and %o3, 0x3, %o5 ! get the version
483
484 cmp %o3, 0x2 ! a v2 prom?
485 be found_version
486 nop
487
488 /* paul@sfe.com.au */ 489 cmp %o3, 0x3 ! a v3 prom?
490 be found_version
491 nop
492
493 /* Old sun4's pass our load address into %o0 instead of the prom 494 * pointer. On sun4's you have to hard code the romvec pointer into 495 * your code. Sun probably still does that because they don't even 496 * trust their own "OpenBoot" specifications. 497 */ 498
499 set LOAD_ADDR, %g6
500 cmp %o0, %g6 ! an old sun4?
501 be no_sun4_here
502 nop
503
504 found_version:
505
506 /* Get the machine type via the mysterious romvec node operations. */ 507
508 or %g0, %g7, %l1
509 add %l1, 0x1c, %l1
510 ld [%l1], %l0
511 ld [%l0], %l0
512 call %l0
513 or %g0, %g0, %o0 ! next_node(0) = first_node
514 or %o0, %g0, %g6
515
516 sethi %hi( C_LABEL(cputypvar) ), %o1 ! First node has cpu-arch
517 or %o1, %lo( C_LABEL(cputypvar) ), %o1
518 sethi %hi( C_LABEL(cputypval) ), %o2 ! information, the string
519 or %o2, %lo( C_LABEL(cputypval) ), %o2
520 ld [%l1], %l0 ! 'compatibility' tells
521 ld [%l0 + 0xc], %l0 ! that we want 'sun4x' where
522 call %l0 ! x is one of '', 'c', 'm',
523 nop ! 'd' or 'e'. %o2 holds pointer
524 ! to a buf where above string
525 ! will get stored by the prom.
526
527 subcc %o0, %g0, %g0
528 bpos got_prop ! Got the property
529 nop
530
531 or %g6, %g0, %o0
532 sethi %hi( C_LABEL(cputypvar_sun4m) ), %o1
533 or %o1, %lo( C_LABEL(cputypvar_sun4m) ), %o1
534 sethi %hi( C_LABEL(cputypval) ), %o2
535 or %o2, %lo( C_LABEL(cputypval) ), %o2
536 ld [%l1], %l0
537 ld [%l0 + 0xc], %l0
538 call %l0
539 nop
540
541 got_prop:
542 set C_LABEL(cputypval), %o2
543 ldub [%o2 + 0x4], %l1
544
545 cmp %l1, 'c' ! We already know we are not
546 be 1f ! on a plain sun4 because of
547 nop ! the check for 0x4000 in %o0
548
549 cmp %l1, 'm' ! at start
550 be 1f
551 nop
552
553 cmp %l1, 'd'
554 be no_sun4d_here ! God bless the person who
555 nop ! tried to run this on sun4d.
556
557 cmp %l1, 'e'
558 be no_sun4e_here ! Could be a sun4e.
559 nop
560
561 b no_sun4u_here ! AIEEE, a V9 sun4u...
562 nop
563
564
565 1:
566 set C_LABEL(cputypval), %l1
567 ldub [%l1 + 0x4], %l1
568 cmp %l1, 'm' ! Test for sun4d, sun4e ?
569 be sun4m_init
570 nop
571
572 /* Jump into mmu context zero. */ 573 set AC_CONTEXT, %g1
574 stba %g0, [%g1] ASI_CONTROL
575
576 b sun4c_continue_boot
577 nop
578
579 sun4m_init:
580
581 /* Ok, the PROM could have done funny things and apple cider could still 582 * be sitting in the fault status/address registers. Read them all to 583 * clear them so we don't get magic faults later on. 584 */ 585 /* This sucks, aparently this makes Vikings call prom panic, will fix later */ 586
587 rd %psr, %o1
588 srl %o1, 28, %o1 ! Get a type of the CPU
589
590 subcc %o1, 4, %g0 ! TI: Viking or MicroSPARC
591 be sun4c_continue_boot
592 nop
593
594 set AC_M_SFSR, %o0
595 lda [%o0] ASI_M_MMUREGS, %g0
596 set AC_M_SFAR, %o0
597 lda [%o0] ASI_M_MMUREGS, %g0
598
599 /* Fujitsu MicroSPARC-II has no asynchronous flavors of FARs */ 600 subcc %o1, 0, %g0
601 be sun4c_continue_boot
602 nop
603
604 set AC_M_AFSR, %o0
605 lda [%o0] ASI_M_MMUREGS, %g0
606 set AC_M_AFAR, %o0
607 lda [%o0] ASI_M_MMUREGS, %g0
608 nop
609
610
611 sun4c_continue_boot:
612
613
614 /* Aieee, now set PC and nPC, enable traps, give ourselves a stack and it's 615 * show-time! 616 */ 617
618 sethi %hi( C_LABEL(cputyp) ), %o0
619 st %g4, [%o0 + %lo( C_LABEL(cputyp) )]
620
621 /* Turn on Supervisor, EnableFloating, and all the PIL bits. 622 * Also puts us in register window zero with traps off. 623 */ 624 set (PSR_PS | PSR_S | PSR_PIL | PSR_EF), %g2
625 wr %g2, 0x0, %psr
626 WRITE_PAUSE
627
628 /* I want a kernel stack NOW! */ 629 set C_LABEL(bootup_user_stack), %g1
630 add %g1, (PAGE_SIZE - REGWIN_SZ), %sp
631 mov 0, %fp /* And for good luck */ 632
633 /* Zero out our BSS section. */ 634 set C_LABEL(edata) , %o0 ! First address of BSS
635 set C_LABEL(end) , %o1 ! Last address of BSS
636 add %o0, 0x1, %o0
637 1:
638 stb %g0, [%o0]
639 subcc %o0, %o1, %g0
640 bl 1b
641 add %o0, 0x1, %o0
642
643 /* Initialize the umask value for init_task just in case. 644 * But first make current_set[0] point to something useful. 645 */ 646 set C_LABEL(init_task), %g4
647 set C_LABEL(current_set), %g2
648 st %g4, [%g2]
649
650 /* So now this should work. */ 651 LOAD_CURRENT(g2, g4)
652 set C_LABEL(bootup_kernel_stack), %g4
653 st %g4, [%g2 + TASK_KSTACK_PG]
654 st %g0, [%g2 + THREAD_UMASK]
655
656 /* Compute NWINDOWS and stash it away. Now uses %wim trick explained 657 * in the V8 manual. Ok, this method seems to work, Sparc is cool... 658 * No, it doesn't work, have to play the save/readCWP/restore trick. 659 */ 660
661 wr %g0, 0x0, %wim ! so we dont get a trap
662 WRITE_PAUSE
663
664 save
665
666 rd %psr, %g3
667
668 restore
669
670 and %g3, 0x1f, %g3
671 add %g3, 0x1, %g3
672
673 mov 2, %g1
674 wr %g1, 0x0, %wim ! make window 1 invalid
675 WRITE_PAUSE
676
677 cmp %g3, 0x7
678 bne 2f
679 nop
680
681 /* Adjust our window handling routines to 682 * do things correctly on 7 window Sparcs. 683 */ 684
685 #define PATCH_INSN(src, dest) \
686 set src, %g5; \
687 set dest, %g6; \
688 ld [%g5], %g4; \
689 st %g4, [%g6];
690
691 /* Patch for window spills... */ 692 PATCH_INSN(spnwin_patch1_7win, spnwin_patch1)
693 PATCH_INSN(spnwin_patch2_7win, spnwin_patch2)
694 PATCH_INSN(spnwin_patch3_7win, spnwin_patch3)
695
696 /* Patch for window fills... */ 697 PATCH_INSN(fnwin_patch1_7win, fnwin_patch1)
698 PATCH_INSN(fnwin_patch2_7win, fnwin_patch2)
699
700 /* Patch for trap entry setup... */ 701 PATCH_INSN(tsetup_7win_patch1, tsetup_patch1)
702 PATCH_INSN(tsetup_7win_patch2, tsetup_patch2)
703 PATCH_INSN(tsetup_7win_patch3, tsetup_patch3)
704 PATCH_INSN(tsetup_7win_patch4, tsetup_patch4)
705 PATCH_INSN(tsetup_7win_patch5, tsetup_patch5)
706 PATCH_INSN(tsetup_7win_patch6, tsetup_patch6)
707
708 /* Patch for returning from traps... */ 709 PATCH_INSN(rtrap_7win_patch1, rtrap_patch1)
710 PATCH_INSN(rtrap_7win_patch2, rtrap_patch2)
711 PATCH_INSN(rtrap_7win_patch3, rtrap_patch3)
712 PATCH_INSN(rtrap_7win_patch4, rtrap_patch4)
713 PATCH_INSN(rtrap_7win_patch5, rtrap_patch5)
714
715 2:
716 sethi %hi( C_LABEL(nwindows) ), %g4
717 st %g3, [%g4 + %lo( C_LABEL(nwindows) )] ! store final value
718 sub %g3, 0x1, %g3
719 sethi %hi( C_LABEL(nwindowsm1) ), %g4
720 st %g3, [%g4 + %lo( C_LABEL(nwindowsm1) )]
721
722 /* Here we go, start using Linux's trap table... */ 723 set C_LABEL(trapbase), %g3
724 wr %g3, 0x0, %tbr
725 WRITE_PAUSE
726
727 /* Finally, turn on traps so that we can call c-code. */ 728 rd %psr, %g3
729 wr %g3, 0x0, %psr
730 wr %g3, PSR_ET, %psr
731 WRITE_PAUSE
732
733 /* First we call prom_init() to set up PROMLIB, then 734 * off to start_kernel(). 735 */ 736
737 sethi %hi( C_LABEL(prom_vector_p) ), %g5
738 ld [%g5 + %lo( C_LABEL(prom_vector_p) )], %o0
739 call C_LABEL(prom_init)
740 nop
741
742 call C_LABEL(start_kernel)
743 nop
744
745 /* We should not get here. */ 746 call halt_me
747 nop
748
749 /* There, happy now Adrian? */ 750
751 /* XXX Fix this... XXX */ 752 no_sun4_here:
753 sethi %hi(SUN4_PROM_VECTOR+SUN4_PRINTF), %o1
754 ld [%o1 + %lo(SUN4_PROM_VECTOR+SUN4_PRINTF)], %o1
755 set sun4_notsup, %o0
756 call %o1
757 nop
758 1:
759 ba 1b ! Cannot exit into KMON
760 nop
761
762 no_sun4d_here:
763 ld [%g7 + 0x68], %o1
764 set sun4d_notsup, %o0
765 call %o1
766 nop
767 b halt_me
768 nop
769
770 no_sun4e_here:
771 ld [%g7 + 0x68], %o1
772 set sun4e_notsup, %o0
773 call %o1
774 nop
775 b halt_me
776 nop
777
778 no_sun4u_here:
779 ld [%g7 + 0x68], %o1
780 set sun4u_notsup, %o0
781 call %o1
782 nop
783 b halt_me
784 nop
785
786 halt_me:
787 ld [%g7 + 0x74], %o0
788 call %o0 ! Get us out of here...
789 nop ! Apparently Solaris is better.
790
791 .data
792 .align 4
793
794 /* 795 * Fill up the prom vector, note in particular the kind first element, 796 * no joke. I don't need all of them in here as the entire prom vector 797 * gets initialized in c-code so all routines can use it. 798 */ 799
800 .globl C_LABEL(prom_vector_p)
801 C_LABEL(prom_vector_p):
802 .word 0
803
804 /* We calculate the following at boot time, window fills/spills and trap entry 805 * code uses these to keep track of the register windows. 806 */ 807
808 .align 4
809 .globl C_LABEL(nwindows)
810 .globl C_LABEL(nwindowsm1)
811 C_LABEL(nwindows):
812 .word 8
813 C_LABEL(nwindowsm1):
814 .word 7
815
816 /* Boot time debugger vector value. We need this later on. */ 817
818 .align 4
819 .globl C_LABEL(linux_dbvec)
820 C_LABEL(linux_dbvec):
821 .word 0
822 .word 0
823
824 .align 4
![[bottom]](../icons/bottom.png){kind=icon}
![[previous]](../icons/n_left.png){kind=icon}
![[next]](../icons/n_right.png){kind=icon}
![[first]](../icons/n_first.png){kind=icon}
![[last]](../icons/n_last.png){kind=icon}
![[top]](../icons/n_top.png){kind=icon}
![[index]](../icons/index.png){kind=icon}
![[help]](../icons/help.png){kind=icon}
*/
![[top]](../icons/top.png){kind=icon}
![[bottom]](../icons/n_bottom.png){kind=icon}