taglinefilesource code
_ioaddr517drivers/scsi/AM53C974.cfor (pci_config._ioaddr = 0xC000; pci_config._ioaddr < 0xD000; pci_config._ioaddr += 0x0100) {
_ioaddr518drivers/scsi/AM53C974.cpci_config._device_vendor = inl(pci_config._ioaddr);
_ioaddr521drivers/scsi/AM53C974.cpci_config._status_command = inl(pci_config._ioaddr + PCI_COMMAND);
_ioaddr522drivers/scsi/AM53C974.cpci_config._class_revision = inl(pci_config._ioaddr + PCI_CLASS_REVISION);
_ioaddr523drivers/scsi/AM53C974.cpci_config._bist_header_latency_cache = inl(pci_config._ioaddr + PCI_CACHE_LINE_SIZE);
_ioaddr524drivers/scsi/AM53C974.cpci_config._base0 = inl(pci_config._ioaddr + PCI_BASE_ADDRESS_0);
_ioaddr525drivers/scsi/AM53C974.cpci_config._base1 = inl(pci_config._ioaddr + PCI_BASE_ADDRESS_1);
_ioaddr526drivers/scsi/AM53C974.cpci_config._base2 = inl(pci_config._ioaddr + PCI_BASE_ADDRESS_2);
_ioaddr527drivers/scsi/AM53C974.cpci_config._base3 = inl(pci_config._ioaddr + PCI_BASE_ADDRESS_3);
_ioaddr528drivers/scsi/AM53C974.cpci_config._base4 = inl(pci_config._ioaddr + PCI_BASE_ADDRESS_4);
_ioaddr529drivers/scsi/AM53C974.cpci_config._base5 = inl(pci_config._ioaddr + PCI_BASE_ADDRESS_5);
_ioaddr530drivers/scsi/AM53C974.cpci_config._baserom = inl(pci_config._ioaddr + PCI_ROM_ADDRESS);
_ioaddr531drivers/scsi/AM53C974.cpci_config._max_min_ipin_iline = inl(pci_config._ioaddr + PCI_INTERRUPT_LINE);
_ioaddr542drivers/scsi/AM53C974.coutw(pci_config._command, pci_config._ioaddr + PCI_COMMAND); }
_ioaddr408drivers/scsi/AM53C974.hunsigned short _ioaddr; /* config type 1 - private I/O addr    */