tag | line | file | source code |
outl | 58 | arch/alpha/kernel/irq.c | outl(cache_804, 0x804); |
outl | 90 | arch/alpha/kernel/irq.c | outl(cache_804, 0x804); |
outl | 665 | arch/alpha/kernel/irq.c | outl(cache_804, 0x804); |
outl | 238 | arch/alpha/lib/io.c | outl(*(unsigned int *) src, port); |
outl | 72 | arch/ppc/kernel/port_io.c | unsigned long outl_p(unsigned long val,int port) { return (outl(val,port)); } |
outl | 216 | drivers/block/cmd640.c | outl(k, 0xcf8); |
outl | 310 | drivers/block/triton.c | outl(virt_to_bus (HWIF(drive)->dmatable), dma_base + 4); /* PRD table */ |
outl | 366 | drivers/block/triton.c | outl(virt_to_bus(hwif->dmatable), base + 4); |
outl | 524 | drivers/net/3c59x.c | outl(config.i, ioaddr + Wn3_Config); |
outl | 679 | drivers/net/3c59x.c | outl(skb->len, ioaddr + TX_FIFO); |
outl | 683 | drivers/net/3c59x.c | outl((int)(skb->data), ioaddr + Wn7_MasterAddr); |
outl | 361 | drivers/net/de4x5.c | outl(imr, DE4X5_IMR); /* Enable the IRQs */\ |
outl | 367 | drivers/net/de4x5.c | outl(imr, DE4X5_IMR); /* Disable the IRQs */\ |
outl | 372 | drivers/net/de4x5.c | outl(imr, DE4X5_IMR); /* Unmask the IRQs */\ |
outl | 378 | drivers/net/de4x5.c | outl(imr, DE4X5_IMR); /* Mask the IRQs */\ |
outl | 387 | drivers/net/de4x5.c | outl(omr, DE4X5_OMR); /* Enable the TX and/or RX */\ |
outl | 393 | drivers/net/de4x5.c | outl(omr, DE4X5_OMR); /* Disable the TX and/or RX */ \ |
outl | 399 | drivers/net/de4x5.c | #define RESET_SIA outl(0, DE4X5_SICR); /* Reset SIA connectivity regs */ |
outl | 644 | drivers/net/de4x5.c | outl(i | BMR_SWR, DE4X5_BMR);\ |
outl | 646 | drivers/net/de4x5.c | outl(i, DE4X5_BMR);\ |
outl | 693 | drivers/net/de4x5.c | outl(0, PCI_CFDA); |
outl | 822 | drivers/net/de4x5.c | outl(virt_to_bus(lp->rx_ring), DE4X5_RRBA); |
outl | 823 | drivers/net/de4x5.c | outl(virt_to_bus(lp->tx_ring), DE4X5_TRBA); |
outl | 873 | drivers/net/de4x5.c | outl(0, DE4X5_SICR); |
outl | 874 | drivers/net/de4x5.c | outl(CFDA_PSM, PCI_CFDA); |
outl | 893 | drivers/net/de4x5.c | outl(0, PCI_CFDA); |
outl | 979 | drivers/net/de4x5.c | outl(bmr, DE4X5_BMR); |
outl | 989 | drivers/net/de4x5.c | outl(virt_to_bus(lp->rx_ring), DE4X5_RRBA); |
outl | 990 | drivers/net/de4x5.c | outl(virt_to_bus(lp->tx_ring), DE4X5_TRBA); |
outl | 1013 | drivers/net/de4x5.c | outl(omr|OMR_ST, DE4X5_OMR); |
outl | 1021 | drivers/net/de4x5.c | outl(omr, DE4X5_OMR); /* Stop everything! */ |
outl | 1088 | drivers/net/de4x5.c | outl(POLL_DEMAND, DE4X5_TPD);/* Start the TX */ |
outl | 1142 | drivers/net/de4x5.c | outl(sts, DE4X5_STS); /* Reset the board interrupts */ |
outl | 1300 | drivers/net/de4x5.c | outl(POLL_DEMAND, DE4X5_TPD); /* Restart a stalled TX */ |
outl | 1378 | drivers/net/de4x5.c | outl(0, DE4X5_SICR); |
outl | 1379 | drivers/net/de4x5.c | outl(CFDA_PSM, PCI_CFDA); |
outl | 1426 | drivers/net/de4x5.c | outl(omr, DE4X5_OMR); |
outl | 1438 | drivers/net/de4x5.c | outl(POLL_DEMAND, DE4X5_TPD); /* Start the TX */ |
outl | 1502 | drivers/net/de4x5.c | outl(omr, DE4X5_OMR); |
outl | 1543 | drivers/net/de4x5.c | outl(PCI_COMMAND_IO | PCI_COMMAND_MASTER, PCI_CFCS); |
outl | 1544 | drivers/net/de4x5.c | outl(0x00004000, PCI_CFLT); |
outl | 1545 | drivers/net/de4x5.c | outl(iobase, PCI_CBIO); |
outl | 1987 | drivers/net/de4x5.c | outl(omr | OMR_FD, DE4X5_OMR); |
outl | 2033 | drivers/net/de4x5.c | outl(omr & ~OMR_FD, DE4X5_OMR); |
outl | 2066 | drivers/net/de4x5.c | outl(omr & ~OMR_FD, DE4X5_OMR); |
outl | 2096 | drivers/net/de4x5.c | outl(omr & ~OMR_FD, DE4X5_OMR); |
outl | 2139 | drivers/net/de4x5.c | outl(omr | OMR_FD, DE4X5_OMR); |
outl | 2236 | drivers/net/de4x5.c | outl(GEP_FDXD | GEP_MODE, DE4X5_GEP); |
outl | 2302 | drivers/net/de4x5.c | outl(POLL_DEMAND, DE4X5_TPD); |
outl | 2315 | drivers/net/de4x5.c | outl(GEP_HRST, DE4X5_GEP); /* Hard RESET the PHY dev. */ |
outl | 2317 | drivers/net/de4x5.c | outl(0x00, DE4X5_GEP); |
outl | 2339 | drivers/net/de4x5.c | outl(irq_mask, DE4X5_IMR); |
outl | 2343 | drivers/net/de4x5.c | outl(sts, DE4X5_STS); |
outl | 2348 | drivers/net/de4x5.c | outl(csr12, DE4X5_SISR); |
outl | 2483 | drivers/net/de4x5.c | outl(POLL_DEMAND, DE4X5_TPD); |
outl | 2592 | drivers/net/de4x5.c | outl(lp->cache.csr0, DE4X5_BMR); |
outl | 2593 | drivers/net/de4x5.c | outl(lp->cache.csr6, DE4X5_OMR); |
outl | 2594 | drivers/net/de4x5.c | outl(lp->cache.csr7, DE4X5_IMR); |
outl | 2596 | drivers/net/de4x5.c | outl(GEP_INIT, DE4X5_GEP); |
outl | 2601 | drivers/net/de4x5.c | outl(gep, DE4X5_GEP); |
outl | 2664 | drivers/net/de4x5.c | outl(irq_mask, DE4X5_IMR); |
outl | 2668 | drivers/net/de4x5.c | outl(sts, DE4X5_STS); |
outl | 2693 | drivers/net/de4x5.c | outl(sts, DE4X5_STS); |
outl | 2709 | drivers/net/de4x5.c | outl(sigr, DE4X5_SIGR); |
outl | 2710 | drivers/net/de4x5.c | outl(strr, DE4X5_STRR); |
outl | 2711 | drivers/net/de4x5.c | outl(sicr, DE4X5_SICR); |
outl | 2842 | drivers/net/de4x5.c | outl(0, aprom_addr); /* Reset Ethernet Address ROM Pointer */ |
outl | 3026 | drivers/net/de4x5.c | outl(command, addr); |
outl | 3140 | drivers/net/de4x5.c | outl(command | j, ioaddr); |
outl | 3142 | drivers/net/de4x5.c | outl(command | MII_MDC | j, ioaddr); |
outl | 3150 | drivers/net/de4x5.c | outl(command, ioaddr); |
outl | 3152 | drivers/net/de4x5.c | outl(command | MII_MDC, ioaddr); |
outl | 3213 | drivers/net/de4x5.c | outl(GEP_HRST, DE4X5_GEP); |
outl | 3215 | drivers/net/de4x5.c | outl(0x00, DE4X5_GEP); |
outl | 3305 | drivers/net/de4x5.c | outl(omr, DE4X5_OMR); |
outl | 3312 | drivers/net/de4x5.c | outl(GEP_INIT, DE4X5_GEP); |
outl | 3313 | drivers/net/de4x5.c | outl(0, DE4X5_GEP); |
outl | 3317 | drivers/net/de4x5.c | outl(omr, DE4X5_OMR); |
outl | 3330 | drivers/net/de4x5.c | outl(omr | OMR_TTM, DE4X5_OMR); |
outl | 3331 | drivers/net/de4x5.c | outl(omr, DE4X5_OMR); |
outl | 3338 | drivers/net/de4x5.c | outl(GEP_INIT, DE4X5_GEP); |
outl | 3339 | drivers/net/de4x5.c | outl(0, DE4X5_GEP); |
outl | 3343 | drivers/net/de4x5.c | outl(omr, DE4X5_OMR); |
outl | 3551 | drivers/net/de4x5.c | outl(POLL_DEMAND, DE4X5_TPD); /* Start the TX */ |
outl | 3559 | drivers/net/de4x5.c | outl(omr, DE4X5_OMR); |
outl | 3616 | drivers/net/de4x5.c | outl(omr, DE4X5_OMR); |
outl | 3654 | drivers/net/de4x5.c | outl(tmp.addr[0], DE4X5_OMR); |
outl | 749 | drivers/net/de4x5.h | outl(omr, DE4X5_OMR);\ |
outl | 750 | drivers/net/de4x5.h | outl(0, DE4X5_GEP);\ |
outl | 754 | drivers/net/de4x5.h | outl(omr | OMR_TTM, DE4X5_OMR);\ |
outl | 755 | drivers/net/de4x5.h | outl((de4x5_full_duplex ? 0 : GEP_FDXD), DE4X5_GEP);\ |
outl | 765 | drivers/net/de4x5.h | outl(omr, DE4X5_OMR);\ |
outl | 766 | drivers/net/de4x5.h | outl(((!(sr & MII_ANA_T4AM) && de4x5_full_duplex) ? 0:GEP_FDXD)|GEP_MODE,\ |
outl | 771 | drivers/net/de4x5.h | outl(omr | OMR_PS | OMR_HBD | OMR_PCS | OMR_SCR, DE4X5_OMR);\ |
outl | 772 | drivers/net/de4x5.h | outl((de4x5_full_duplex ? 0 : GEP_FDXD) | GEP_MODE, DE4X5_GEP);\ |
outl | 351 | drivers/net/hp100.h | outl( data, ioaddr + HP100_REG_##reg ) |
outl | 684 | drivers/net/smc9194.c | outl( (length +6 ) << 16 , ioaddr + DATA_1 ); |
outl | 469 | drivers/net/tulip.c | #define tio_write(val, port) outl(val, ioaddr + port) |
outl | 1535 | drivers/scsi/53c7,8xx.h | outl((value), NCR53c7x0_address_io + (address))) |
outl | 476 | drivers/scsi/AM53C974.c | outl(config_cmd, 0xCF8); /* ioreg 0 */ |
outl | 480 | drivers/scsi/AM53C974.c | outl(config_cmd | PCI_COMMAND, 0xCF8); pci_config._status_command = inl(0xCFC); |
outl | 481 | drivers/scsi/AM53C974.c | outl(config_cmd | PCI_CLASS_REVISION, 0xCF8); pci_config._class_revision = inl(0xCFC); |
outl | 482 | drivers/scsi/AM53C974.c | outl(config_cmd | PCI_CACHE_LINE_SIZE, 0xCF8); pci_config._bist_header_latency_cache = inl(0xCFC); |
outl | 483 | drivers/scsi/AM53C974.c | outl(config_cmd | PCI_BASE_ADDRESS_0, 0xCF8); pci_config._base0 = inl(0xCFC); |
outl | 484 | drivers/scsi/AM53C974.c | outl(config_cmd | PCI_BASE_ADDRESS_1, 0xCF8); pci_config._base1 = inl(0xCFC); |
outl | 485 | drivers/scsi/AM53C974.c | outl(config_cmd | PCI_BASE_ADDRESS_2, 0xCF8); pci_config._base2 = inl(0xCFC); |
outl | 486 | drivers/scsi/AM53C974.c | outl(config_cmd | PCI_BASE_ADDRESS_3, 0xCF8); pci_config._base3 = inl(0xCFC); |
outl | 487 | drivers/scsi/AM53C974.c | outl(config_cmd | PCI_BASE_ADDRESS_4, 0xCF8); pci_config._base4 = inl(0xCFC); |
outl | 488 | drivers/scsi/AM53C974.c | outl(config_cmd | PCI_BASE_ADDRESS_5, 0xCF8); pci_config._base5 = inl(0xCFC); |
outl | 489 | drivers/scsi/AM53C974.c | outl(config_cmd | PCI_ROM_ADDRESS, 0xCF8); pci_config._baserom = inl(0xCFC); |
outl | 490 | drivers/scsi/AM53C974.c | outl(config_cmd | PCI_INTERRUPT_LINE, 0xCF8); pci_config._max_min_ipin_iline = inl(0xCFC); |
outl | 501 | drivers/scsi/AM53C974.c | outl(config_cmd | PCI_COMMAND, 0xCF8); outw(pci_config._command, 0xCFC); } |
outl | 302 | drivers/scsi/AM53C974.h | #define AM53C974_write_32(addr,x) outl((x), io_port + (addr)) |
outl | 330 | drivers/scsi/AM53C974.h | #define AM53C974_PCIREG_WRITE_DWORD(instance,x,a) ( outl((x), (a) + (instance)->io_port) ) |
outl | 4291 | drivers/scsi/advansys.c | outl(address, 0xCF8); |
outl | 4368 | drivers/scsi/advansys.c | outl(address, 0xCF8); |
outl | 395 | drivers/scsi/aha1740.c | outl(virt_to_bus(ecb+ecbno), MBOXOUT0); |
outl | 326 | drivers/scsi/u14-34f.c | outl((unsigned int)cpp, sh[j]->io_port + REG_OGM); |
outl | 649 | drivers/scsi/u14-34f.c | outl((unsigned int)cpp, sh[j]->io_port + REG_OGM); |
outl | 794 | drivers/scsi/ultrastor.c | outl((unsigned int)my_mscp, config.ogm_address); |
outl | 908 | drivers/scsi/ultrastor.c | outl((int)&config.mscp[mscp_index], config.ogm_address); |
outl | 124 | include/asm-alpha/io.h | #ifndef outl |
outl | 144 | include/asm-alpha/io.h | # define outl_p outl |
outl | 158 | include/asm-alpha/io.h | # define outl_p outl |
outl | 71 | include/asm-ppc/io.h | unsigned long outl(unsigned long val,int port); |
outl | 82 | include/asm-ppc/io.h | static inline unsigned long outl_p(unsigned long val,int port) { return (outl(val,port)); } |