taglinefilesource code
config_cmd473drivers/scsi/AM53C974.cunsigned long config_cmd;
config_cmd474drivers/scsi/AM53C974.cconfig_cmd = 0x80000000 | (pci_config._pcibus<<16) | (pci_config._cardnum<<11);
config_cmd476drivers/scsi/AM53C974.coutl(config_cmd, 0xCF8);         /* ioreg 0 */
config_cmd480drivers/scsi/AM53C974.coutl(config_cmd | PCI_COMMAND, 0xCF8); pci_config._status_command  = inl(0xCFC);
config_cmd481drivers/scsi/AM53C974.coutl(config_cmd | PCI_CLASS_REVISION, 0xCF8); pci_config._class_revision = inl(0xCFC);
config_cmd482drivers/scsi/AM53C974.coutl(config_cmd | PCI_CACHE_LINE_SIZE, 0xCF8); pci_config._bist_header_latency_cache = inl(0xCFC);
config_cmd483drivers/scsi/AM53C974.coutl(config_cmd | PCI_BASE_ADDRESS_0, 0xCF8); pci_config._base0 = inl(0xCFC);
config_cmd484drivers/scsi/AM53C974.coutl(config_cmd | PCI_BASE_ADDRESS_1, 0xCF8); pci_config._base1 = inl(0xCFC);
config_cmd485drivers/scsi/AM53C974.coutl(config_cmd | PCI_BASE_ADDRESS_2, 0xCF8); pci_config._base2 = inl(0xCFC);
config_cmd486drivers/scsi/AM53C974.coutl(config_cmd | PCI_BASE_ADDRESS_3, 0xCF8); pci_config._base3 = inl(0xCFC);
config_cmd487drivers/scsi/AM53C974.coutl(config_cmd | PCI_BASE_ADDRESS_4, 0xCF8); pci_config._base4 = inl(0xCFC);
config_cmd488drivers/scsi/AM53C974.coutl(config_cmd | PCI_BASE_ADDRESS_5, 0xCF8); pci_config._base5 = inl(0xCFC);
config_cmd489drivers/scsi/AM53C974.coutl(config_cmd | PCI_ROM_ADDRESS, 0xCF8); pci_config._baserom = inl(0xCFC);
config_cmd490drivers/scsi/AM53C974.coutl(config_cmd | PCI_INTERRUPT_LINE, 0xCF8); pci_config._max_min_ipin_iline = inl(0xCFC);
config_cmd501drivers/scsi/AM53C974.coutl(config_cmd | PCI_COMMAND, 0xCF8); outw(pci_config._command, 0xCFC); }