taglinefilesource code
NCR5380_write659drivers/scsi/NCR5380.cNCR5380_write(TARGET_COMMAND_REG, 0);
NCR5380_write660drivers/scsi/NCR5380.cNCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
NCR5380_write661drivers/scsi/NCR5380.cNCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask);
NCR5380_write662drivers/scsi/NCR5380.cNCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA | 
NCR5380_write668drivers/scsi/NCR5380.cNCR5380_write(SELECT_ENABLE_REG, 0);
NCR5380_write669drivers/scsi/NCR5380.cNCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
NCR5380_write974drivers/scsi/NCR5380.cNCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
NCR5380_write975drivers/scsi/NCR5380.cNCR5380_write(MODE_REG, MR_BASE);
NCR5380_write976drivers/scsi/NCR5380.cNCR5380_write(TARGET_COMMAND_REG, 0);
NCR5380_write977drivers/scsi/NCR5380.cNCR5380_write(SELECT_ENABLE_REG, 0);
NCR5380_write981drivers/scsi/NCR5380.cNCR5380_write(C400_CONTROL_STATUS_REG, CSR_BASE);
NCR5380_write1376drivers/scsi/NCR5380.cNCR5380_write(MODE_REG, MR_BASE);
NCR5380_write1377drivers/scsi/NCR5380.cNCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
NCR5380_write1475drivers/scsi/NCR5380.cNCR5380_write(TARGET_COMMAND_REG, 0);
NCR5380_write1482drivers/scsi/NCR5380.cNCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask);
NCR5380_write1483drivers/scsi/NCR5380.cNCR5380_write(MODE_REG, MR_ARBITRATE);
NCR5380_write1498drivers/scsi/NCR5380.cNCR5380_write(MODE_REG, MR_BASE);
NCR5380_write1499drivers/scsi/NCR5380.cNCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
NCR5380_write1526drivers/scsi/NCR5380.cNCR5380_write(MODE_REG, MR_BASE); 
NCR5380_write1536drivers/scsi/NCR5380.cNCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_SEL);
NCR5380_write1539drivers/scsi/NCR5380.cNCR5380_write(MODE_REG, MR_BASE);
NCR5380_write1540drivers/scsi/NCR5380.cNCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
NCR5380_write1565drivers/scsi/NCR5380.cNCR5380_write(OUTPUT_DATA_REG, (hostdata->id_mask | (1 << cmd->target)));
NCR5380_write1573drivers/scsi/NCR5380.cNCR5380_write(INITIATOR_COMMAND_REG, (ICR_BASE | ICR_ASSERT_BSY | 
NCR5380_write1575drivers/scsi/NCR5380.cNCR5380_write(MODE_REG, MR_BASE);
NCR5380_write1581drivers/scsi/NCR5380.cNCR5380_write(SELECT_ENABLE_REG, 0);
NCR5380_write1590drivers/scsi/NCR5380.cNCR5380_write(INITIATOR_COMMAND_REG, (ICR_BASE | ICR_ASSERT_DATA | 
NCR5380_write1634drivers/scsi/NCR5380.cNCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
NCR5380_write1638drivers/scsi/NCR5380.cNCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
NCR5380_write1650drivers/scsi/NCR5380.cNCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
NCR5380_write1653drivers/scsi/NCR5380.cNCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
NCR5380_write1661drivers/scsi/NCR5380.cNCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
NCR5380_write1669drivers/scsi/NCR5380.cNCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
NCR5380_write1674drivers/scsi/NCR5380.cNCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
NCR5380_write1704drivers/scsi/NCR5380.cNCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
NCR5380_write1806drivers/scsi/NCR5380.cNCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p));
NCR5380_write1830drivers/scsi/NCR5380.cNCR5380_write(OUTPUT_DATA_REG, *d);
NCR5380_write1845drivers/scsi/NCR5380.cNCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | 
NCR5380_write1850drivers/scsi/NCR5380.cNCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | 
NCR5380_write1853drivers/scsi/NCR5380.cNCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
NCR5380_write1858drivers/scsi/NCR5380.cNCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | 
NCR5380_write1865drivers/scsi/NCR5380.cNCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ACK);
NCR5380_write1887drivers/scsi/NCR5380.cNCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
NCR5380_write1889drivers/scsi/NCR5380.cNCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
NCR5380_write1916drivers/scsi/NCR5380.cNCR5380_write(TARGET_COMMAND_REG, 
NCR5380_write1918drivers/scsi/NCR5380.cNCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_RST);
NCR5380_write1920drivers/scsi/NCR5380.cNCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
NCR5380_write1941drivers/scsi/NCR5380.cNCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
NCR5380_write1955drivers/scsi/NCR5380.cNCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp));
NCR5380_write1958drivers/scsi/NCR5380.cNCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN | 
NCR5380_write1961drivers/scsi/NCR5380.cNCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
NCR5380_write2037drivers/scsi/NCR5380.cNCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p));
NCR5380_write2040drivers/scsi/NCR5380.cNCR5380_write(MODE_REG, MR_BASE | MR_DMA_MODE | MR_ENABLE_EOP_INTR | MR_MONITOR_BSY);
NCR5380_write2042drivers/scsi/NCR5380.cNCR5380_write(MODE_REG, MR_BASE | MR_DMA_MODE);
NCR5380_write2055drivers/scsi/NCR5380.cNCR5380_write(MODE_REG, MR_BASE | MR_DMA_MODE | MR_ENABLE_PAR_CHECK
NCR5380_write2059drivers/scsi/NCR5380.cNCR5380_write(MODE_REG, MR_BASE | MR_DMA_MODE);
NCR5380_write2079drivers/scsi/NCR5380.cNCR5380_write(START_DMA_INITIATOR_RECEIVE_REG, 0);
NCR5380_write2084drivers/scsi/NCR5380.cNCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA);
NCR5380_write2088drivers/scsi/NCR5380.cNCR5380_write(START_DMA_SEND_REG, 0);
NCR5380_write2160drivers/scsi/NCR5380.cNCR5380_write(MODE_REG, MR_BASE);
NCR5380_write2161drivers/scsi/NCR5380.cNCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
NCR5380_write2304drivers/scsi/NCR5380.cNCR5380_write(MODE_REG, MR_BASE);
NCR5380_write2305drivers/scsi/NCR5380.cNCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
NCR5380_write2380drivers/scsi/NCR5380.cNCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp));
NCR5380_write2382drivers/scsi/NCR5380.cNCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN | 
NCR5380_write2385drivers/scsi/NCR5380.cNCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | 
NCR5380_write2469drivers/scsi/NCR5380.cNCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | 
NCR5380_write2505drivers/scsi/NCR5380.cNCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
NCR5380_write2544drivers/scsi/NCR5380.cNCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
NCR5380_write2609drivers/scsi/NCR5380.cNCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
NCR5380_write2614drivers/scsi/NCR5380.cNCR5380_write(TARGET_COMMAND_REG, 0);
NCR5380_write2621drivers/scsi/NCR5380.cNCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
NCR5380_write2634drivers/scsi/NCR5380.cNCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
NCR5380_write2652drivers/scsi/NCR5380.cNCR5380_write(TARGET_COMMAND_REG, 0);
NCR5380_write2655drivers/scsi/NCR5380.cNCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
NCR5380_write2676drivers/scsi/NCR5380.cNCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
NCR5380_write2693drivers/scsi/NCR5380.cNCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
NCR5380_write2714drivers/scsi/NCR5380.cNCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
NCR5380_write2761drivers/scsi/NCR5380.cNCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | 
NCR5380_write2779drivers/scsi/NCR5380.cNCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
NCR5380_write2869drivers/scsi/NCR5380.cNCR5380_write(MODE_REG, MR_BASE);
NCR5380_write2887drivers/scsi/NCR5380.cNCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_BSY);
NCR5380_write2890drivers/scsi/NCR5380.cNCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
NCR5380_write2911drivers/scsi/NCR5380.cNCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
NCR5380_write3006drivers/scsi/NCR5380.cNCR5380_write(MODE_REG, MR_BASE);
NCR5380_write3007drivers/scsi/NCR5380.cNCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
NCR5380_write3086drivers/scsi/NCR5380.cNCR5380_write(INITIATOR_COMMAND_REG, ICR_ASSERT_ATN);
NCR5380_write209drivers/scsi/dtc.cNCR5380_write(DTC_CONTROL_REG, CSR_5380_INTR); /* Enable int's */
NCR5380_write311drivers/scsi/dtc.cNCR5380_write(MODE_REG, MR_ENABLE_EOP_INTR | MR_DMA_MODE);
NCR5380_write313drivers/scsi/dtc.cNCR5380_write(DTC_CONTROL_REG, CSR_DIR_READ);
NCR5380_write315drivers/scsi/dtc.cNCR5380_write(DTC_CONTROL_REG, CSR_DIR_READ | CSR_INT_BASE);
NCR5380_write316drivers/scsi/dtc.cNCR5380_write(DTC_BLK_CNT, len >> 7);        /* Block count */
NCR5380_write332drivers/scsi/dtc.cNCR5380_write(MODE_REG, 0); /* Clear the operating mode */
NCR5380_write360drivers/scsi/dtc.cNCR5380_write(MODE_REG, MR_ENABLE_EOP_INTR | MR_DMA_MODE);
NCR5380_write363drivers/scsi/dtc.cNCR5380_write(DTC_CONTROL_REG, 0);
NCR5380_write365drivers/scsi/dtc.cNCR5380_write(DTC_CONTROL_REG, CSR_5380_INTR);
NCR5380_write366drivers/scsi/dtc.cNCR5380_write(DTC_BLK_CNT, len >> 7);        /* Block count */
NCR5380_write386drivers/scsi/dtc.cNCR5380_write(MODE_REG, 0); /* Clear the operating mode */
NCR5380_write305drivers/scsi/g_NCR5380.cNCR5380_write(C400_CONTROL_STATUS_REG, CSR_BASE | CSR_TRANS_DIR);
NCR5380_write306drivers/scsi/g_NCR5380.cNCR5380_write(C400_BLOCK_COUNTER_REG, blocks);
NCR5380_write394drivers/scsi/g_NCR5380.cNCR5380_write(MODE_REG, MR_BASE);
NCR5380_write413drivers/scsi/g_NCR5380.cNCR5380_write(C400_CONTROL_STATUS_REG, CSR_BASE);
NCR5380_write414drivers/scsi/g_NCR5380.cNCR5380_write(C400_BLOCK_COUNTER_REG, blocks);
NCR5380_write444drivers/scsi/g_NCR5380.cNCR5380_write(C400_HOST_BUFFER, src[start+i]);
NCR5380_write464drivers/scsi/g_NCR5380.cNCR5380_write(C400_HOST_BUFFER, src[start+i]);
NCR5380_write318drivers/scsi/pas16.cNCR5380_write( MODE_REG, 0x20 );    /* Is it really SCSI? */
NCR5380_write321drivers/scsi/pas16.cNCR5380_write( MODE_REG, 0x00 );    /* it back.        */