root/include/linux/sdla.h

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INCLUDED FROM


   1 /*
   2  * INET         An implementation of the TCP/IP protocol suite for the LINUX
   3  *              operating system.  INET is implemented using the  BSD Socket
   4  *              interface as the means of communication with the user level.
   5  *
   6  *              Global definitions for the Frame relay interface.
   7  *
   8  * Version:     @(#)if_ifrad.h  0.15    31 Mar 96
   9  *
  10  * Author:      Mike McLagan <mike.mclagan@linux.org>
  11  *
  12  *              This program is free software; you can redistribute it and/or
  13  *              modify it under the terms of the GNU General Public License
  14  *              as published by the Free Software Foundation; either version
  15  *              2 of the License, or (at your option) any later version.
  16  */
  17 
  18 #ifndef SDLA_H
  19 #define SDLA_H
  20 
  21 /* adapter type */
  22 #define SDLA_TYPES
  23 #define SDLA_S502A                      5020
  24 #define SDLA_S502E                      5021
  25 #define SDLA_S503                       5030
  26 #define SDLA_S507                       5070
  27 #define SDLA_S508                       5080
  28 #define SDLA_S509                       5090
  29 #define SDLA_UNKNOWN                    -1
  30 
  31 /* port selection flags for the S508 */
  32 #define SDLA_S508_PORT_V35              0x00
  33 #define SDLA_S508_PORT_RS232            0x02
  34 
  35 /* Z80 CPU speeds */
  36 #define SDLA_CPU_3M                     0x00
  37 #define SDLA_CPU_5M                     0x01
  38 #define SDLA_CPU_7M                     0x02
  39 #define SDLA_CPU_8M                     0x03
  40 #define SDLA_CPU_10M                    0x04
  41 #define SDLA_CPU_16M                    0x05
  42 #define SDLA_CPU_12M                    0x06
  43 
  44 /* some private IOCTLs */
  45 #define SDLA_IDENTIFY                   (FRAD_LAST_IOCTL + 1)
  46 #define SDLA_CPUSPEED                   (FRAD_LAST_IOCTL + 2)
  47 #define SDLA_PROTOCOL                   (FRAD_LAST_IOCTL + 3)
  48 
  49 #define SDLA_CLEARMEM                   (FRAD_LAST_IOCTL + 4)
  50 #define SDLA_WRITEMEM                   (FRAD_LAST_IOCTL + 5)
  51 #define SDLA_READMEM                    (FRAD_LAST_IOCTL + 6)
  52 
  53 struct sdla_mem {
  54    int  addr;
  55    int  len;
  56    void *data;
  57 };
  58 
  59 #define SDLA_START                      (FRAD_LAST_IOCTL + 7)
  60 #define SDLA_STOP                       (FRAD_LAST_IOCTL + 8)
  61 
  62 /* some offsets in the Z80's memory space */
  63 #define SDLA_NMIADDR                    0x0000
  64 #define SDLA_CONF_ADDR                  0x0010
  65 #define SDLA_S502A_NMIADDR              0x0066
  66 #define SDLA_CODE_BASEADDR              0x0100
  67 #define SDLA_WINDOW_SIZE                0x2000
  68 #define SDLA_ADDR_MASK                  0x1FFF
  69 
  70 /* largest handleable block of data */
  71 #define SDLA_MAX_DATA                   4080
  72 #define SDLA_MAX_MTU                    4072    /* MAX_DATA - sizeof(fradhdr) */
  73 #define SDLA_MAX_DLCI                   24
  74 
  75 /* this should be the same as frad_conf */
  76 struct sdla_conf {
  77    short station;
  78    short config;
  79    short kbaud;
  80    short clocking;
  81    short max_frm;
  82    short T391;
  83    short T392;
  84    short N391;
  85    short N392;
  86    short N393;
  87    short CIR_fwd;
  88    short Bc_fwd;
  89    short Be_fwd;
  90    short CIR_bwd;
  91    short Bc_bwd;
  92    short Be_bwd;
  93 };
  94 
  95 /* this should be the same as dlci_conf */
  96 struct sdla_dlci_conf {
  97    short config;
  98    short CIR_fwd;
  99    short Bc_fwd;
 100    short Be_fwd;
 101    short CIR_bwd;
 102    short Bc_bwd;
 103    short Be_bwd; 
 104    short Tc_fwd;
 105    short Tc_bwd;
 106    short Tf_max;
 107    short Tb_max;
 108 };
 109 
 110 #ifndef __KERNEL__
 111 
 112 void sdla(void *cfg_info, char *dev, struct frad_conf *conf, int quiet);
 113 
 114 #else
 115 
 116 /* important Z80 window addresses */
 117 #define SDLA_CONTROL_WND                0xE000
 118 
 119 #define SDLA_502_CMD_BUF                0xEF60
 120 #define SDLA_502_RCV_BUF                0xA900
 121 #define SDLA_502_TXN_AVAIL              0xFFF1
 122 #define SDLA_502_RCV_AVAIL              0xFFF2
 123 #define SDLA_502_EVENT_FLAGS            0xFFF3
 124 #define SDLA_502_MDM_STATUS             0xFFF4
 125 #define SDLA_502_IRQ_INTERFACE          0xFFFD
 126 #define SDLA_502_IRQ_PERMISSION         0xFFFE
 127 #define SDLA_502_DATA_OFS               0x0010
 128 
 129 #define SDLA_508_CMD_BUF                0xE000
 130 #define SDLA_508_TXBUF_INFO             0xF100
 131 #define SDLA_508_RXBUF_INFO             0xF120
 132 #define SDLA_508_EVENT_FLAGS            0xF003
 133 #define SDLA_508_MDM_STATUS             0xF004
 134 #define SDLA_508_IRQ_INTERFACE          0xF010
 135 #define SDLA_508_IRQ_PERMISSION         0xF011
 136 #define SDLA_508_TSE_OFFSET             0xF012
 137 
 138 /* Event flags */
 139 #define SDLA_EVENT_STATUS               0x01
 140 #define SDLA_EVENT_DLCI_STATUS          0x02
 141 #define SDLA_EVENT_BAD_DLCI             0x04
 142 #define SDLA_EVENT_LINK_DOWN            0x40
 143 
 144 /* IRQ Trigger flags */
 145 #define SDLA_INTR_RX                    0x01
 146 #define SDLA_INTR_TX                    0x02
 147 #define SDLA_INTR_MODEM                 0x04
 148 #define SDLA_INTR_COMPLETE              0x08
 149 #define SDLA_INTR_STATUS                0x10
 150 #define SDLA_INTR_TIMER                 0x20
 151 
 152 /* DLCI status bits */
 153 #define SDLA_DLCI_DELETED               0x01
 154 #define SDLA_DLCI_ACTIVE                0x02
 155 #define SDLA_DLCI_WAITING               0x04
 156 #define SDLA_DLCI_NEW                   0x08
 157 #define SDLA_DLCI_INCLUDED              0x40
 158 
 159 /* valid command codes */
 160 #define SDLA_INFORMATION_WRITE          0x01
 161 #define SDLA_INFORMATION_READ           0x02
 162 #define SDLA_ISSUE_IN_CHANNEL_SIGNAL    0x03
 163 #define SDLA_SET_DLCI_CONFIGURATION     0x10
 164 #define SDLA_READ_DLCI_CONFIGURATION    0x11
 165 #define SDLA_DISABLE_COMMUNICATIONS     0x12
 166 #define SDLA_ENABLE_COMMUNICATIONS      0x13
 167 #define SDLA_READ_DLC_STATUS            0x14
 168 #define SDLA_READ_DLC_STATISTICS        0x15
 169 #define SDLA_FLUSH_DLC_STATISTICS       0x16
 170 #define SDLA_LIST_ACTIVE_DLCI           0x17
 171 #define SDLA_FLUSH_INFORMATION_BUFFERS  0x18
 172 #define SDLA_ADD_DLCI                   0x20
 173 #define SDLA_DELETE_DLCI                0x21
 174 #define SDLA_ACTIVATE_DLCI              0x22
 175 #define SDLA_DEACTIVATE_DLCI            0x23
 176 #define SDLA_READ_MODEM_STATUS          0x30
 177 #define SDLA_SET_MODEM_STATUS           0x31
 178 #define SDLA_READ_COMMS_ERR_STATS       0x32
 179 #define SDLA_FLUSH_COMMS_ERR_STATS      0x33
 180 #define SDLA_READ_CODE_VERSION          0x40
 181 #define SDLA_SET_IRQ_TRIGGER            0x50
 182 #define SDLA_GET_IRQ_TRIGGER            0x51
 183 
 184 /* In channel signal types */
 185 #define SDLA_ICS_LINK_VERIFY            0x02
 186 #define SDLA_ICS_STATUS_ENQ             0x03
 187 
 188 /* modem status flags */
 189 #define SDLA_MODEM_DTR_HIGH             0x01
 190 #define SDLA_MODEM_RTS_HIGH             0x02
 191 #define SDLA_MODEM_DCD_HIGH             0x08
 192 #define SDLA_MODEM_CTS_HIGH             0x20
 193 
 194 /* used for RET_MODEM interpretation */
 195 #define SDLA_MODEM_DCD_LOW              0x01
 196 #define SDLA_MODEM_CTS_LOW              0x02
 197 
 198 /* return codes */
 199 #define SDLA_RET_OK                     0x00
 200 #define SDLA_RET_COMMUNICATIONS         0x01
 201 #define SDLA_RET_CHANNEL_INACTIVE       0x02
 202 #define SDLA_RET_DLCI_INACTIVE          0x03
 203 #define SDLA_RET_DLCI_CONFIG            0x04
 204 #define SDLA_RET_BUF_TOO_BIG            0x05
 205 #define SDLA_RET_NO_DATA                0x05
 206 #define SDLA_RET_BUF_OVERSIZE           0x06
 207 #define SDLA_RET_CIR_OVERFLOW           0x07
 208 #define SDLA_RET_NO_BUFS                0x08
 209 #define SDLA_RET_TIMEOUT                0x0A
 210 #define SDLA_RET_MODEM                  0x10
 211 #define SDLA_RET_CHANNEL_OFF            0x11
 212 #define SDLA_RET_CHANNEL_ON             0x12
 213 #define SDLA_RET_DLCI_STATUS            0x13
 214 #define SDLA_RET_DLCI_UNKNOWN           0x14
 215 #define SDLA_RET_COMMAND_INVALID        0x1F
 216 
 217 /* Configuration flags */
 218 #define SDLA_DIRECT_RECV                0x0080
 219 
 220 /* IRQ selection flags */
 221 #define SDLA_IRQ_RECEIVE                0x01
 222 #define SDLA_IRQ_TRANSMIT               0x02
 223 #define SDLA_IRQ_MODEM_STAT             0x04
 224 #define SDLA_IRQ_COMMAND                0x08
 225 #define SDLA_IRQ_CHANNEL                0x10
 226 #define SDLA_IRQ_TIMER                  0x20
 227 
 228 /* definitions for PC memory mapping */
 229 #define SDLA_8K_WINDOW                  0x01
 230 #define SDLA_S502_SEG_A                 0x10
 231 #define SDLA_S502_SEG_C                 0x20
 232 #define SDLA_S502_SEG_D                 0x00
 233 #define SDLA_S502_SEG_E                 0x30
 234 #define SDLA_S507_SEG_A                 0x00
 235 #define SDLA_S507_SEG_B                 0x40
 236 #define SDLA_S507_SEG_C                 0x80
 237 #define SDLA_S507_SEG_E                 0xC0
 238 #define SDLA_S508_SEG_A                 0x00
 239 #define SDLA_S508_SEG_C                 0x10
 240 #define SDLA_S508_SEG_D                 0x08
 241 #define SDLA_S508_SEG_E                 0x18
 242 
 243 /* SDLA adapter port constants */
 244 #define SDLA_IO_EXTENTS                 0x04
 245         
 246 #define SDLA_REG_CONTROL                0x00
 247 #define SDLA_REG_PC_WINDOW              0x01    /* offset for PC window select latch */
 248 #define SDLA_REG_Z80_WINDOW             0x02    /* offset for Z80 window select latch */
 249 #define SDLA_REG_Z80_CONTROL            0x03    /* offset for Z80 control latch */
 250         
 251 #define SDLA_S502_STS                   0x00    /* status reg for 502, 502E, 507 */
 252 #define SDLA_S508_GNRL                  0x00    /* general purp. reg for 508 */
 253 #define SDLA_S508_STS                   0x01    /* status reg for 508 */
 254 #define SDLA_S508_IDR                   0x02    /* ID reg for 508 */
 255         
 256 /* control register flags */
 257 #define SDLA_S502A_START                0x00    /* start the CPU */
 258 #define SDLA_S502A_INTREQ               0x02
 259 #define SDLA_S502A_INTEN                0x04
 260 #define SDLA_S502A_HALT                 0x08    /* halt the CPU */      
 261 #define SDLA_S502A_NMI                  0x10    /* issue an NMI to the CPU */
 262 
 263 #define SDLA_S502E_CPUEN                0x01
 264 #define SDLA_S502E_ENABLE               0x02
 265 #define SDLA_S502E_INTACK               0x04
 266         
 267 #define SDLA_S507_ENABLE                0x01
 268 #define SDLA_S507_IRQ3                  0x00
 269 #define SDLA_S507_IRQ4                  0x20
 270 #define SDLA_S507_IRQ5                  0x40
 271 #define SDLA_S507_IRQ7                  0x60
 272 #define SDLA_S507_IRQ10                 0x80
 273 #define SDLA_S507_IRQ11                 0xA0
 274 #define SDLA_S507_IRQ12                 0xC0
 275 #define SDLA_S507_IRQ15                 0xE0
 276         
 277 #define SDLA_HALT                       0x00
 278 #define SDLA_CPUEN                      0x02
 279 #define SDLA_MEMEN                      0x04
 280 #define SDLA_S507_EPROMWR               0x08
 281 #define SDLA_S507_EPROMCLK              0x10
 282 #define SDLA_S508_INTRQ                 0x08
 283 #define SDLA_S508_INTEN                 0x10
 284 
 285 struct sdla_cmd {
 286    char  opp_flag               __attribute__((packed));
 287    char  cmd                    __attribute__((packed));
 288    short length                 __attribute__((packed));
 289    char  retval                 __attribute__((packed));
 290    short dlci                   __attribute__((packed));
 291    char  flags                  __attribute__((packed));
 292    short rxlost_int             __attribute__((packed));
 293    long  rxlost_app             __attribute__((packed));
 294    char  reserve[2]             __attribute__((packed));
 295    char  data[SDLA_MAX_DATA]    __attribute__((packed));        /* transfer data buffer */
 296 };
 297 
 298 struct intr_info {
 299    char  flags          __attribute__((packed));
 300    short txlen          __attribute__((packed));
 301    char  irq            __attribute__((packed));
 302    char  flags2         __attribute__((packed));
 303    short timeout        __attribute__((packed));
 304 };
 305 
 306 /* found in the 508's control window at RXBUF_INFO */
 307 struct buf_info {
 308    unsigned short rse_num       __attribute__((packed));
 309    unsigned long  rse_base      __attribute__((packed));
 310    unsigned long  rse_next      __attribute__((packed));
 311    unsigned long  buf_base      __attribute__((packed));
 312    unsigned short reserved      __attribute__((packed));
 313    unsigned long  buf_top       __attribute__((packed));
 314 };
 315 
 316 /* structure pointed to by rse_base in RXBUF_INFO struct */
 317 struct buf_entry {
 318    char  opp_flag       __attribute__((packed));
 319    short length         __attribute__((packed));
 320    short dlci           __attribute__((packed));
 321    char  flags          __attribute__((packed));
 322    short timestamp      __attribute__((packed));
 323    short reserved[2]    __attribute__((packed));
 324    long  buf_addr       __attribute__((packed));
 325 };
 326 
 327 #endif
 328 
 329 #endif

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