taglinefilesource code
dmanr158include/asm-alpha/dma.hstatic __inline__ void enable_dma(unsigned int dmanr)
dmanr160include/asm-alpha/dma.hif (dmanr<=3)
dmanr161include/asm-alpha/dma.hdma_outb(dmanr,  DMA1_MASK_REG);
dmanr163include/asm-alpha/dma.hdma_outb(dmanr & 3,  DMA2_MASK_REG);
dmanr166include/asm-alpha/dma.hstatic __inline__ void disable_dma(unsigned int dmanr)
dmanr168include/asm-alpha/dma.hif (dmanr<=3)
dmanr169include/asm-alpha/dma.hdma_outb(dmanr | 4,  DMA1_MASK_REG);
dmanr171include/asm-alpha/dma.hdma_outb((dmanr & 3) | 4,  DMA2_MASK_REG);
dmanr181include/asm-alpha/dma.hstatic __inline__ void clear_dma_ff(unsigned int dmanr)
dmanr183include/asm-alpha/dma.hif (dmanr<=3)
dmanr190include/asm-alpha/dma.hstatic __inline__ void set_dma_mode(unsigned int dmanr, char mode)
dmanr192include/asm-alpha/dma.hif (dmanr<=3)
dmanr193include/asm-alpha/dma.hdma_outb(mode | dmanr,  DMA1_MODE_REG);
dmanr195include/asm-alpha/dma.hdma_outb(mode | (dmanr&3),  DMA2_MODE_REG);
dmanr199include/asm-alpha/dma.hstatic __inline__ void set_dma_ext_mode(unsigned int dmanr, char ext_mode)
dmanr201include/asm-alpha/dma.hif (dmanr<=3)
dmanr202include/asm-alpha/dma.hdma_outb(ext_mode | dmanr,  DMA1_EXT_MODE_REG);
dmanr204include/asm-alpha/dma.hdma_outb(ext_mode | (dmanr&3),  DMA2_EXT_MODE_REG);
dmanr211include/asm-alpha/dma.hstatic __inline__ void set_dma_page(unsigned int dmanr, unsigned int pagenr)
dmanr213include/asm-alpha/dma.hswitch(dmanr) {
dmanr249include/asm-alpha/dma.hstatic __inline__ void set_dma_addr(unsigned int dmanr, unsigned int a)
dmanr251include/asm-alpha/dma.hif (dmanr <= 3)  {
dmanr252include/asm-alpha/dma.hdma_outb( a & 0xff, ((dmanr&3)<<1) + IO_DMA1_BASE );
dmanr253include/asm-alpha/dma.hdma_outb( (a>>8) & 0xff, ((dmanr&3)<<1) + IO_DMA1_BASE );
dmanr255include/asm-alpha/dma.hdma_outb( (a>>1) & 0xff, ((dmanr&3)<<2) + IO_DMA2_BASE );
dmanr256include/asm-alpha/dma.hdma_outb( (a>>9) & 0xff, ((dmanr&3)<<2) + IO_DMA2_BASE );
dmanr258include/asm-alpha/dma.hset_dma_page(dmanr, a>>16);  /* set hipage last to enable 32-bit mode */
dmanr270include/asm-alpha/dma.hstatic __inline__ void set_dma_count(unsigned int dmanr, unsigned int count)
dmanr273include/asm-alpha/dma.hif (dmanr <= 3)  {
dmanr274include/asm-alpha/dma.hdma_outb( count & 0xff, ((dmanr&3)<<1) + 1 + IO_DMA1_BASE );
dmanr275include/asm-alpha/dma.hdma_outb( (count>>8) & 0xff, ((dmanr&3)<<1) + 1 + IO_DMA1_BASE );
dmanr277include/asm-alpha/dma.hdma_outb( (count>>1) & 0xff, ((dmanr&3)<<2) + 2 + IO_DMA2_BASE );
dmanr278include/asm-alpha/dma.hdma_outb( (count>>9) & 0xff, ((dmanr&3)<<2) + 2 + IO_DMA2_BASE );
dmanr291include/asm-alpha/dma.hstatic __inline__ int get_dma_residue(unsigned int dmanr)
dmanr293include/asm-alpha/dma.hunsigned int io_port = (dmanr<=3)? ((dmanr&3)<<1) + 1 + IO_DMA1_BASE
dmanr294include/asm-alpha/dma.h: ((dmanr&3)<<2) + 2 + IO_DMA2_BASE;
dmanr302include/asm-alpha/dma.hreturn (dmanr<=3)? count : (count<<1);
dmanr307include/asm-alpha/dma.hextern int request_dma(unsigned int dmanr, const char * device_id);  /* reserve a DMA channel */
dmanr308include/asm-alpha/dma.hextern void free_dma(unsigned int dmanr);  /* release it again */
dmanr133include/asm-i386/dma.hstatic __inline__ void enable_dma(unsigned int dmanr)
dmanr135include/asm-i386/dma.hif (dmanr<=3)
dmanr136include/asm-i386/dma.hdma_outb(dmanr,  DMA1_MASK_REG);
dmanr138include/asm-i386/dma.hdma_outb(dmanr & 3,  DMA2_MASK_REG);
dmanr141include/asm-i386/dma.hstatic __inline__ void disable_dma(unsigned int dmanr)
dmanr143include/asm-i386/dma.hif (dmanr<=3)
dmanr144include/asm-i386/dma.hdma_outb(dmanr | 4,  DMA1_MASK_REG);
dmanr146include/asm-i386/dma.hdma_outb((dmanr & 3) | 4,  DMA2_MASK_REG);
dmanr156include/asm-i386/dma.hstatic __inline__ void clear_dma_ff(unsigned int dmanr)
dmanr158include/asm-i386/dma.hif (dmanr<=3)
dmanr165include/asm-i386/dma.hstatic __inline__ void set_dma_mode(unsigned int dmanr, char mode)
dmanr167include/asm-i386/dma.hif (dmanr<=3)
dmanr168include/asm-i386/dma.hdma_outb(mode | dmanr,  DMA1_MODE_REG);
dmanr170include/asm-i386/dma.hdma_outb(mode | (dmanr&3),  DMA2_MODE_REG);
dmanr178include/asm-i386/dma.hstatic __inline__ void set_dma_page(unsigned int dmanr, char pagenr)
dmanr180include/asm-i386/dma.hswitch(dmanr) {
dmanr209include/asm-i386/dma.hstatic __inline__ void set_dma_addr(unsigned int dmanr, unsigned int a)
dmanr211include/asm-i386/dma.hset_dma_page(dmanr, a>>16);
dmanr212include/asm-i386/dma.hif (dmanr <= 3)  {
dmanr213include/asm-i386/dma.hdma_outb( a & 0xff, ((dmanr&3)<<1) + IO_DMA1_BASE );
dmanr214include/asm-i386/dma.hdma_outb( (a>>8) & 0xff, ((dmanr&3)<<1) + IO_DMA1_BASE );
dmanr216include/asm-i386/dma.hdma_outb( (a>>1) & 0xff, ((dmanr&3)<<2) + IO_DMA2_BASE );
dmanr217include/asm-i386/dma.hdma_outb( (a>>9) & 0xff, ((dmanr&3)<<2) + IO_DMA2_BASE );
dmanr230include/asm-i386/dma.hstatic __inline__ void set_dma_count(unsigned int dmanr, unsigned int count)
dmanr233include/asm-i386/dma.hif (dmanr <= 3)  {
dmanr234include/asm-i386/dma.hdma_outb( count & 0xff, ((dmanr&3)<<1) + 1 + IO_DMA1_BASE );
dmanr235include/asm-i386/dma.hdma_outb( (count>>8) & 0xff, ((dmanr&3)<<1) + 1 + IO_DMA1_BASE );
dmanr237include/asm-i386/dma.hdma_outb( (count>>1) & 0xff, ((dmanr&3)<<2) + 2 + IO_DMA2_BASE );
dmanr238include/asm-i386/dma.hdma_outb( (count>>9) & 0xff, ((dmanr&3)<<2) + 2 + IO_DMA2_BASE );
dmanr251include/asm-i386/dma.hstatic __inline__ int get_dma_residue(unsigned int dmanr)
dmanr253include/asm-i386/dma.hunsigned int io_port = (dmanr<=3)? ((dmanr&3)<<1) + 1 + IO_DMA1_BASE
dmanr254include/asm-i386/dma.h: ((dmanr&3)<<2) + 2 + IO_DMA2_BASE;
dmanr262include/asm-i386/dma.hreturn (dmanr<=3)? count : (count<<1);
dmanr267include/asm-i386/dma.hextern int request_dma(unsigned int dmanr, const char * device_id);  /* reserve a DMA channel */
dmanr268include/asm-i386/dma.hextern void free_dma(unsigned int dmanr);  /* release it again */
dmanr142include/asm-mips/dma.hstatic __inline__ void enable_dma(unsigned int dmanr)
dmanr144include/asm-mips/dma.hif (dmanr<=3)
dmanr145include/asm-mips/dma.hdma_outb(dmanr,  DMA1_MASK_REG);
dmanr147include/asm-mips/dma.hdma_outb(dmanr & 3,  DMA2_MASK_REG);
dmanr150include/asm-mips/dma.hstatic __inline__ void disable_dma(unsigned int dmanr)
dmanr152include/asm-mips/dma.hif (dmanr<=3)
dmanr153include/asm-mips/dma.hdma_outb(dmanr | 4,  DMA1_MASK_REG);
dmanr155include/asm-mips/dma.hdma_outb((dmanr & 3) | 4,  DMA2_MASK_REG);
dmanr165include/asm-mips/dma.hstatic __inline__ void clear_dma_ff(unsigned int dmanr)
dmanr167include/asm-mips/dma.hif (dmanr<=3)
dmanr174include/asm-mips/dma.hstatic __inline__ void set_dma_mode(unsigned int dmanr, char mode)
dmanr176include/asm-mips/dma.hif (dmanr<=3)
dmanr177include/asm-mips/dma.hdma_outb(mode | dmanr,  DMA1_MODE_REG);
dmanr179include/asm-mips/dma.hdma_outb(mode | (dmanr&3),  DMA2_MODE_REG);
dmanr187include/asm-mips/dma.hstatic __inline__ void set_dma_page(unsigned int dmanr, char pagenr)
dmanr189include/asm-mips/dma.hswitch(dmanr) {
dmanr218include/asm-mips/dma.hstatic __inline__ void set_dma_addr(unsigned int dmanr, unsigned int a)
dmanr220include/asm-mips/dma.hset_dma_page(dmanr, a>>16);
dmanr221include/asm-mips/dma.hif (dmanr <= 3)  {
dmanr222include/asm-mips/dma.hdma_outb( a & 0xff, ((dmanr&3)<<1) + IO_DMA1_BASE );
dmanr223include/asm-mips/dma.hdma_outb( (a>>8) & 0xff, ((dmanr&3)<<1) + IO_DMA1_BASE );
dmanr225include/asm-mips/dma.hdma_outb( (a>>1) & 0xff, ((dmanr&3)<<2) + IO_DMA2_BASE );
dmanr226include/asm-mips/dma.hdma_outb( (a>>9) & 0xff, ((dmanr&3)<<2) + IO_DMA2_BASE );
dmanr239include/asm-mips/dma.hstatic __inline__ void set_dma_count(unsigned int dmanr, unsigned int count)
dmanr242include/asm-mips/dma.hif (dmanr <= 3)  {
dmanr243include/asm-mips/dma.hdma_outb( count & 0xff, ((dmanr&3)<<1) + 1 + IO_DMA1_BASE );
dmanr244include/asm-mips/dma.hdma_outb( (count>>8) & 0xff, ((dmanr&3)<<1) + 1 + IO_DMA1_BASE );
dmanr246include/asm-mips/dma.hdma_outb( (count>>1) & 0xff, ((dmanr&3)<<2) + 2 + IO_DMA2_BASE );
dmanr247include/asm-mips/dma.hdma_outb( (count>>9) & 0xff, ((dmanr&3)<<2) + 2 + IO_DMA2_BASE );
dmanr260include/asm-mips/dma.hstatic __inline__ int get_dma_residue(unsigned int dmanr)
dmanr262include/asm-mips/dma.hunsigned int io_port = (dmanr<=3)? ((dmanr&3)<<1) + 1 + IO_DMA1_BASE
dmanr263include/asm-mips/dma.h: ((dmanr&3)<<2) + 2 + IO_DMA2_BASE;
dmanr271include/asm-mips/dma.hreturn (dmanr<=3)? count : (count<<1);
dmanr276include/asm-mips/dma.hextern int request_dma(unsigned int dmanr, const char * device_id);  /* reserve a DMA channel */
dmanr277include/asm-mips/dma.hextern void free_dma(unsigned int dmanr);  /* release it again */
dmanr133include/asm-ppc/dma.hstatic __inline__ void enable_dma(unsigned int dmanr)
dmanr135include/asm-ppc/dma.hif (dmanr<=3)
dmanr136include/asm-ppc/dma.hdma_outb(dmanr,  DMA1_MASK_REG);
dmanr138include/asm-ppc/dma.hdma_outb(dmanr & 3,  DMA2_MASK_REG);
dmanr141include/asm-ppc/dma.hstatic __inline__ void disable_dma(unsigned int dmanr)
dmanr143include/asm-ppc/dma.hif (dmanr<=3)
dmanr144include/asm-ppc/dma.hdma_outb(dmanr | 4,  DMA1_MASK_REG);
dmanr146include/asm-ppc/dma.hdma_outb((dmanr & 3) | 4,  DMA2_MASK_REG);
dmanr156include/asm-ppc/dma.hstatic __inline__ void clear_dma_ff(unsigned int dmanr)
dmanr158include/asm-ppc/dma.hif (dmanr<=3)
dmanr165include/asm-ppc/dma.hstatic __inline__ void set_dma_mode(unsigned int dmanr, char mode)
dmanr167include/asm-ppc/dma.hif (dmanr<=3)
dmanr168include/asm-ppc/dma.hdma_outb(mode | dmanr,  DMA1_MODE_REG);
dmanr170include/asm-ppc/dma.hdma_outb(mode | (dmanr&3),  DMA2_MODE_REG);
dmanr178include/asm-ppc/dma.hstatic __inline__ void set_dma_page(unsigned int dmanr, char pagenr)
dmanr180include/asm-ppc/dma.hswitch(dmanr) {
dmanr209include/asm-ppc/dma.hstatic __inline__ void set_dma_addr(unsigned int dmanr, unsigned int a)
dmanr211include/asm-ppc/dma.hset_dma_page(dmanr, a>>16);
dmanr212include/asm-ppc/dma.hif (dmanr <= 3)  {
dmanr213include/asm-ppc/dma.hdma_outb( a & 0xff, ((dmanr&3)<<1) + IO_DMA1_BASE );
dmanr214include/asm-ppc/dma.hdma_outb( (a>>8) & 0xff, ((dmanr&3)<<1) + IO_DMA1_BASE );
dmanr216include/asm-ppc/dma.hdma_outb( (a>>1) & 0xff, ((dmanr&3)<<2) + IO_DMA2_BASE );
dmanr217include/asm-ppc/dma.hdma_outb( (a>>9) & 0xff, ((dmanr&3)<<2) + IO_DMA2_BASE );
dmanr230include/asm-ppc/dma.hstatic __inline__ void set_dma_count(unsigned int dmanr, unsigned int count)
dmanr233include/asm-ppc/dma.hif (dmanr <= 3)  {
dmanr234include/asm-ppc/dma.hdma_outb( count & 0xff, ((dmanr&3)<<1) + 1 + IO_DMA1_BASE );
dmanr235include/asm-ppc/dma.hdma_outb( (count>>8) & 0xff, ((dmanr&3)<<1) + 1 + IO_DMA1_BASE );
dmanr237include/asm-ppc/dma.hdma_outb( (count>>1) & 0xff, ((dmanr&3)<<2) + 2 + IO_DMA2_BASE );
dmanr238include/asm-ppc/dma.hdma_outb( (count>>9) & 0xff, ((dmanr&3)<<2) + 2 + IO_DMA2_BASE );
dmanr251include/asm-ppc/dma.hstatic __inline__ int get_dma_residue(unsigned int dmanr)
dmanr253include/asm-ppc/dma.hunsigned int io_port = (dmanr<=3)? ((dmanr&3)<<1) + 1 + IO_DMA1_BASE
dmanr254include/asm-ppc/dma.h: ((dmanr&3)<<2) + 2 + IO_DMA2_BASE;
dmanr262include/asm-ppc/dma.hreturn (dmanr<=3)? count : (count<<1);
dmanr268include/asm-ppc/dma.hextern void free_dma(unsigned int dmanr);  /* release it again */
dmanr150include/linux/mtio.hunsigned short  dmanr;  /* DMA channel to use */
dmanr386include/linux/tpqic02.h# define QIC02_TAPE_DMA    (qic02_tape_dynconf.dmanr)
dmanr72kernel/dma.cint request_dma(unsigned int dmanr, const char * device_id)
dmanr74kernel/dma.cif (dmanr >= MAX_DMA_CHANNELS)
dmanr77kernel/dma.cif (xchg(&dma_chan_busy[dmanr].lock, 1) != 0)
dmanr80kernel/dma.cdma_chan_busy[dmanr].device_id = device_id;
dmanr87kernel/dma.cvoid free_dma(unsigned int dmanr)
dmanr89kernel/dma.cif (dmanr >= MAX_DMA_CHANNELS) {
dmanr90kernel/dma.cprintk("Trying to free DMA%d\n", dmanr);
dmanr94kernel/dma.cif (xchg(&dma_chan_busy[dmanr].lock, 0) == 0) {
dmanr95kernel/dma.cprintk("Trying to free free DMA%d\n", dmanr);
dmanr74kernel/ksyms.cextern int request_dma(unsigned int dmanr, char * deviceID);
dmanr75kernel/ksyms.cextern void free_dma(unsigned int dmanr);