This source file includes following definitions.
- hyper_flush_i_page
- hyper_flush_i_seg
- hyper_flush_i_region
- hyper_flush_i_ctx
- hyper_flush_i_user
- hyper_flush_whole_icache
- get_ross_icr
- put_ross_icr
- hyper_flush_all_combined
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7 #ifndef _SPARC_ROSS_H
8 #define _SPARC_ROSS_H
9
10 #include <asm/asi.h>
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42 #define HYPERSPARC_CWENABLE 0x00200000
43 #define HYPERSPARC_SBENABLE 0x00100000
44 #define HYPERSPARC_WBENABLE 0x00080000
45 #define HYPERSPARC_MIDMASK 0x00078000
46 #define HYPERSPARC_BMODE 0x00004000
47 #define HYPERSPARC_ACENABLE 0x00002000
48 #define HYPERSPARC_CSIZE 0x00001000
49 #define HYPERSPARC_MRFLCT 0x00000800
50 #define HYPERSPARC_CMODE 0x00000400
51 #define HYPERSPARC_CENABLE 0x00000100
52 #define HYPERSPARC_NFAULT 0x00000002
53 #define HYPERSPARC_MENABLE 0x00000001
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55
56 extern inline void hyper_flush_i_page(unsigned int addr)
57 {
58 __asm__ __volatile__("sta %%g0, [%0] %1\n\t" : :
59 "r" (addr), "i" (ASI_M_IFLUSH_PAGE) :
60 "memory");
61 return;
62 }
63
64 extern inline void hyper_flush_i_seg(unsigned int addr)
65 {
66 __asm__ __volatile__("sta %%g0, [%0] %1\n\t" : :
67 "r" (addr), "i" (ASI_M_IFLUSH_SEG) :
68 "memory");
69 return;
70 }
71
72 extern inline void hyper_flush_i_region(unsigned int addr)
73 {
74 __asm__ __volatile__("sta %%g0, [%0] %1\n\t" : :
75 "r" (addr), "i" (ASI_M_IFLUSH_REGION) :
76 "memory");
77 return;
78 }
79
80 extern inline void hyper_flush_i_ctx(unsigned int addr)
81 {
82 __asm__ __volatile__("sta %%g0, [%0] %1\n\t" : :
83 "r" (addr), "i" (ASI_M_IFLUSH_CTX) :
84 "memory");
85 return;
86 }
87
88 extern inline void hyper_flush_i_user(unsigned int addr)
89 {
90 __asm__ __volatile__("sta %%g0, [%0] %1\n\t" : :
91 "r" (addr), "i" (ASI_M_IFLUSH_USER) :
92 "memory");
93 return;
94 }
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97 extern inline void hyper_flush_whole_icache(void)
98 {
99 __asm__ __volatile__("sta %%g0, [%%g0] %0\n\t" : :
100 "i" (ASI_M_FLUSH_IWHOLE));
101 return;
102 }
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130 extern inline unsigned int get_ross_icr(void)
131 {
132 unsigned int icreg;
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134 __asm__ __volatile__(".word 0xbf402000\n\t" :
135 "=r" (icreg) : :
136 "g1", "memory");
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138 return icreg;
139 }
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141 extern inline void put_ross_icr(unsigned int icreg)
142 {
143 __asm__ __volatile__("or %%g0, %0, %%g1\n\t"
144 ".word 0xbf802000\n\t"
145 "nop\n\t"
146 "nop\n\t"
147 "nop\n\t" : :
148 "r" (icreg) :
149 "g1", "memory");
150
151 return;
152 }
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156 extern int hyper_cache_size;
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158 extern inline void hyper_flush_all_combined(void)
159 {
160 unsigned long addr;
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162 for(addr = 0; addr < hyper_cache_size; addr += 32)
163 __asm__ __volatile__("sta %%g0, [%0] 0xe\n\t" : :
164 "r" (addr));
165 }
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169 #endif