tag	line	file	source code
lval	3513	drivers/net/de4x5.c	u32 lval[(HASH_TABLE_LEN * ETH_ALEN) >> 2];
lval	3663	drivers/net/de4x5.c	tmp.lval[0] = inl(DE4X5_STS); j+=4;
lval	3664	drivers/net/de4x5.c	tmp.lval[1] = inl(DE4X5_BMR); j+=4;
lval	3665	drivers/net/de4x5.c	tmp.lval[2] = inl(DE4X5_IMR); j+=4;
lval	3666	drivers/net/de4x5.c	tmp.lval[3] = inl(DE4X5_OMR); j+=4;
lval	3667	drivers/net/de4x5.c	tmp.lval[4] = inl(DE4X5_SISR); j+=4;
lval	3668	drivers/net/de4x5.c	tmp.lval[5] = inl(DE4X5_SICR); j+=4;
lval	3669	drivers/net/de4x5.c	tmp.lval[6] = inl(DE4X5_STRR); j+=4;
lval	3670	drivers/net/de4x5.c	tmp.lval[7] = inl(DE4X5_SIGR); j+=4;
lval	3686	drivers/net/de4x5.c	tmp.lval[j>>2] = (long)lp->rx_ring; j+=4;
lval	3687	drivers/net/de4x5.c	tmp.lval[j>>2] = (long)lp->tx_ring; j+=4;
lval	3691	drivers/net/de4x5.c	tmp.lval[j>>2] = (long)&lp->rx_ring[i].status; j+=4;
lval	3694	drivers/net/de4x5.c	tmp.lval[j>>2] = (long)&lp->rx_ring[i].status; j+=4;
lval	3697	drivers/net/de4x5.c	tmp.lval[j>>2] = (long)&lp->tx_ring[i].status; j+=4;
lval	3700	drivers/net/de4x5.c	tmp.lval[j>>2] = (long)&lp->tx_ring[i].status; j+=4;
lval	3704	drivers/net/de4x5.c	tmp.lval[j>>2] = (s32)lp->rx_ring[i].buf; j+=4;
lval	3707	drivers/net/de4x5.c	tmp.lval[j>>2] = (s32)lp->rx_ring[i].buf; j+=4;
lval	3710	drivers/net/de4x5.c	tmp.lval[j>>2] = (s32)lp->tx_ring[i].buf; j+=4;
lval	3713	drivers/net/de4x5.c	tmp.lval[j>>2] = (s32)lp->tx_ring[i].buf; j+=4;
lval	3716	drivers/net/de4x5.c	tmp.lval[j>>2] = lp->rx_ring[i].status; j+=4;
lval	3719	drivers/net/de4x5.c	tmp.lval[j>>2] = lp->tx_ring[i].status; j+=4;
lval	3722	drivers/net/de4x5.c	tmp.lval[j>>2] = inl(DE4X5_BMR);  j+=4;
lval	3723	drivers/net/de4x5.c	tmp.lval[j>>2] = inl(DE4X5_TPD);  j+=4;
lval	3724	drivers/net/de4x5.c	tmp.lval[j>>2] = inl(DE4X5_RPD);  j+=4;
lval	3725	drivers/net/de4x5.c	tmp.lval[j>>2] = inl(DE4X5_RRBA); j+=4;
lval	3726	drivers/net/de4x5.c	tmp.lval[j>>2] = inl(DE4X5_TRBA); j+=4;
lval	3727	drivers/net/de4x5.c	tmp.lval[j>>2] = inl(DE4X5_STS);  j+=4;
lval	3728	drivers/net/de4x5.c	tmp.lval[j>>2] = inl(DE4X5_OMR);  j+=4;
lval	3729	drivers/net/de4x5.c	tmp.lval[j>>2] = inl(DE4X5_IMR);  j+=4;
lval	3730	drivers/net/de4x5.c	tmp.lval[j>>2] = lp->chipset; j+=4;
lval	3732	drivers/net/de4x5.c	tmp.lval[j>>2] = inl(DE4X5_GEP);  j+=4;
lval	3734	drivers/net/de4x5.c	tmp.lval[j>>2] = inl(DE4X5_SISR); j+=4;
lval	3735	drivers/net/de4x5.c	tmp.lval[j>>2] = inl(DE4X5_SICR); j+=4;
lval	3736	drivers/net/de4x5.c	tmp.lval[j>>2] = inl(DE4X5_STRR); j+=4;
lval	3737	drivers/net/de4x5.c	tmp.lval[j>>2] = inl(DE4X5_SIGR); j+=4;
lval	3739	drivers/net/de4x5.c	tmp.lval[j>>2] = lp->phy[lp->active].id; j+=4;
lval	3741	drivers/net/de4x5.c	tmp.lval[j>>2] = lp->active; j+=4;
lval	3742	drivers/net/de4x5.c	tmp.lval[j>>2]=mii_rd(MII_CR,lp->phy[lp->active].addr,DE4X5_MII); j+=4;
lval	3743	drivers/net/de4x5.c	tmp.lval[j>>2]=mii_rd(MII_SR,lp->phy[lp->active].addr,DE4X5_MII); j+=4;
lval	3744	drivers/net/de4x5.c	tmp.lval[j>>2]=mii_rd(MII_ID0,lp->phy[lp->active].addr,DE4X5_MII); j+=4;
lval	3745	drivers/net/de4x5.c	tmp.lval[j>>2]=mii_rd(MII_ID1,lp->phy[lp->active].addr,DE4X5_MII); j+=4;
lval	3747	drivers/net/de4x5.c	tmp.lval[j>>2]=mii_rd(MII_ANA,lp->phy[lp->active].addr,DE4X5_MII); j+=4;
lval	3748	drivers/net/de4x5.c	tmp.lval[j>>2]=mii_rd(MII_ANLPA,lp->phy[lp->active].addr,DE4X5_MII); j+=4;
lval	3750	drivers/net/de4x5.c	tmp.lval[j>>2]=mii_rd(0x10,lp->phy[lp->active].addr,DE4X5_MII); j+=4;
lval	3752	drivers/net/de4x5.c	tmp.lval[j>>2]=mii_rd(0x11,lp->phy[lp->active].addr,DE4X5_MII); j+=4;
lval	3753	drivers/net/de4x5.c	tmp.lval[j>>2]=mii_rd(0x12,lp->phy[lp->active].addr,DE4X5_MII); j+=4;
lval	3755	drivers/net/de4x5.c	tmp.lval[j>>2]=mii_rd(0x14,lp->phy[lp->active].addr,DE4X5_MII); j+=4;
lval	1708	drivers/net/depca.c	u32 lval[(HASH_TABLE_LEN * ETH_ALEN) >> 2];