root/drivers/net/wavelan.h

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INCLUDED FROM


   1 #define WAVELAN_ADDR_SIZE       6       /* Size of a MAC address */
   2 #define SA_ADDR0                0x08    /* First octet of WaveLAN MAC addresses */
   3 #define SA_ADDR1                0x00    /* Second octet of WaveLAN MAC addresses */
   4 #define SA_ADDR2                0x0E    /* Third octet of WaveLAN MAC addresses */
   5 #define WAVELAN_MTU             1500    /* Maximum size of WaveLAN packet */
   6 
   7 /*
   8  * Parameter Storage Area (PSA).
   9  */
  10 typedef struct psa_t    psa_t;
  11 struct psa_t
  12 {
  13         unsigned char   psa_io_base_addr_1;     /* Base address 1 ??? */
  14         unsigned char   psa_io_base_addr_2;     /* Base address 2 */
  15         unsigned char   psa_io_base_addr_3;     /* Base address 3 */
  16         unsigned char   psa_io_base_addr_4;     /* Base address 4 */
  17         unsigned char   psa_rem_boot_addr_1;    /* Remote Boot Address 1 */
  18         unsigned char   psa_rem_boot_addr_2;    /* Remote Boot Address 2 */
  19         unsigned char   psa_rem_boot_addr_3;    /* Remote Boot Address 3 */
  20         unsigned char   psa_holi_params;        /* HOst Lan Interface (HOLI) Parameters */
  21         unsigned char   psa_int_req_no;         /* Interrupt Request Line */
  22         unsigned char   psa_unused0[7];         /* unused */
  23         unsigned char   psa_univ_mac_addr[WAVELAN_ADDR_SIZE];   /* Universal (factory) MAC Address */
  24         unsigned char   psa_local_mac_addr[WAVELAN_ADDR_SIZE];  /* Local MAC Address */
  25         unsigned char   psa_univ_local_sel;     /* Universal Local Selection */
  26 #define         PSA_UNIVERSAL   0               /* Universal (factory) */
  27 #define         PSA_LOCAL       1               /* Local */
  28         unsigned char   psa_comp_number;        /* Compatibility Number: */
  29 #define         PSA_COMP_PC_AT_915      0       /* PC-AT 915 MHz        */
  30 #define         PSA_COMP_PC_MC_915      1       /* PC-MC 915 MHz        */
  31 #define         PSA_COMP_PC_AT_2400     2       /* PC-AT 2.4 GHz        */
  32 #define         PSA_COMP_PC_MC_2400     3       /* PC-MC 2.4 GHz        */
  33 #define         PSA_COMP_PCMCIA_915     4       /* PCMCIA 915 MHz       */
  34         unsigned char   psa_thr_pre_set;        /* Modem Threshold Preset */
  35         unsigned char   psa_feature_select;     /* ??? */
  36 #if     0
  37         <alias for above>
  38         unsigned char   psa_decay_prm;          /* Modem Decay */
  39 #endif  /* 0 */
  40         unsigned char   psa_subband;            /* Subband      */
  41 #define         PSA_SUBBAND_915         0       /* 915 MHz      */
  42 #define         PSA_SUBBAND_2425        1       /* 2425 MHz     */
  43 #define         PSA_SUBBAND_2460        2       /* 2460 MHz     */
  44 #define         PSA_SUBBAND_2484        3       /* 2484 MHz     */
  45 #define         PSA_SUBBAND_2430_5      4       /* 2430.5 MHz   */
  46 #if     0
  47         <alias for above>
  48         unsigned char   psa_decay_updat_prm;    /* Modem Decay Update ??? */
  49 #endif  /* 0 */
  50         unsigned char   psa_quality_thr;        /* Modem Quality Threshold */
  51         unsigned char   psa_mod_delay;          /* Modem Delay ??? */
  52         unsigned char   psa_nwid[2];            /* Network ID */
  53         unsigned char   psa_undefined;          /* undefined */
  54         unsigned char   psa_encryption_select;  /* Encryption On Off */
  55         unsigned char   psa_encryption_key[8];  /* Encryption Key */
  56         unsigned char   psa_databus_width;      /* 8/16 bit bus width */
  57         unsigned char   psa_call_code;          /* ??? */
  58 #if     0
  59         <alias for above>
  60         unsigned char   psa_auto_squelch;       /* Automatic Squelch level On off ??? */
  61 #endif  /* 0 */
  62         unsigned char   psa_no_of_retries;      /* LAN Cont. No of retries */
  63         unsigned char   psa_acr;                /* LAN Cont. ACR */
  64         unsigned char   psa_dump_count;         /* number of Dump Commands in TFB */
  65         unsigned char   psa_unused1[4];         /* unused */
  66         unsigned char   psa_nwid_prefix;        /* ??? */
  67         unsigned char   psa_unused2[3];         /* unused */
  68         unsigned char   psa_conf_status;        /* Card Configuration Status */
  69         unsigned char   psa_crc[2];             /* CRC over PSA */
  70         unsigned char   psa_crc_status;         /* CRC Valid Flag */
  71 };
  72 #if     STRUCT_CHECK == 1
  73 #define PSA_SIZE        64
  74 #endif  /* STRUCT_CHECK == 1 */
  75 
  76 /*
  77  * Modem Management Controller (MMC) write structure.
  78  */
  79 typedef struct mmw_t    mmw_t;
  80 struct mmw_t
  81 {
  82         unsigned char   mmw_encr_key[8];        /* encryption key */
  83         unsigned char   mmw_encr_enable;        /* enable/disable encryption */
  84         unsigned char   mmw_unused0[1];         /* unused */
  85         unsigned char   mmw_des_io_invert;      /* ??? */
  86         unsigned char   mmw_unused1[5];         /* unused */
  87         unsigned char   mmw_loopt_sel;          /* looptest selection */
  88 #define         MMW_LOOPT_SEL_UNDEFINED 0x40    /* undefined */
  89 #define         MMW_LOOPT_SEL_INT       0x20    /* activate Attention Request */
  90 #define         MMW_LOOPT_SEL_LS        0x10    /* looptest without collision avoidance */
  91 #define         MMW_LOOPT_SEL_LT3A      0x08    /* looptest 3a */
  92 #define         MMW_LOOPT_SEL_LT3B      0x04    /* looptest 3b */
  93 #define         MMW_LOOPT_SEL_LT3C      0x02    /* looptest 3c */
  94 #define         MMW_LOOPT_SEL_LT3D      0x01    /* looptest 3d */
  95         unsigned char   mmw_jabber_enable;      /* jabber timer enable */
  96         unsigned char   mmw_freeze;             /* freeze / unfreeze signal level */
  97         unsigned char   mmw_anten_sel;          /* antenna selection */
  98 #define         MMW_ANTEN_SEL_SEL       0x01    /* direct antenna selection */
  99 #define         MMW_ANTEN_SEL_ALG_EN    0x02    /* antenna selection algorithm enable */
 100         unsigned char   mmw_ifs;                /* inter frame spacing */
 101         unsigned char   mmw_mod_delay;          /* modem delay */
 102         unsigned char   mmw_jam_time;           /* jamming time */
 103         unsigned char   mmw_unused2[1];         /* unused */
 104         unsigned char   mmw_thr_pre_set;        /* level threshold preset */
 105         unsigned char   mmw_decay_prm;          /* decay parameters */
 106         unsigned char   mmw_decay_updat_prm;    /* decay update parameters */
 107         unsigned char   mmw_quality_thr;        /* quality (z-quotient) threshold */
 108         unsigned char   mmw_netw_id_l;          /* NWID low order byte */
 109         unsigned char   mmw_netw_id_h;          /* NWID high order byte */
 110 };
 111 #if     STRUCT_CHECK == 1
 112 #define MMW_SIZE        30
 113 #endif  /* STRUCT_CHECK == 1 */
 114 
 115 #define mmwoff(p,f)     (unsigned short)((void *)(&((mmw_t *)((void *)0 + (p)))->f) - (void *)0)
 116 
 117 /*
 118  * Modem Management Controller (MMC) read structure.
 119  */
 120 typedef struct mmr_t    mmr_t;
 121 struct mmr_t
 122 {
 123         unsigned char   mmr_unused0[8];         /* unused */
 124         unsigned char   mmr_des_status;         /* encryption status */
 125         unsigned char   mmr_des_avail;          /* encryption available (0x55 read) */
 126         unsigned char   mmr_des_io_invert;      /* des I/O invert register */
 127         unsigned char   mmr_unused1[5];         /* unused */
 128         unsigned char   mmr_dce_status;         /* DCE status */
 129 #define         MMR_DCE_STATUS_ENERG_DET        0x01    /* energy detected */
 130 #define         MMR_DCE_STATUS_LOOPT_IND        0x02    /* loop test indicated */
 131 #define         MMR_DCE_STATUS_XMTITR_IND       0x04    /* transmitter on */
 132 #define         MMR_DCE_STATUS_JBR_EXPIRED      0x08    /* jabber timer expired */
 133         unsigned char   mmr_unused2[3];         /* unused */
 134         unsigned char   mmr_correct_nwid_l;     /* no. of correct NWID's rxd (low) */
 135         unsigned char   mmr_correct_nwid_h;     /* no. of correct NWID's rxd (high) */
 136         unsigned char   mmr_wrong_nwid_l;       /* count of wrong NWID's received (low) */
 137         unsigned char   mmr_wrong_nwid_h;       /* count of wrong NWID's received (high) */
 138         unsigned char   mmr_thr_pre_set;        /* level threshold preset */
 139         unsigned char   mmr_signal_lvl;         /* signal level */
 140         unsigned char   mmr_silence_lvl;        /* silence level */
 141         unsigned char   mmr_sgnl_qual;          /* signal quality */
 142 #define         MMR_SGNL_QUAL_0         0x01    /* signal quality 0 */
 143 #define         MMR_SGNL_QUAL_1         0x02    /* signal quality 1 */
 144 #define         MMR_SGNL_QUAL_2         0x04    /* signal quality 2 */
 145 #define         MMR_SGNL_QUAL_3         0x08    /* signal quality 3 */
 146 #define         MMR_SGNL_QUAL_S_A       0x80    /* currently selected antenna */
 147         unsigned char   mmr_netw_id_l;          /* NWID low order byte ??? */
 148         unsigned char   mmr_unused3[1];         /* unused */
 149 };
 150 #if     STRUCT_CHECK == 1
 151 #define MMR_SIZE        30
 152 #endif  /* STRUCT_CHECK == 1 */
 153 
 154 #define MMR_LEVEL_MASK  0x3F
 155 
 156 #define mmroff(p,f)     (unsigned short)((void *)(&((mmr_t *)((void *)0 + (p)))->f) - (void *)0)
 157 
 158 /*
 159  * Host Adaptor structure.
 160  * (base is board port address).
 161  */
 162 typedef union hacs_u    hacs_u;
 163 union hacs_u
 164 {
 165         unsigned short  hu_command;             /* Command register */
 166 #define         HACR_RESET              0x0001  /* Reset board */
 167 #define         HACR_CA                 0x0002  /* Set Channel Attention for 82586 */
 168 #define         HACR_16BITS             0x0004  /* 16 bits operation (0 => 8bits) */
 169 #define         HACR_OUT0               0x0008  /* General purpose output pin 0 */
 170                                                 /* not used - must be 1 */
 171 #define         HACR_OUT1               0x0010  /* General purpose output pin 1 */
 172                                                 /* not used - must be 1 */
 173 #define         HACR_82586_INT_ENABLE   0x0020  /* Enable 82586 interrupts */
 174 #define         HACR_MMC_INT_ENABLE     0x0040  /* Enable MMC interrupts */
 175 #define         HACR_INTR_CLR_ENABLE    0x0080  /* Enable interrupt status read/clear */
 176         unsigned short  hu_status;              /* Status Register */
 177 #define         HASR_82586_INTR         0x0001  /* Interrupt request from 82586 */
 178 #define         HASR_MMC_INTR           0x0002  /* Interrupt request from MMC */
 179 #define         HASR_MMC_BUSY           0x0004  /* MMC busy indication */
 180 #define         HASR_PSA_BUSY           0x0008  /* LAN parameter storage area busy */
 181 };
 182 
 183 typedef struct ha_t     ha_t;
 184 struct ha_t
 185 {
 186         hacs_u          ha_cs;          /* Command and status registers */
 187 #define                 ha_command      ha_cs.hu_command
 188 #define                 ha_status       ha_cs.hu_status
 189         unsigned short  ha_mmcr;        /* Modem Management Ctrl Register */
 190         unsigned short  ha_pior0;       /* Program I/O Address Register Port 0 */
 191         unsigned short  ha_piop0;       /* Program I/O Port 0 */
 192         unsigned short  ha_pior1;       /* Program I/O Address Register Port 1 */
 193         unsigned short  ha_piop1;       /* Program I/O Port 1 */
 194         unsigned short  ha_pior2;       /* Program I/O Address Register Port 2 */
 195         unsigned short  ha_piop2;       /* Program I/O Port 2 */
 196 };
 197 #if     STRUCT_CHECK == 1
 198 #define HA_SIZE         16
 199 #endif  /* STRUCT_CHECK == 1 */
 200 
 201 #define hoff(p,f)       (unsigned short)((void *)(&((ha_t *)((void *)0 + (p)))->f) - (void *)0)
 202 #define HACR(p)         hoff(p, ha_command)
 203 #define HASR(p)         hoff(p, ha_status)
 204 #define MMCR(p)         hoff(p, ha_mmcr)
 205 #define PIOR0(p)        hoff(p, ha_pior0)
 206 #define PIOP0(p)        hoff(p, ha_piop0)
 207 #define PIOR1(p)        hoff(p, ha_pior1)
 208 #define PIOP1(p)        hoff(p, ha_piop1)
 209 #define PIOR2(p)        hoff(p, ha_pior2)
 210 #define PIOP2(p)        hoff(p, ha_piop2)
 211 
 212 /*
 213  * Program I/O Mode Register values.
 214  */
 215 #define STATIC_PIO              0       /* Mode 1: static mode */
 216                                         /* RAM access ??? */
 217 #define AUTOINCR_PIO            1       /* Mode 2: auto increment mode */
 218                                         /* RAM access ??? */
 219 #define AUTODECR_PIO            2       /* Mode 3: auto decrement mode */
 220                                         /* RAM access ??? */
 221 #define PARAM_ACCESS_PIO        3       /* Mode 4: LAN parameter access mode */
 222                                         /* Parameter access. */
 223 #define PIO_MASK                3       /* register mask */
 224 #define PIOM(cmd,piono)         ((u_short)cmd << 10 << (piono * 2))
 225 
 226 #define HACR_DEFAULT            (HACR_OUT0 | HACR_OUT1 | HACR_16BITS | PIOM(STATIC_PIO, 0) | PIOM(AUTOINCR_PIO, 1) | PIOM(PARAM_ACCESS_PIO, 2))
 227 #define HACR_INTRON             (HACR_82586_INT_ENABLE | HACR_MMC_INT_ENABLE | HACR_INTR_CLR_ENABLE)
 228 
 229 #define MAXDATAZ                (WAVELAN_ADDR_SIZE + WAVELAN_ADDR_SIZE + 2 + WAVELAN_MTU)
 230 
 231 /*
 232  * Onboard 64k RAM layout.
 233  * (Offsets from 0x0000.)
 234  */
 235 #define OFFSET_RU               0x0000
 236 #define OFFSET_CU               0x8000
 237 #define OFFSET_SCB              (OFFSET_ISCP - sizeof(scb_t))
 238 #define OFFSET_ISCP             (OFFSET_SCP - sizeof(iscp_t))
 239 #define OFFSET_SCP              I82586_SCP_ADDR
 240 
 241 #define RXBLOCKZ                (sizeof(fd_t) + sizeof(rbd_t) + MAXDATAZ)
 242 #define TXBLOCKZ                (sizeof(ac_tx_t) + sizeof(ac_nop_t) + sizeof(tbd_t) + MAXDATAZ)
 243 
 244 #define NRXBLOCKS               ((OFFSET_CU - OFFSET_RU) / RXBLOCKZ)
 245 #define NTXBLOCKS               ((OFFSET_SCB - OFFSET_CU) / TXBLOCKZ)
 246 
 247 /*
 248  * This software may only be used and distributed
 249  * according to the terms of the GNU Public License.
 250  *
 251  * For more details, see wavelan.c.
 252  */

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