This source file includes following definitions.
- AllocMem
- CloseLibrary
- Disable
- Enable
- FreeMem
- OpenLibrary
- SuperState
- CacheClearU
- CacheControl
- Supervisor
- FindConfigDev
- LoadView
- change_stack
- disable_cache
- disable_mmu
- jump_to
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17 #ifndef BOOTSTRAP_H
18 #define BOOTSTRAP_H
19
20 #include <asm/amigatypes.h>
21 #include <asm/amigahw.h>
22
23 struct List {
24 struct Node *l_head;
25 struct Node *l_tail;
26 struct Node *l_tailpred;
27 u_char l_type;
28 u_char l_pad;
29 };
30
31 struct MemChunk {
32 struct MemChunk *mc_Next;
33 u_long mc_Bytes;
34 };
35
36 #define MEMF_CHIP (1<<1)
37 #define MEMF_FAST (1<<2)
38 #define MEMF_LOCAL (1<<8)
39 #define MEMF_CLEAR (1<<16)
40
41 struct MemHeader {
42 struct Node mh_Node;
43 u_short mh_Attributes;
44 struct MemChunk *mh_First;
45 void *mh_Lower;
46 void *mh_Upper;
47 u_long mh_Free;
48 };
49
50 struct ExecBase {
51 u_char fill1[296];
52 u_short AttnFlags;
53 u_char fill2[24];
54 struct List MemList;
55 u_char fill3[194];
56 u_char VBlankFrequency;
57 u_char PowerSupplyFrequency;
58 u_char fill4[36];
59 u_long EClockFrequency;
60 };
61
62 #ifndef AFF_68020
63 #define AFB_68020 1
64 #define AFF_68020 (1<<AFB_68020)
65 #endif
66
67 #ifndef AFF_68030
68 #define AFB_68030 2
69 #define AFF_68030 (1<<AFB_68030)
70 #endif
71
72 #ifndef AFF_68040
73 #define AFB_68040 3
74 #define AFF_68040 (1<<AFB_68040)
75 #endif
76
77 #ifndef AFF_68881
78 #define AFB_68881 4
79 #define AFF_68881 (1<<AFB_68881)
80 #endif
81
82 #ifndef AFF_68882
83 #define AFB_68882 5
84 #define AFF_68882 (1<<AFB_68882)
85 #endif
86
87 #ifndef AFF_FPU40
88 #define AFB_FPU40 6
89 #define AFF_FPU40 (1<<AFB_FPU40)
90 #endif
91
92
93
94
95
96 struct GfxBase {
97 u_char unused1[0xec];
98 u_char ChipRevBits0;
99 u_char unused2[5];
100 u_short monitor_id;
101 };
102
103 #ifndef GFXB_HR_AGNUS
104 #define GFXB_HR_AGNUS 0
105 #define GFXF_HR_AGNUS (1<<GFXB_HR_AGNUS)
106 #endif
107
108 #ifndef GFXB_HR_DENISE
109 #define GFXB_HR_DENISE 1
110 #define GFXF_HR_DENISE (1<<GFXB_HR_DENISE)
111 #endif
112
113 #ifndef GFXB_AA_ALICE
114 #define GFXB_AA_ALICE 2
115 #define GFXF_AA_ALICE (1<<GFXB_AA_ALICE)
116 #endif
117
118 #ifndef GFXB_AA_LISA
119 #define GFXB_AA_LISA 3
120 #define GFXF_AA_LISA (1<<GFXB_AA_LISA)
121 #endif
122
123
124
125
126
127 #define GFXG_OCS (GFXF_HR_AGNUS)
128
129
130
131 #define GFXG_ECS (GFXF_HR_AGNUS|GFXF_HR_DENISE)
132
133
134
135 #define GFXG_AGA (GFXF_AA_ALICE|GFXF_AA_LISA)
136
137 struct Library;
138
139 extern struct ExecBase *SysBase;
140
141 static __inline void *
142 AllocMem (unsigned long byteSize,unsigned long requirements)
143 {
144 register void *_res __asm("d0");
145 register struct ExecBase *a6 __asm("a6") = SysBase;
146 register unsigned long d0 __asm("d0") = byteSize;
147 register unsigned long d1 __asm("d1") = requirements;
148 __asm __volatile ("jsr a6@(-0xc6)"
149 : "=r" (_res)
150 : "r" (a6), "r" (d0), "r" (d1)
151 : "a0","a1","d0","d1", "memory");
152 return _res;
153 }
154 static __inline void
155 CloseLibrary (struct Library *library)
156 {
157 register struct ExecBase *a6 __asm("a6") = SysBase;
158 register struct Library *a1 __asm("a1") = library;
159 __asm __volatile ("jsr a6@(-0x19e)"
160 :
161 : "r" (a6), "r" (a1)
162 : "a0","a1","d0","d1", "memory");
163 }
164 static __inline void
165 Disable (void)
166 {
167 extern struct ExecBase *SysBase;
168 register struct ExecBase *a6 __asm("a6") = SysBase;
169 __asm __volatile ("jsr a6@(-0x78)"
170 :
171 : "r" (a6)
172 : "a0","a1","d0","d1", "memory");
173 }
174 static __inline void
175 Enable (void)
176 {
177 register struct ExecBase *a6 __asm("a6") = SysBase;
178 __asm __volatile ("jsr a6@(-0x7e)"
179 :
180 : "r" (a6)
181 : "a0","a1","d0","d1", "memory");
182 }
183 static __inline void
184 FreeMem (void * memoryBlock,unsigned long byteSize)
185 {
186 register struct ExecBase *a6 __asm("a6") = SysBase;
187 register void *a1 __asm("a1") = memoryBlock;
188 register unsigned long d0 __asm("d0") = byteSize;
189 __asm __volatile ("jsr a6@(-0xd2)"
190 :
191 : "r" (a6), "r" (a1), "r" (d0)
192 : "a0","a1","d0","d1", "memory");
193 }
194 static __inline struct Library *
195 OpenLibrary (char *libName,unsigned long version)
196 {
197 register struct Library * _res __asm("d0");
198 register struct ExecBase *a6 __asm("a6") = SysBase;
199 register u_char *a1 __asm("a1") = libName;
200 register unsigned long d0 __asm("d0") = version;
201 __asm __volatile ("jsr a6@(-0x228)"
202 : "=r" (_res)
203 : "r" (a6), "r" (a1), "r" (d0)
204 : "a0","a1","d0","d1", "memory");
205 return _res;
206 }
207 static __inline void *
208 SuperState (void)
209 {
210 register void *_res __asm("d0");
211 register struct ExecBase *a6 __asm("a6") = SysBase;
212 __asm __volatile ("jsr a6@(-0x96)"
213 : "=r" (_res)
214 : "r" (a6)
215 : "a0","a1","d0","d1", "memory");
216 return _res;
217 }
218 static __inline void
219 CacheClearU (void)
220 {
221 register struct ExecBase *a6 __asm("a6") = SysBase;
222 __asm __volatile ("jsr a6@(-0x27c)"
223 :
224 : "r" (a6)
225 : "a0","a1","d0","d1", "memory");
226 }
227 static __inline unsigned long
228 CacheControl (unsigned long cacheBits,unsigned long cacheMask)
229 {
230 register unsigned long _res __asm("d0");
231 register struct ExecBase *a6 __asm("a6") = SysBase;
232 register unsigned long d0 __asm("d0") = cacheBits;
233 register unsigned long d1 __asm("d1") = cacheMask;
234 __asm __volatile ("jsr a6@(-0x288)"
235 : "=r" (_res)
236 : "r" (a6), "r" (d0), "r" (d1)
237 : "a0","a1","d0","d1", "memory");
238 return _res;
239 }
240 static __inline unsigned long
241 Supervisor (unsigned long (*userfunc)())
242 {
243 register unsigned long _res __asm("d0");
244 register struct ExecBase *a6 __asm("a6") = SysBase;
245 register unsigned long (*a0)() __asm("a0") = userfunc;
246
247 __asm __volatile ("movel a5,sp@-;movel a0,a5;jsr a6@(-0x1e);movel sp@+,a5"
248 : "=r" (_res)
249 : "r" (a6), "r" (a0)
250 : "a0","a1","d0","d1","memory");
251 return _res;
252 }
253
254
255 struct ExpansionBase;
256 extern struct ExpansionBase *ExpansionBase;
257
258 static __inline struct ConfigDev *
259 FindConfigDev (struct ConfigDev *oldConfigDev,long manufacturer,long product)
260 {
261 register struct ConfigDev * _res __asm("d0");
262 register struct ExpansionBase* a6 __asm("a6") = ExpansionBase;
263 register struct ConfigDev *a0 __asm("a0") = oldConfigDev;
264 register long d0 __asm("d0") = manufacturer;
265 register long d1 __asm("d1") = product;
266 __asm __volatile ("jsr a6@(-0x48)"
267 : "=r" (_res)
268 : "r" (a6), "r" (a0), "r" (d0), "r" (d1)
269 : "a0","a1","d0","d1", "memory");
270 return _res;
271 }
272
273 struct GfxBase;
274 extern struct GfxBase *GfxBase;
275 struct View;
276 static __inline void
277 LoadView (struct View *view)
278 {
279 register struct GfxBase* a6 __asm("a6") = GfxBase;
280 register struct View *a1 __asm("a1") = view;
281 __asm __volatile ("jsr a6@(-0xde)"
282 :
283 : "r" (a6), "r" (a1)
284 : "a0","a1","d0","d1", "memory");
285 }
286
287 static __inline void change_stack (char *stackp)
288 {
289 __asm__ volatile ("movel %0,sp\n\t" :: "g" (stackp) : "sp");
290 }
291
292 static __inline void disable_cache (void)
293 {
294 __asm__ volatile ("movec %0,cacr" :: "d" (0));
295 }
296
297 static __inline void disable_mmu (void)
298 {
299 if (SysBase->AttnFlags & AFF_68040)
300 __asm__ volatile ("moveq #0,d0;"
301 ".long 0x4e7b0003;"
302 ".long 0x4e7b0004;"
303 ".long 0x4e7b0005;"
304 ".long 0x4e7b0006;"
305 ".long 0x4e7b0007"
306 :
307 :
308 : "d0");
309 else {
310 __asm__ volatile ("subl #4,sp;"
311 "pmove tc,sp@;"
312 "bclr #7,sp@;"
313 "pmove sp@,tc;"
314 "addl #4,sp");
315 if (SysBase->AttnFlags & AFF_68030)
316 __asm__ volatile ("clrl sp@-;"
317 ".long 0xf0170800;"
318 ".long 0xf0170c00;"
319 "addql #4,sp");
320 }
321 }
322
323 static __inline void jump_to (unsigned long addr)
324 {
325 __asm__ volatile ("jmp %0@" :: "a" (addr));
326
327 }
328
329 #endif