This source file includes following definitions.
- depca_probe
- depca_hw_init
- depca_open
- depca_init_ring
- depca_start_xmit
- depca_interrupt
- depca_rx
- depca_tx
- depca_close
- LoadCSRs
- InitRestartDepca
- depca_get_stats
- set_multicast_list
- SetMulticastFilter
- isa_probe
- eisa_probe
- alloc_device
- DepcaSignature
- DevicePresent
- get_hw_addr
- load_packet
- EISA_signature
- depca_dbg_open
- depca_ioctl
- init_module
- cleanup_module
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208 static const char *version = "depca.c:v0.421 96/4/22 davies@wanton.lkg.dec.com\n";
209
210 #include <linux/module.h>
211
212 #include <linux/kernel.h>
213 #include <linux/sched.h>
214 #include <linux/string.h>
215 #include <linux/ptrace.h>
216 #include <linux/errno.h>
217 #include <linux/ioport.h>
218 #include <linux/malloc.h>
219 #include <linux/interrupt.h>
220 #include <linux/delay.h>
221 #include <asm/segment.h>
222 #include <asm/bitops.h>
223 #include <asm/io.h>
224 #include <asm/dma.h>
225
226 #include <linux/netdevice.h>
227 #include <linux/etherdevice.h>
228 #include <linux/skbuff.h>
229
230 #include <linux/time.h>
231 #include <linux/types.h>
232 #include <linux/unistd.h>
233
234 #include "depca.h"
235
236 #ifdef DEPCA_DEBUG
237 static int depca_debug = DEPCA_DEBUG;
238 #else
239 static int depca_debug = 1;
240 #endif
241
242 #define DEPCA_NDA 0xffe0
243
244
245
246
247 #define PROBE_LENGTH 32
248 #define ETH_PROM_SIG 0xAA5500FFUL
249
250
251
252
253
254
255
256
257 #define NUM_RX_DESC 8
258 #define NUM_TX_DESC 8
259 #define RX_BUFF_SZ 1536
260 #define TX_BUFF_SZ 1536
261
262 #define CRC_POLYNOMIAL_BE 0x04c11db7UL
263 #define CRC_POLYNOMIAL_LE 0xedb88320UL
264
265
266
267
268 #define DEPCA_EISA_IO_PORTS 0x0c00
269 #define MAX_EISA_SLOTS 16
270 #define EISA_SLOT_INC 0x1000
271
272
273
274
275 #define DEPCA_RAM_BASE_ADDRESSES {0xc0000,0xd0000,0xe0000,0x00000}
276 #define DEPCA_IO_PORTS {0x300, 0x200, 0}
277 #define DEPCA_TOTAL_SIZE 0x10
278 static short mem_chkd = 0;
279
280
281
282
283 #define DEPCA_SIGNATURE {"DEPCA",\
284 "DE100","DE101",\
285 "DE200","DE201","DE202",\
286 "DE210",\
287 "DE422",\
288 ""}
289 static enum {DEPCA, de100, de101, de200, de201, de202, de210, de422, unknown} adapter;
290
291
292
293
294 #define DEPCA_STRLEN 16
295 #define MAX_NUM_DEPCAS 2
296
297
298
299
300
301
302
303 #define ALIGN4 ((u_long)4 - 1)
304 #define ALIGN8 ((u_long)8 - 1)
305 #define ALIGN ALIGN8
306
307
308
309
310 struct depca_rx_desc {
311 volatile s32 base;
312 s16 buf_length;
313 s16 msg_length;
314 };
315
316 struct depca_tx_desc {
317 volatile s32 base;
318 s16 length;
319 s16 misc;
320 };
321
322 #define LA_MASK 0x0000ffff
323
324
325
326
327
328 struct depca_init {
329 u16 mode;
330 u8 phys_addr[ETH_ALEN];
331 u8 mcast_table[8];
332 u32 rx_ring;
333 u32 tx_ring;
334 };
335
336 #define DEPCA_PKT_STAT_SZ 16
337 #define DEPCA_PKT_BIN_SZ 128
338
339 struct depca_private {
340 char devname[DEPCA_STRLEN];
341 char adapter_name[DEPCA_STRLEN];
342 char adapter;
343 struct depca_rx_desc *rx_ring;
344 struct depca_tx_desc *tx_ring;
345 struct depca_init init_block;
346 char *rx_memcpy[NUM_RX_DESC];
347 char *tx_memcpy[NUM_TX_DESC];
348 u_long bus_offset;
349 u_long sh_mem;
350 u_long dma_buffs;
351 int rx_new, tx_new;
352 int rx_old, tx_old;
353 struct enet_statistics stats;
354 struct {
355 u32 bins[DEPCA_PKT_STAT_SZ];
356 u32 unicast;
357 u32 multicast;
358 u32 broadcast;
359 u32 excessive_collisions;
360 u32 tx_underruns;
361 u32 excessive_underruns;
362 } pktStats;
363 int txRingMask;
364 int rxRingMask;
365 s32 rx_rlen;
366 s32 tx_rlen;
367 };
368
369
370
371
372
373
374
375
376 #define TX_BUFFS_AVAIL ((lp->tx_old<=lp->tx_new)?\
377 lp->tx_old+lp->txRingMask-lp->tx_new:\
378 lp->tx_old -lp->tx_new-1)
379
380
381
382
383 static int depca_open(struct device *dev);
384 static int depca_start_xmit(struct sk_buff *skb, struct device *dev);
385 static void depca_interrupt(int irq, void *dev_id, struct pt_regs * regs);
386 static int depca_close(struct device *dev);
387 static int depca_ioctl(struct device *dev, struct ifreq *rq, int cmd);
388 static struct enet_statistics *depca_get_stats(struct device *dev);
389 static void set_multicast_list(struct device *dev);
390
391
392
393
394 static int depca_hw_init(struct device *dev, u_long ioaddr);
395 static void depca_init_ring(struct device *dev);
396 static int depca_rx(struct device *dev);
397 static int depca_tx(struct device *dev);
398
399 static void LoadCSRs(struct device *dev);
400 static int InitRestartDepca(struct device *dev);
401 static void DepcaSignature(char *name, u_long paddr);
402 static int DevicePresent(u_long ioaddr);
403 static int get_hw_addr(struct device *dev);
404 static int EISA_signature(char *name, s32 eisa_id);
405 static void SetMulticastFilter(struct device *dev);
406 static void isa_probe(struct device *dev, u_long iobase);
407 static void eisa_probe(struct device *dev, u_long iobase);
408 static struct device *alloc_device(struct device *dev, u_long iobase);
409 static int load_packet(struct device *dev, struct sk_buff *skb);
410 static void depca_dbg_open(struct device *dev);
411
412 #ifdef MODULE
413 int init_module(void);
414 void cleanup_module(void);
415 static int autoprobed = 1, loading_module = 1;
416 # else
417 static u_char de1xx_irq[] = {2,3,4,5,7,9,0};
418 static u_char de2xx_irq[] = {5,9,10,11,15,0};
419 static u_char de422_irq[] = {5,9,10,11,0};
420 static u_char *depca_irq;
421 static int autoprobed = 0, loading_module = 0;
422 #endif
423
424 static char name[DEPCA_STRLEN];
425 static int num_depcas = 0, num_eth = 0;
426 static int mem=0;
427
428 static char *adapter_name = '\0';
429
430
431
432
433
434 #define STOP_DEPCA \
435 outw(CSR0, DEPCA_ADDR);\
436 outw(STOP, DEPCA_DATA)
437
438
439
440 int depca_probe(struct device *dev)
441 {
442 int tmp = num_depcas, status = -ENODEV;
443 u_long iobase = dev->base_addr;
444
445 if ((iobase == 0) && loading_module){
446 printk("Autoprobing is not supported when loading a module based driver.\n");
447 status = -EIO;
448 } else {
449 isa_probe(dev, iobase);
450 eisa_probe(dev, iobase);
451
452 if ((tmp == num_depcas) && (iobase != 0) && loading_module) {
453 printk("%s: depca_probe() cannot find device at 0x%04lx.\n", dev->name,
454 iobase);
455 }
456
457
458
459
460
461 for (; (dev->priv == NULL) && (dev->next != NULL); dev = dev->next);
462
463 if (dev->priv) status = 0;
464 if (iobase == 0) autoprobed = 1;
465 }
466
467 return status;
468 }
469
470 static int
471 depca_hw_init(struct device *dev, u_long ioaddr)
472 {
473 struct depca_private *lp;
474 int i, j, offset, netRAM, mem_len, status=0;
475 s16 nicsr;
476 u_long mem_start=0, mem_base[] = DEPCA_RAM_BASE_ADDRESSES;
477
478 STOP_DEPCA;
479
480 nicsr = inb(DEPCA_NICSR);
481 nicsr = ((nicsr & ~SHE & ~RBE & ~IEN) | IM);
482 outb(nicsr, DEPCA_NICSR);
483
484 if (inw(DEPCA_DATA) == STOP) {
485 if (mem == 0) {
486 for (; mem_base[mem_chkd]; mem_chkd++) {
487 mem_start = mem_base[mem_chkd];
488 DepcaSignature(name, mem_start);
489 if (*name != '\0') break;
490 }
491 } else {
492 mem_start = mem;
493 if (adapter_name) {
494 strcpy(name, adapter_name);
495 } else{
496 DepcaSignature(name, mem_start);
497 }
498 }
499
500 if ((*name != '\0') && mem_start) {
501 dev->base_addr = ioaddr;
502
503 if ((ioaddr&0x0fff)==DEPCA_EISA_IO_PORTS) {
504 printk("%s: %s at 0x%04lx (EISA slot %d)",
505 dev->name, name, ioaddr, (int)((ioaddr>>12)&0x0f));
506 } else {
507 printk("%s: %s at 0x%04lx", dev->name, name, ioaddr);
508 }
509
510 printk(", h/w address ");
511 status = get_hw_addr(dev);
512 for (i=0; i<ETH_ALEN - 1; i++) {
513 printk("%2.2x:", dev->dev_addr[i]);
514 }
515 printk("%2.2x", dev->dev_addr[i]);
516
517 if (status == 0) {
518
519 netRAM = ((adapter != DEPCA) ? 64 : 48);
520 if ((nicsr & _128KB) && (adapter == de422)) netRAM = 128;
521 offset = 0x0000;
522
523
524 if (nicsr & BUF) {
525 offset = 0x8000;
526 nicsr &= ~BS;
527 netRAM -= 32;
528 }
529 mem_start += offset;
530 if ((mem_len = (NUM_RX_DESC*(sizeof(struct depca_rx_desc)+RX_BUFF_SZ) +
531 NUM_TX_DESC*(sizeof(struct depca_tx_desc)+TX_BUFF_SZ) +
532 sizeof(struct depca_init))) <=
533 (netRAM<<10)) {
534 printk(",\n has %dkB RAM at 0x%.5lx", netRAM, mem_start);
535
536
537 if (adapter != DEPCA) {
538 nicsr |= SHE;
539 outb(nicsr, DEPCA_NICSR);
540 }
541
542
543 dev->priv = (void *) kmalloc(sizeof(struct depca_private), GFP_KERNEL);
544 if (dev->priv == NULL)
545 return -ENOMEM;
546 lp = (struct depca_private *)dev->priv;
547 memset((char *)dev->priv, 0, sizeof(struct depca_private));
548 lp->adapter = adapter;
549 sprintf(lp->adapter_name,"%s (%s)", name, dev->name);
550 request_region(ioaddr, DEPCA_TOTAL_SIZE, lp->adapter_name);
551
552
553 lp->sh_mem = mem_start;
554 mem_start += sizeof(struct depca_init);
555
556
557 mem_start = (mem_start + ALIGN) & ~ALIGN;
558 lp->rx_ring = (struct depca_rx_desc *)mem_start;
559
560 mem_start += (sizeof(struct depca_rx_desc) * NUM_RX_DESC);
561 lp->tx_ring = (struct depca_tx_desc *)mem_start;
562
563 mem_start += (sizeof(struct depca_tx_desc) * NUM_TX_DESC);
564 lp->bus_offset = mem_start & 0x00ff0000;
565 mem_start &= LA_MASK;
566
567 lp->dma_buffs = mem_start;
568
569
570 lp->rxRingMask = NUM_RX_DESC - 1;
571 lp->txRingMask = NUM_TX_DESC - 1;
572
573
574 for (i=0, j = lp->rxRingMask; j>0; i++) {
575 j >>= 1;
576 }
577 lp->rx_rlen = (s32)(i << 29);
578 for (i=0, j = lp->txRingMask; j>0; i++) {
579 j >>= 1;
580 }
581 lp->tx_rlen = (s32)(i << 29);
582
583
584 depca_init_ring(dev);
585
586
587 LoadCSRs(dev);
588
589
590 nicsr = ((nicsr & ~IM)|IEN);
591 outb(nicsr, DEPCA_NICSR);
592
593
594
595 if (dev->irq < 2) {
596 #ifndef MODULE
597 unsigned char irqnum;
598 autoirq_setup(0);
599
600
601 switch (lp->adapter) {
602 case DEPCA:
603 case de100:
604 case de101:
605 depca_irq = de1xx_irq;
606 break;
607 case de200:
608 case de201:
609 case de202:
610 case de210:
611 depca_irq = de2xx_irq;
612 break;
613 case de422:
614 depca_irq = de422_irq;
615 break;
616 }
617
618
619 outw(INEA | INIT, DEPCA_DATA);
620
621 irqnum = autoirq_report(1);
622 if (!irqnum) {
623 printk(" and failed to detect IRQ line.\n");
624 status = -ENXIO;
625 } else {
626 for (dev->irq=0,i=0; (depca_irq[i]) && (!dev->irq); i++) {
627 if (irqnum == depca_irq[i]) {
628 dev->irq = irqnum;
629 printk(" and uses IRQ%d.\n", dev->irq);
630 }
631 }
632
633 if (!dev->irq) {
634 printk(" but incorrect IRQ line detected.\n");
635 status = -ENXIO;
636 }
637 }
638 #endif
639 } else {
640 printk(" and assigned IRQ%d.\n", dev->irq);
641 }
642 if (status) release_region(ioaddr, DEPCA_TOTAL_SIZE);
643 } else {
644 printk(",\n requests %dkB RAM: only %dkB is available!\n",
645 (mem_len>>10), netRAM);
646 status = -ENXIO;
647 }
648 } else {
649 printk(" which has an Ethernet PROM CRC error.\n");
650 status = -ENXIO;
651 }
652 }
653 if (!status) {
654 if (depca_debug > 0) {
655 printk(version);
656 }
657
658
659 dev->open = &depca_open;
660 dev->hard_start_xmit = &depca_start_xmit;
661 dev->stop = &depca_close;
662 dev->get_stats = &depca_get_stats;
663 dev->set_multicast_list = &set_multicast_list;
664 dev->do_ioctl = &depca_ioctl;
665
666 dev->mem_start = 0;
667
668
669 ether_setup(dev);
670 } else {
671 if (dev->priv) {
672 kfree_s(dev->priv, sizeof(struct depca_private));
673 dev->priv = NULL;
674 }
675 }
676 } else {
677 status = -ENXIO;
678 }
679
680 return status;
681 }
682
683
684 static int
685 depca_open(struct device *dev)
686 {
687 struct depca_private *lp = (struct depca_private *)dev->priv;
688 u_long ioaddr = dev->base_addr;
689 s16 nicsr;
690 int status = 0;
691
692 irq2dev_map[dev->irq] = dev;
693 STOP_DEPCA;
694 nicsr = inb(DEPCA_NICSR);
695
696
697 if (adapter != DEPCA) {
698 nicsr |= SHE;
699 outb(nicsr, DEPCA_NICSR);
700 }
701
702
703 depca_init_ring(dev);
704 LoadCSRs(dev);
705
706 depca_dbg_open(dev);
707
708 if (request_irq(dev->irq, &depca_interrupt, 0, lp->adapter_name, NULL)) {
709 printk("depca_open(): Requested IRQ%d is busy\n",dev->irq);
710 status = -EAGAIN;
711 } else {
712
713
714 nicsr = ((nicsr & ~IM & ~LED)|IEN);
715 outb(nicsr, DEPCA_NICSR);
716 outw(CSR0,DEPCA_ADDR);
717
718 dev->tbusy = 0;
719 dev->interrupt = 0;
720 dev->start = 1;
721
722 status = InitRestartDepca(dev);
723
724 if (depca_debug > 1){
725 printk("CSR0: 0x%4.4x\n",inw(DEPCA_DATA));
726 printk("nicsr: 0x%02x\n",inb(DEPCA_NICSR));
727 }
728 }
729
730 MOD_INC_USE_COUNT;
731
732 return status;
733 }
734
735
736 static void
737 depca_init_ring(struct device *dev)
738 {
739 struct depca_private *lp = (struct depca_private *)dev->priv;
740 u_int i;
741 u_long p;
742
743
744 set_bit(0, (void *)&dev->tbusy);
745
746 lp->rx_new = lp->tx_new = 0;
747 lp->rx_old = lp->tx_old = 0;
748
749
750 for (i = 0; i <= lp->rxRingMask; i++) {
751 writel((p=lp->dma_buffs+i*RX_BUFF_SZ) | R_OWN, &lp->rx_ring[i].base);
752 writew(-RX_BUFF_SZ, &lp->rx_ring[i].buf_length);
753 lp->rx_memcpy[i]=(char *)(p+lp->bus_offset);
754 }
755 for (i = 0; i <= lp->txRingMask; i++) {
756 writel((p=lp->dma_buffs+(i+lp->txRingMask+1)*TX_BUFF_SZ) & 0x00ffffff,
757 &lp->tx_ring[i].base);
758 lp->tx_memcpy[i]=(char *)(p+lp->bus_offset);
759 }
760
761
762 lp->init_block.rx_ring = ((u32)((u_long)lp->rx_ring)&LA_MASK) | lp->rx_rlen;
763 lp->init_block.tx_ring = ((u32)((u_long)lp->tx_ring)&LA_MASK) | lp->tx_rlen;
764
765 SetMulticastFilter(dev);
766
767 for (i = 0; i < ETH_ALEN; i++) {
768 lp->init_block.phys_addr[i] = dev->dev_addr[i];
769 }
770
771 lp->init_block.mode = 0x0000;
772
773 return;
774 }
775
776
777
778
779 static int
780 depca_start_xmit(struct sk_buff *skb, struct device *dev)
781 {
782 struct depca_private *lp = (struct depca_private *)dev->priv;
783 u_long ioaddr = dev->base_addr;
784 int status = 0;
785
786
787 if (dev->tbusy) {
788 int tickssofar = jiffies - dev->trans_start;
789 if (tickssofar < 1*HZ) {
790 status = -1;
791 } else {
792 printk("%s: transmit timed out, status %04x, resetting.\n",
793 dev->name, inw(DEPCA_DATA));
794
795 STOP_DEPCA;
796 depca_init_ring(dev);
797 LoadCSRs(dev);
798 dev->interrupt = UNMASK_INTERRUPTS;
799 dev->start = 1;
800 dev->tbusy=0;
801 dev->trans_start = jiffies;
802 InitRestartDepca(dev);
803 }
804 return status;
805 } else if (skb == NULL) {
806 dev_tint(dev);
807 } else if (skb->len > 0) {
808
809 if (set_bit(0, (void*)&dev->tbusy) != 0) {
810 printk("%s: Transmitter access conflict.\n", dev->name);
811 status = -1;
812 } else {
813 if (TX_BUFFS_AVAIL) {
814 status = load_packet(dev, skb);
815
816 if (!status) {
817
818 outw(CSR0, DEPCA_ADDR);
819 outw(INEA | TDMD, DEPCA_DATA);
820
821 dev->trans_start = jiffies;
822 dev_kfree_skb(skb, FREE_WRITE);
823 }
824 if (TX_BUFFS_AVAIL) {
825 dev->tbusy=0;
826 }
827 } else {
828 status = -1;
829 }
830 }
831 }
832
833 return status;
834 }
835
836
837
838
839 static void
840 depca_interrupt(int irq, void *dev_id, struct pt_regs * regs)
841 {
842 struct device *dev = (struct device *)(irq2dev_map[irq]);
843 struct depca_private *lp;
844 s16 csr0, nicsr;
845 u_long ioaddr;
846
847 if (dev == NULL) {
848 printk ("depca_interrupt(): irq %d for unknown device.\n", irq);
849 } else {
850 lp = (struct depca_private *)dev->priv;
851 ioaddr = dev->base_addr;
852
853 if (dev->interrupt)
854 printk("%s: Re-entering the interrupt handler.\n", dev->name);
855
856 dev->interrupt = MASK_INTERRUPTS;
857
858
859 nicsr = inb(DEPCA_NICSR);
860 nicsr |= (IM|LED);
861 outb(nicsr, DEPCA_NICSR);
862
863 outw(CSR0, DEPCA_ADDR);
864 csr0 = inw(DEPCA_DATA);
865
866
867 outw(csr0 & INTE, DEPCA_DATA);
868
869 if (csr0 & RINT)
870 depca_rx(dev);
871
872 if (csr0 & TINT)
873 depca_tx(dev);
874
875 if ((TX_BUFFS_AVAIL >= 0) && dev->tbusy) {
876 dev->tbusy = 0;
877 mark_bh(NET_BH);
878 }
879
880
881 nicsr = (nicsr & ~IM & ~LED);
882 outb(nicsr, DEPCA_NICSR);
883
884 dev->interrupt = UNMASK_INTERRUPTS;
885 }
886
887 return;
888 }
889
890 static int
891 depca_rx(struct device *dev)
892 {
893 struct depca_private *lp = (struct depca_private *)dev->priv;
894 int i, entry;
895 s32 status;
896
897 for (entry=lp->rx_new;
898 !(readl(&lp->rx_ring[entry].base) & R_OWN);
899 entry=lp->rx_new){
900 status = readl(&lp->rx_ring[entry].base) >> 16 ;
901 if (status & R_STP) {
902 lp->rx_old = entry;
903 }
904 if (status & R_ENP) {
905 if (status & R_ERR) {
906 lp->stats.rx_errors++;
907 if (status & R_FRAM) lp->stats.rx_frame_errors++;
908 if (status & R_OFLO) lp->stats.rx_over_errors++;
909 if (status & R_CRC) lp->stats.rx_crc_errors++;
910 if (status & R_BUFF) lp->stats.rx_fifo_errors++;
911 } else {
912 short len, pkt_len = readw(&lp->rx_ring[entry].msg_length);
913 struct sk_buff *skb;
914
915 skb = dev_alloc_skb(pkt_len+2);
916 if (skb != NULL) {
917 unsigned char *buf;
918 skb_reserve(skb,2);
919 buf = skb_put(skb,pkt_len);
920 skb->dev = dev;
921 if (entry < lp->rx_old) {
922 len = (lp->rxRingMask - lp->rx_old + 1) * RX_BUFF_SZ;
923 memcpy_fromio(buf, lp->rx_memcpy[lp->rx_old], len);
924 memcpy_fromio(buf + len, lp->rx_memcpy[0], pkt_len-len);
925 } else {
926 memcpy_fromio(buf, lp->rx_memcpy[lp->rx_old], pkt_len);
927 }
928
929
930
931
932
933 skb->protocol=eth_type_trans(skb,dev);
934 netif_rx(skb);
935
936
937
938
939 lp->stats.rx_packets++;
940 for (i=1; i<DEPCA_PKT_STAT_SZ-1; i++) {
941 if (pkt_len < (i*DEPCA_PKT_BIN_SZ)) {
942 lp->pktStats.bins[i]++;
943 i = DEPCA_PKT_STAT_SZ;
944 }
945 }
946 if (buf[0] & 0x01) {
947 if ((*(s16 *)&buf[0] == -1) &&
948 (*(s16 *)&buf[2] == -1) &&
949 (*(s16 *)&buf[4] == -1)) {
950 lp->pktStats.broadcast++;
951 } else {
952 lp->pktStats.multicast++;
953 }
954 } else if ((*(s16 *)&buf[0] == *(s16 *)&dev->dev_addr[0]) &&
955 (*(s16 *)&buf[2] == *(s16 *)&dev->dev_addr[2]) &&
956 (*(s16 *)&buf[4] == *(s16 *)&dev->dev_addr[4])) {
957 lp->pktStats.unicast++;
958 }
959
960 lp->pktStats.bins[0]++;
961 if (lp->pktStats.bins[0] == 0) {
962 memset((char *)&lp->pktStats, 0, sizeof(lp->pktStats));
963 }
964 } else {
965 printk("%s: Memory squeeze, deferring packet.\n", dev->name);
966 lp->stats.rx_dropped++;
967 break;
968 }
969 }
970
971 for (; lp->rx_old!=entry; lp->rx_old=(++lp->rx_old)&lp->rxRingMask) {
972 writel(readl(&lp->rx_ring[lp->rx_old].base) | R_OWN,
973 &lp->rx_ring[lp->rx_old].base);
974 }
975 writel(readl(&lp->rx_ring[entry].base) | R_OWN, &lp->rx_ring[entry].base);
976 }
977
978
979
980
981 lp->rx_new = (++lp->rx_new) & lp->rxRingMask;
982 }
983
984 return 0;
985 }
986
987
988
989
990 static int
991 depca_tx(struct device *dev)
992 {
993 struct depca_private *lp = (struct depca_private *)dev->priv;
994 int entry;
995 s32 status;
996 u_long ioaddr = dev->base_addr;
997
998 for (entry = lp->tx_old; entry != lp->tx_new; entry = lp->tx_old) {
999 status = readl(&lp->tx_ring[entry].base) >> 16 ;
1000
1001 if (status < 0) {
1002 break;
1003 } else if (status & T_ERR) {
1004 status = readl(&lp->tx_ring[entry].misc);
1005 lp->stats.tx_errors++;
1006 if (status & TMD3_RTRY) lp->stats.tx_aborted_errors++;
1007 if (status & TMD3_LCAR) lp->stats.tx_carrier_errors++;
1008 if (status & TMD3_LCOL) lp->stats.tx_window_errors++;
1009 if (status & TMD3_UFLO) lp->stats.tx_fifo_errors++;
1010 if (status & (TMD3_BUFF | TMD3_UFLO)) {
1011
1012 outw(CSR0, DEPCA_ADDR);
1013 outw(INEA | TDMD, DEPCA_DATA);
1014 }
1015 } else if (status & (T_MORE | T_ONE)) {
1016 lp->stats.collisions++;
1017 } else {
1018 lp->stats.tx_packets++;
1019 }
1020
1021
1022 lp->tx_old = (++lp->tx_old) & lp->txRingMask;
1023 }
1024
1025 return 0;
1026 }
1027
1028 static int
1029 depca_close(struct device *dev)
1030 {
1031 struct depca_private *lp = (struct depca_private *)dev->priv;
1032 s16 nicsr;
1033 u_long ioaddr = dev->base_addr;
1034
1035 dev->start = 0;
1036 dev->tbusy = 1;
1037
1038 outw(CSR0, DEPCA_ADDR);
1039
1040 if (depca_debug > 1) {
1041 printk("%s: Shutting down ethercard, status was %2.2x.\n",
1042 dev->name, inw(DEPCA_DATA));
1043 }
1044
1045
1046
1047
1048
1049 outw(STOP, DEPCA_DATA);
1050
1051
1052
1053
1054 if (lp->adapter != DEPCA) {
1055 nicsr = inb(DEPCA_NICSR);
1056 nicsr &= ~SHE;
1057 outb(nicsr, DEPCA_NICSR);
1058 }
1059
1060
1061
1062
1063 free_irq(dev->irq, NULL);
1064 irq2dev_map[dev->irq] = NULL;
1065
1066 MOD_DEC_USE_COUNT;
1067
1068 return 0;
1069 }
1070
1071 static void LoadCSRs(struct device *dev)
1072 {
1073 struct depca_private *lp = (struct depca_private *)dev->priv;
1074 u_long ioaddr = dev->base_addr;
1075
1076 outw(CSR1, DEPCA_ADDR);
1077 outw((u16)(lp->sh_mem & LA_MASK), DEPCA_DATA);
1078 outw(CSR2, DEPCA_ADDR);
1079 outw((u16)((lp->sh_mem & LA_MASK) >> 16), DEPCA_DATA);
1080 outw(CSR3, DEPCA_ADDR);
1081 outw(ACON, DEPCA_DATA);
1082
1083 outw(CSR0, DEPCA_ADDR);
1084
1085 return;
1086 }
1087
1088 static int InitRestartDepca(struct device *dev)
1089 {
1090 struct depca_private *lp = (struct depca_private *)dev->priv;
1091 u_long ioaddr = dev->base_addr;
1092 int i, status=0;
1093
1094
1095 memcpy_toio((char *)lp->sh_mem, &lp->init_block, sizeof(struct depca_init));
1096
1097 outw(CSR0, DEPCA_ADDR);
1098 outw(INIT, DEPCA_DATA);
1099
1100
1101 for (i=0;(i<100) && !(inw(DEPCA_DATA) & IDON); i++);
1102
1103 if (i!=100) {
1104
1105 outw(IDON | INEA | STRT, DEPCA_DATA);
1106 if (depca_debug > 2) {
1107 printk("%s: DEPCA open after %d ticks, init block 0x%08lx csr0 %4.4x.\n",
1108 dev->name, i, lp->sh_mem, inw(DEPCA_DATA));
1109 }
1110 } else {
1111 printk("%s: DEPCA unopen after %d ticks, init block 0x%08lx csr0 %4.4x.\n",
1112 dev->name, i, lp->sh_mem, inw(DEPCA_DATA));
1113 status = -1;
1114 }
1115
1116 return status;
1117 }
1118
1119 static struct enet_statistics *
1120 depca_get_stats(struct device *dev)
1121 {
1122 struct depca_private *lp = (struct depca_private *)dev->priv;
1123
1124
1125
1126 return &lp->stats;
1127 }
1128
1129
1130
1131
1132 static void
1133 set_multicast_list(struct device *dev)
1134 {
1135 struct depca_private *lp = (struct depca_private *)dev->priv;
1136 u_long ioaddr = dev->base_addr;
1137
1138 if (irq2dev_map[dev->irq] != NULL) {
1139 while(dev->tbusy);
1140 set_bit(0, (void*)&dev->tbusy);
1141 while(lp->tx_old != lp->tx_new);
1142
1143 STOP_DEPCA;
1144 depca_init_ring(dev);
1145
1146 if (dev->flags & IFF_PROMISC) {
1147 lp->init_block.mode |= PROM;
1148 } else {
1149 SetMulticastFilter(dev);
1150 lp->init_block.mode &= ~PROM;
1151 }
1152
1153 LoadCSRs(dev);
1154 InitRestartDepca(dev);
1155 dev->tbusy = 0;
1156 }
1157 }
1158
1159
1160
1161
1162
1163
1164
1165 static void SetMulticastFilter(struct device *dev)
1166 {
1167 struct depca_private *lp = (struct depca_private *)dev->priv;
1168 struct dev_mc_list *dmi=dev->mc_list;
1169 char *addrs;
1170 int i, j, bit, byte;
1171 u16 hashcode;
1172 s32 crc, poly = CRC_POLYNOMIAL_BE;
1173
1174 if (dev->flags & IFF_ALLMULTI) {
1175 for (i=0; i<(HASH_TABLE_LEN>>3); i++) {
1176 lp->init_block.mcast_table[i] = (char)0xff;
1177 }
1178 } else {
1179 for (i=0; i<(HASH_TABLE_LEN>>3); i++){
1180 lp->init_block.mcast_table[i]=0;
1181 }
1182
1183 for (i=0;i<dev->mc_count;i++) {
1184 addrs=dmi->dmi_addr;
1185 dmi=dmi->next;
1186 if ((*addrs & 0x01) == 1) {
1187 crc = 0xffffffff;
1188 for (byte=0;byte<ETH_ALEN;byte++) {
1189
1190 for (bit = *addrs++,j=0;j<8;j++, bit>>=1) {
1191 crc = (crc << 1) ^ ((((crc<0?1:0) ^ bit) & 0x01) ? poly : 0);
1192 }
1193 }
1194 hashcode = (crc & 1);
1195 for (j=0;j<5;j++) {
1196 hashcode = (hashcode << 1) | ((crc>>=1) & 1);
1197 }
1198
1199
1200 byte = hashcode >> 3;
1201 bit = 1 << (hashcode & 0x07);
1202 lp->init_block.mcast_table[byte] |= bit;
1203 }
1204 }
1205 }
1206
1207 return;
1208 }
1209
1210
1211
1212
1213 static void isa_probe(struct device *dev, u_long ioaddr)
1214 {
1215 int i = num_depcas, maxSlots;
1216 s32 ports[] = DEPCA_IO_PORTS;
1217
1218 if (!ioaddr && autoprobed) return ;
1219 if (ioaddr > 0x400) return;
1220 if (i >= MAX_NUM_DEPCAS) return;
1221
1222 if (ioaddr == 0) {
1223 maxSlots = MAX_NUM_DEPCAS;
1224 } else {
1225 ports[i] = ioaddr;
1226 maxSlots = i + 1;
1227 }
1228
1229 for (; (i<maxSlots) && (dev!=NULL) && ports[i]; i++) {
1230 if (DevicePresent(ports[i]) == 0) {
1231 if (check_region(ports[i], DEPCA_TOTAL_SIZE) == 0) {
1232 if ((dev = alloc_device(dev, ports[i])) != NULL) {
1233 if (depca_hw_init(dev, ports[i]) == 0) {
1234 num_depcas++;
1235 }
1236 num_eth++;
1237 }
1238 } else if (autoprobed) {
1239 printk("%s: region already allocated at 0x%04x.\n", dev->name,ports[i]);
1240 }
1241 }
1242 }
1243
1244 return;
1245 }
1246
1247
1248
1249
1250
1251 static void eisa_probe(struct device *dev, u_long ioaddr)
1252 {
1253 int i, maxSlots;
1254 u_long iobase;
1255 char name[DEPCA_STRLEN];
1256
1257 if (!ioaddr && autoprobed) return ;
1258 if ((ioaddr < 0x400) && (ioaddr > 0)) return;
1259
1260 if (ioaddr == 0) {
1261 iobase = EISA_SLOT_INC;
1262 i = 1;
1263 maxSlots = MAX_EISA_SLOTS;
1264 } else {
1265 iobase = ioaddr;
1266 i = (ioaddr >> 12);
1267 maxSlots = i + 1;
1268 }
1269 if ((iobase & 0x0fff) == 0) iobase += DEPCA_EISA_IO_PORTS;
1270
1271 for (; (i<maxSlots) && (dev!=NULL); i++, iobase+=EISA_SLOT_INC) {
1272 if (EISA_signature(name, EISA_ID)) {
1273 if (DevicePresent(iobase) == 0) {
1274 if (check_region(iobase, DEPCA_TOTAL_SIZE) == 0) {
1275 if ((dev = alloc_device(dev, iobase)) != NULL) {
1276 if (depca_hw_init(dev, iobase) == 0) {
1277 num_depcas++;
1278 }
1279 num_eth++;
1280 }
1281 } else if (autoprobed) {
1282 printk("%s: region already allocated at 0x%04lx.\n",dev->name,iobase);
1283 }
1284 }
1285 }
1286 }
1287
1288 return;
1289 }
1290
1291
1292
1293
1294
1295 static struct device *alloc_device(struct device *dev, u_long iobase)
1296 {
1297 int addAutoProbe = 0;
1298 struct device *tmp = NULL, *ret;
1299 int (*init)(struct device *) = NULL;
1300
1301
1302
1303
1304 if (!loading_module) {
1305 while (dev->next != NULL) {
1306 if ((dev->base_addr == DEPCA_NDA) || (dev->base_addr == 0)) break;
1307 dev = dev->next;
1308 num_eth++;
1309 }
1310
1311
1312
1313
1314
1315 if ((dev->base_addr == 0) && (num_depcas > 0)) {
1316 addAutoProbe++;
1317 tmp = dev->next;
1318 init = dev->init;
1319 }
1320
1321
1322
1323
1324
1325 if ((dev->next == NULL) &&
1326 !((dev->base_addr == DEPCA_NDA) || (dev->base_addr == 0))){
1327 dev->next = (struct device *)kmalloc(sizeof(struct device) + 8,
1328 GFP_KERNEL);
1329
1330 dev = dev->next;
1331 if (dev == NULL) {
1332 printk("eth%d: Device not initialised, insufficient memory\n",
1333 num_eth);
1334 } else {
1335
1336
1337
1338
1339
1340 dev->name = (char *)(dev + 1);
1341 if (num_eth > 9999) {
1342 sprintf(dev->name,"eth????");
1343 } else {
1344 sprintf(dev->name,"eth%d", num_eth);
1345 }
1346 dev->base_addr = iobase;
1347 dev->next = NULL;
1348 dev->init = &depca_probe;
1349 num_depcas++;
1350 }
1351 }
1352 ret = dev;
1353
1354
1355
1356
1357
1358 if (ret != NULL) {
1359 if (addAutoProbe) {
1360 for (;(tmp->next!=NULL) && (tmp->base_addr!=DEPCA_NDA); tmp=tmp->next);
1361
1362
1363
1364
1365
1366 if ((tmp->next == NULL) && !(tmp->base_addr == DEPCA_NDA)) {
1367 tmp->next = (struct device *)kmalloc(sizeof(struct device) + 8,
1368 GFP_KERNEL);
1369 tmp = tmp->next;
1370 if (tmp == NULL) {
1371 printk("%s: Insufficient memory to extend the device list.\n",
1372 dev->name);
1373 } else {
1374
1375
1376
1377
1378
1379 tmp->name = (char *)(tmp + 1);
1380 if (num_eth > 9999) {
1381 sprintf(tmp->name,"eth????");
1382 } else {
1383 sprintf(tmp->name,"eth%d", num_eth);
1384 }
1385 tmp->base_addr = 0;
1386 tmp->next = NULL;
1387 tmp->init = init;
1388 }
1389 } else {
1390 tmp->base_addr = 0;
1391 }
1392 }
1393 }
1394 } else {
1395 ret = dev;
1396 }
1397
1398 return ret;
1399 }
1400
1401
1402
1403
1404
1405
1406 static void DepcaSignature(char *name, u_long paddr)
1407 {
1408 u_int i,j,k;
1409 const char *signatures[] = DEPCA_SIGNATURE;
1410 char tmpstr[16];
1411
1412 for (i=0;i<16;i++) {
1413 tmpstr[i] = readb(paddr+0xc000+i);
1414 }
1415
1416 strcpy(name,"");
1417 for (i=0;*signatures[i]!='\0' && *name=='\0';i++) {
1418 for (j=0,k=0;j<16 && k<strlen(signatures[i]);j++) {
1419 if (signatures[i][k] == tmpstr[j]) {
1420 k++;
1421 } else {
1422 k=0;
1423 }
1424 }
1425 if (k == strlen(signatures[i])) {
1426 strcpy(name,signatures[i]);
1427 }
1428 }
1429
1430 adapter = i - 1;
1431
1432 return;
1433 }
1434
1435
1436
1437
1438
1439
1440
1441
1442
1443
1444
1445
1446
1447
1448
1449
1450 static int DevicePresent(u_long ioaddr)
1451 {
1452 union {
1453 struct {
1454 u32 a;
1455 u32 b;
1456 } llsig;
1457 char Sig[sizeof(u32) << 1];
1458 } dev;
1459 short sigLength=0;
1460 s8 data;
1461 s16 nicsr;
1462 int i, j, status = 0;
1463
1464 data = inb(DEPCA_PROM);
1465 data = inb(DEPCA_PROM);
1466
1467 if (data == 0x08) {
1468 nicsr = inb(DEPCA_NICSR);
1469 nicsr |= AAC;
1470 outb(nicsr, DEPCA_NICSR);
1471 }
1472
1473 dev.llsig.a = ETH_PROM_SIG;
1474 dev.llsig.b = ETH_PROM_SIG;
1475 sigLength = sizeof(u32) << 1;
1476
1477 for (i=0,j=0;j<sigLength && i<PROBE_LENGTH+sigLength-1;i++) {
1478 data = inb(DEPCA_PROM);
1479 if (dev.Sig[j] == data) {
1480 j++;
1481 } else {
1482 if (data == dev.Sig[0]) {
1483 j=1;
1484 } else {
1485 j=0;
1486 }
1487 }
1488 }
1489
1490 if (j!=sigLength) {
1491 status = -ENODEV;
1492 }
1493
1494 return status;
1495 }
1496
1497
1498
1499
1500
1501
1502 static int get_hw_addr(struct device *dev)
1503 {
1504 u_long ioaddr = dev->base_addr;
1505 int i, k, tmp, status = 0;
1506 u_short j, x, chksum;
1507
1508 x = (((adapter == de100) || (adapter == de101)) ? 1 : 0);
1509
1510 for (i=0,k=0,j=0;j<3;j++) {
1511 k <<= 1 ;
1512 if (k > 0xffff) k-=0xffff;
1513
1514 k += (u_char) (tmp = inb(DEPCA_PROM + x));
1515 dev->dev_addr[i++] = (u_char) tmp;
1516 k += (u_short) ((tmp = inb(DEPCA_PROM + x)) << 8);
1517 dev->dev_addr[i++] = (u_char) tmp;
1518
1519 if (k > 0xffff) k-=0xffff;
1520 }
1521 if (k == 0xffff) k=0;
1522
1523 chksum = (u_char) inb(DEPCA_PROM + x);
1524 chksum |= (u_short) (inb(DEPCA_PROM + x) << 8);
1525 if (k != chksum) status = -1;
1526
1527 return status;
1528 }
1529
1530
1531
1532
1533 static int load_packet(struct device *dev, struct sk_buff *skb)
1534 {
1535 struct depca_private *lp = (struct depca_private *)dev->priv;
1536 int i, entry, end, len, status = 0;
1537
1538 entry = lp->tx_new;
1539 end = (entry + (skb->len - 1) / TX_BUFF_SZ) & lp->txRingMask;
1540 if (!(readl(&lp->tx_ring[end].base) & T_OWN)) {
1541
1542
1543
1544
1545 if (end < entry) {
1546 len = (lp->txRingMask - entry + 1) * TX_BUFF_SZ;
1547 memcpy_toio(lp->tx_memcpy[entry], skb->data, len);
1548 memcpy_toio(lp->tx_memcpy[0], skb->data + len, skb->len - len);
1549 } else {
1550 memcpy_toio(lp->tx_memcpy[entry], skb->data, skb->len);
1551 }
1552
1553
1554 len = (skb->len < ETH_ZLEN) ? ETH_ZLEN : skb->len;
1555 for (i = entry; i != end; i = (++i) & lp->txRingMask) {
1556
1557 writel(readl(&lp->tx_ring[i].base) & ~T_FLAGS, &lp->tx_ring[i].base);
1558 writew(0x0000, &lp->tx_ring[i].misc);
1559 writew(-TX_BUFF_SZ, &lp->tx_ring[i].length);
1560 len -= TX_BUFF_SZ;
1561 }
1562
1563 writel(readl(&lp->tx_ring[end].base) & ~T_FLAGS, &lp->tx_ring[end].base);
1564 writew(0x0000, &lp->tx_ring[end].misc);
1565 writew(-len, &lp->tx_ring[end].length);
1566
1567
1568 writel(readl(&lp->tx_ring[entry].base) | T_STP, &lp->tx_ring[entry].base);
1569
1570 writel(readl(&lp->tx_ring[end].base) | T_ENP, &lp->tx_ring[end].base);
1571
1572 for (i=end; i!=entry; --i) {
1573
1574 writel(readl(&lp->tx_ring[i].base) | T_OWN, &lp->tx_ring[i].base);
1575 if (i == 0) i=lp->txRingMask+1;
1576 }
1577 writel(readl(&lp->tx_ring[entry].base) | T_OWN, &lp->tx_ring[entry].base);
1578
1579 lp->tx_new = (++end) & lp->txRingMask;
1580 } else {
1581 status = -1;
1582 }
1583
1584 return status;
1585 }
1586
1587
1588
1589
1590 static int EISA_signature(char *name, s32 eisa_id)
1591 {
1592 u_int i;
1593 const char *signatures[] = DEPCA_SIGNATURE;
1594 char ManCode[DEPCA_STRLEN];
1595 union {
1596 s32 ID;
1597 char Id[4];
1598 } Eisa;
1599 int status = 0;
1600
1601 *name = '\0';
1602 Eisa.ID = inl(eisa_id);
1603
1604 ManCode[0]=(((Eisa.Id[0]>>2)&0x1f)+0x40);
1605 ManCode[1]=(((Eisa.Id[1]&0xe0)>>5)+((Eisa.Id[0]&0x03)<<3)+0x40);
1606 ManCode[2]=(((Eisa.Id[2]>>4)&0x0f)+0x30);
1607 ManCode[3]=(( Eisa.Id[2]&0x0f)+0x30);
1608 ManCode[4]=(((Eisa.Id[3]>>4)&0x0f)+0x30);
1609 ManCode[5]='\0';
1610
1611 for (i=0;(*signatures[i] != '\0') && (*name == '\0');i++) {
1612 if (strstr(ManCode, signatures[i]) != NULL) {
1613 strcpy(name,ManCode);
1614 status = 1;
1615 }
1616 }
1617
1618 return status;
1619 }
1620
1621 static void depca_dbg_open(struct device *dev)
1622 {
1623 struct depca_private *lp = (struct depca_private *)dev->priv;
1624 u_long ioaddr = dev->base_addr;
1625 struct depca_init *p = (struct depca_init *)lp->sh_mem;
1626 int i;
1627
1628 if (depca_debug > 1){
1629
1630 memcpy_toio((char *)lp->sh_mem,&lp->init_block,sizeof(struct depca_init));
1631
1632 printk("%s: depca open with irq %d\n",dev->name,dev->irq);
1633 printk("Descriptor head addresses:\n");
1634 printk("\t0x%lx 0x%lx\n",(u_long)lp->rx_ring, (u_long)lp->tx_ring);
1635 printk("Descriptor addresses:\nRX: ");
1636 for (i=0;i<lp->rxRingMask;i++){
1637 if (i < 3) {
1638 printk("0x%8.8lx ", (long) &lp->rx_ring[i].base);
1639 }
1640 }
1641 printk("...0x%8.8lx\n", (long) &lp->rx_ring[i].base);
1642 printk("TX: ");
1643 for (i=0;i<lp->txRingMask;i++){
1644 if (i < 3) {
1645 printk("0x%8.8lx ", (long) &lp->tx_ring[i].base);
1646 }
1647 }
1648 printk("...0x%8.8lx\n", (long) &lp->tx_ring[i].base);
1649 printk("\nDescriptor buffers:\nRX: ");
1650 for (i=0;i<lp->rxRingMask;i++){
1651 if (i < 3) {
1652 printk("0x%8.8x ", readl(&lp->rx_ring[i].base));
1653 }
1654 }
1655 printk("...0x%8.8x\n", readl(&lp->rx_ring[i].base));
1656 printk("TX: ");
1657 for (i=0;i<lp->txRingMask;i++){
1658 if (i < 3) {
1659 printk("0x%8.8x ", readl(&lp->tx_ring[i].base));
1660 }
1661 }
1662 printk("...0x%8.8x\n", readl(&lp->tx_ring[i].base));
1663 printk("Initialisation block at 0x%8.8lx\n",lp->sh_mem);
1664 printk("\tmode: 0x%4.4x\n",readw(&p->mode));
1665 printk("\tphysical address: ");
1666 for (i=0;i<ETH_ALEN-1;i++){
1667 printk("%2.2x:",(u_char)readb(&p->phys_addr[i]));
1668 }
1669 printk("%2.2x\n",(u_char)readb(&p->phys_addr[i]));
1670 printk("\tmulticast hash table: ");
1671 for (i=0;i<(HASH_TABLE_LEN >> 3)-1;i++){
1672 printk("%2.2x:",(u_char)readb(&p->mcast_table[i]));
1673 }
1674 printk("%2.2x\n",(u_char)readb(&p->mcast_table[i]));
1675 printk("\trx_ring at: 0x%8.8x\n",readl(&p->rx_ring));
1676 printk("\ttx_ring at: 0x%8.8x\n",readl(&p->tx_ring));
1677 printk("dma_buffs: 0x%8.8lx\n",lp->dma_buffs);
1678 printk("Ring size:\nRX: %d Log2(rxRingMask): 0x%8.8x\n",
1679 (int)lp->rxRingMask + 1,
1680 lp->rx_rlen);
1681 printk("TX: %d Log2(txRingMask): 0x%8.8x\n",
1682 (int)lp->txRingMask + 1,
1683 lp->tx_rlen);
1684 outw(CSR2,DEPCA_ADDR);
1685 printk("CSR2&1: 0x%4.4x",inw(DEPCA_DATA));
1686 outw(CSR1,DEPCA_ADDR);
1687 printk("%4.4x\n",inw(DEPCA_DATA));
1688 outw(CSR3,DEPCA_ADDR);
1689 printk("CSR3: 0x%4.4x\n",inw(DEPCA_DATA));
1690 }
1691
1692 return;
1693 }
1694
1695
1696
1697
1698
1699
1700 static int depca_ioctl(struct device *dev, struct ifreq *rq, int cmd)
1701 {
1702 struct depca_private *lp = (struct depca_private *)dev->priv;
1703 struct depca_ioctl *ioc = (struct depca_ioctl *) &rq->ifr_data;
1704 int i, status = 0;
1705 u_long ioaddr = dev->base_addr;
1706 union {
1707 u8 addr[(HASH_TABLE_LEN * ETH_ALEN)];
1708 u16 sval[(HASH_TABLE_LEN * ETH_ALEN) >> 1];
1709 u32 lval[(HASH_TABLE_LEN * ETH_ALEN) >> 2];
1710 } tmp;
1711
1712 switch(ioc->cmd) {
1713 case DEPCA_GET_HWADDR:
1714 for (i=0; i<ETH_ALEN; i++) {
1715 tmp.addr[i] = dev->dev_addr[i];
1716 }
1717 ioc->len = ETH_ALEN;
1718 if (!(status = verify_area(VERIFY_WRITE, (void *)ioc->data, ioc->len))) {
1719 memcpy_tofs(ioc->data, tmp.addr, ioc->len);
1720 }
1721
1722 break;
1723 case DEPCA_SET_HWADDR:
1724 if (suser()) {
1725 if (!(status = verify_area(VERIFY_READ, (void *)ioc->data, ETH_ALEN))) {
1726 memcpy_fromfs(tmp.addr,ioc->data,ETH_ALEN);
1727 for (i=0; i<ETH_ALEN; i++) {
1728 dev->dev_addr[i] = tmp.addr[i];
1729 }
1730 while(dev->tbusy);
1731 set_bit(0, (void*)&dev->tbusy);
1732 while(lp->tx_old != lp->tx_new);
1733
1734 STOP_DEPCA;
1735 depca_init_ring(dev);
1736 LoadCSRs(dev);
1737 InitRestartDepca(dev);
1738 dev->tbusy = 0;
1739 }
1740 } else {
1741 status = -EPERM;
1742 }
1743
1744 break;
1745 case DEPCA_SET_PROM:
1746 if (suser()) {
1747 while(dev->tbusy);
1748 set_bit(0, (void*)&dev->tbusy);
1749 while(lp->tx_old != lp->tx_new);
1750
1751 STOP_DEPCA;
1752 depca_init_ring(dev);
1753 lp->init_block.mode |= PROM;
1754
1755 LoadCSRs(dev);
1756 InitRestartDepca(dev);
1757 dev->tbusy = 0;
1758 } else {
1759 status = -EPERM;
1760 }
1761
1762 break;
1763 case DEPCA_CLR_PROM:
1764 if (suser()) {
1765 while(dev->tbusy);
1766 set_bit(0, (void*)&dev->tbusy);
1767 while(lp->tx_old != lp->tx_new);
1768
1769 STOP_DEPCA;
1770 depca_init_ring(dev);
1771 lp->init_block.mode &= ~PROM;
1772
1773 LoadCSRs(dev);
1774 InitRestartDepca(dev);
1775 dev->tbusy = 0;
1776 } else {
1777 status = -EPERM;
1778 }
1779
1780 break;
1781 case DEPCA_SAY_BOO:
1782 printk("%s: Boo!\n", dev->name);
1783
1784 break;
1785 case DEPCA_GET_MCA:
1786 ioc->len = (HASH_TABLE_LEN >> 3);
1787 if (!(status = verify_area(VERIFY_WRITE, ioc->data, ioc->len))) {
1788 memcpy_tofs(ioc->data, lp->init_block.mcast_table, ioc->len);
1789 }
1790
1791 break;
1792 case DEPCA_SET_MCA:
1793 if (suser()) {
1794 if (!(status=verify_area(VERIFY_READ, ioc->data, ETH_ALEN*ioc->len))) {
1795 memcpy_fromfs(tmp.addr, ioc->data, ETH_ALEN * ioc->len);
1796 set_multicast_list(dev);
1797 }
1798 } else {
1799 status = -EPERM;
1800 }
1801
1802 break;
1803 case DEPCA_CLR_MCA:
1804 if (suser()) {
1805 set_multicast_list(dev);
1806 } else {
1807 status = -EPERM;
1808 }
1809
1810 break;
1811 case DEPCA_MCA_EN:
1812 if (suser()) {
1813 set_multicast_list(dev);
1814 } else {
1815 status = -EPERM;
1816 }
1817
1818 break;
1819 case DEPCA_GET_STATS:
1820 cli();
1821 ioc->len = sizeof(lp->pktStats);
1822 if (!(status=verify_area(VERIFY_WRITE, ioc->data, ioc->len))) {
1823 memcpy_tofs(ioc->data, &lp->pktStats, ioc->len);
1824 }
1825 sti();
1826
1827 break;
1828 case DEPCA_CLR_STATS:
1829 if (suser()) {
1830 cli();
1831 memset(&lp->pktStats, 0, sizeof(lp->pktStats));
1832 sti();
1833 } else {
1834 status = -EPERM;
1835 }
1836
1837 break;
1838 case DEPCA_GET_REG:
1839 i=0;
1840 tmp.sval[i++] = inw(DEPCA_NICSR);
1841 outw(CSR0, DEPCA_ADDR);
1842 tmp.sval[i++] = inw(DEPCA_DATA);
1843 memcpy(&tmp.sval[i], &lp->init_block, sizeof(struct depca_init));
1844 ioc->len = i+sizeof(struct depca_init);
1845 if (!(status=verify_area(VERIFY_WRITE, ioc->data, ioc->len))) {
1846 memcpy_tofs(ioc->data, tmp.addr, ioc->len);
1847 }
1848
1849 break;
1850 default:
1851 status = -EOPNOTSUPP;
1852 }
1853
1854 return status;
1855 }
1856
1857 #ifdef MODULE
1858 static char devicename[9] = { 0, };
1859 static struct device thisDepca = {
1860 devicename,
1861 0, 0, 0, 0,
1862 0x200, 7,
1863 0, 0, 0, NULL, depca_probe };
1864
1865 static int irq=7;
1866 static int io=0x200;
1867
1868
1869 int
1870 init_module(void)
1871 {
1872 thisDepca.irq=irq;
1873 thisDepca.base_addr=io;
1874
1875 if (register_netdev(&thisDepca) != 0)
1876 return -EIO;
1877
1878 return 0;
1879 }
1880
1881 void
1882 cleanup_module(void)
1883 {
1884 if (thisDepca.priv) {
1885 kfree(thisDepca.priv);
1886 thisDepca.priv = NULL;
1887 }
1888 thisDepca.irq=0;
1889
1890 unregister_netdev(&thisDepca);
1891 release_region(thisDepca.base_addr, DEPCA_TOTAL_SIZE);
1892 }
1893 #endif
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1895
1896
1897
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1900
1901
1902