root/include/asm-m68k/pgtable.h

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INCLUDED FROM


DEFINITIONS

This source file includes following definitions.
  1. __flush_tlb_one
  2. flush_tlb_mm
  3. flush_tlb_page
  4. flush_tlb_range
  5. mk_pte
  6. pte_modify
  7. pmd_set
  8. pmd_set_et
  9. pgd_set
  10. pte_page
  11. pmd_page2
  12. pgd_page
  13. pte_none
  14. pte_present
  15. pte_clear
  16. pmd_none2
  17. pmd_bad2
  18. pmd_present2
  19. pmd_clear
  20. pgd_none
  21. pgd_bad
  22. pgd_present
  23. pgd_clear
  24. pte_read
  25. pte_write
  26. pte_exec
  27. pte_dirty
  28. pte_young
  29. pte_wrprotect
  30. pte_rdprotect
  31. pte_exprotect
  32. pte_mkclean
  33. pte_mkold
  34. pte_mkwrite
  35. pte_mkread
  36. pte_mkexec
  37. pte_mkdirty
  38. pte_mkyoung
  39. pte_mknocache
  40. pte_mkcache
  41. SET_PAGE_DIR
  42. pgd_offset
  43. pgd_offset_k
  44. pmd_offset
  45. pte_offset
  46. nocache_page
  47. cache_page
  48. pte_free
  49. pte_alloc
  50. pmd_free
  51. pmd_alloc
  52. pte_free_kernel
  53. pte_alloc_kernel
  54. pmd_free_kernel
  55. pmd_alloc_kernel
  56. pgd_free
  57. pgd_alloc
  58. update_mmu_cache

   1 #ifndef _M68K_PGTABLE_H
   2 #define _M68K_PGTABLE_H
   3 
   4 /*
   5  * This file contains the functions and defines necessary to modify and use
   6  * the m68k page table tree.
   7  */
   8 
   9 #define __flush_tlb() \
  10 do {    \
  11         if (m68k_is040or060) \
  12                 __asm__ __volatile__(".word 0xf510\n"::); /* pflushan */ \
  13         else \
  14                 __asm__ __volatile__("pflusha\n"::); \
  15 } while (0)
  16 
  17 static inline void __flush_tlb_one(unsigned long addr)
     /* [previous][next][first][last][top][bottom][index][help] */
  18 {
  19         if (m68k_is040or060) {
  20                 register unsigned long a0 __asm__ ("a0") = addr;
  21                 __asm__ __volatile__(".word 0xf508" /* pflush (%a0) */
  22                                      : : "a" (a0));
  23         } else
  24                 __asm__ __volatile__("pflush #0,#0,(%0)" : : "a" (addr));
  25 }
  26 
  27 #define flush_tlb() __flush_tlb()
  28 #define flush_tlb_all() flush_tlb()
  29 
  30 static inline void flush_tlb_mm(struct mm_struct *mm)
     /* [previous][next][first][last][top][bottom][index][help] */
  31 {
  32         if (mm == current->mm)
  33                 __flush_tlb();
  34 }
  35 
  36 static inline void flush_tlb_page(struct vm_area_struct *vma,
     /* [previous][next][first][last][top][bottom][index][help] */
  37         unsigned long addr)
  38 {
  39         if (vma->vm_mm == current->mm)
  40                 __flush_tlb_one(addr);
  41 }
  42 
  43 static inline void flush_tlb_range(struct mm_struct *mm,
     /* [previous][next][first][last][top][bottom][index][help] */
  44         unsigned long start, unsigned long end)
  45 {
  46         if (mm == current->mm)
  47                 __flush_tlb();
  48 }
  49 
  50 /* Certain architectures need to do special things when pte's
  51  * within a page table are directly modified.  Thus, the following
  52  * hook is made available.
  53  */
  54 #define set_pte(pteptr, pteval) ((*(pteptr)) = (pteval))
  55 
  56 /* PMD_SHIFT determines the size of the area a second-level page table can map */
  57 #define PMD_SHIFT       22
  58 #define PMD_SIZE        (1UL << PMD_SHIFT)
  59 #define PMD_MASK        (~(PMD_SIZE-1))
  60 
  61 /* PGDIR_SHIFT determines what a third-level page table entry can map */
  62 #define PGDIR_SHIFT     25
  63 #define PGDIR_SIZE      (1UL << PGDIR_SHIFT)
  64 #define PGDIR_MASK      (~(PGDIR_SIZE-1))
  65 
  66 /*
  67  * entries per page directory level: the m68k is configured as three-level,
  68  * so we do have PMD level physically.
  69  */
  70 #define PTRS_PER_PTE    1024
  71 #define PTRS_PER_PMD    8
  72 #define PTRS_PER_PGD    128
  73 
  74 /* the no. of pointers that fit on a page: this will go away */
  75 #define PTRS_PER_PAGE   (PAGE_SIZE/sizeof(void*))
  76 
  77 /* Just any arbitrary offset to the start of the vmalloc VM area: the
  78  * current 8MB value just means that there will be a 8MB "hole" after the
  79  * physical memory until the kernel virtual memory starts.  That means that
  80  * any out-of-bounds memory accesses will hopefully be caught.
  81  * The vmalloc() routines leaves a hole of 4kB between each vmalloced
  82  * area for the same reason. ;)
  83  */
  84 #define VMALLOC_OFFSET  (8*1024*1024)
  85 #define VMALLOC_START ((high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
  86 #define VMALLOC_VMADDR(x) ((unsigned long)(x))
  87 
  88 /*
  89  * Definitions for MMU descriptors
  90  */
  91 #define _PAGE_PRESENT   0x001
  92 #define _PAGE_SHORT     0x002
  93 #define _PAGE_RONLY     0x004
  94 #define _PAGE_ACCESSED  0x008
  95 #define _PAGE_DIRTY     0x010
  96 #define _PAGE_GLOBAL040 0x400   /* 68040 global bit, used for kva descs */
  97 #define _PAGE_COW       0x800   /* implemented in software */
  98 #define _PAGE_NOCACHE030 0x040  /* 68030 no-cache mode */
  99 #define _PAGE_NOCACHE   0x060   /* 68040 cache mode, non-serialized */
 100 #define _PAGE_NOCACHE_S 0x040   /* 68040 no-cache mode, serialized */
 101 #define _PAGE_CACHE040  0x020   /* 68040 cache mode, cachable, copyback */
 102 #define _PAGE_CACHE040W 0x000   /* 68040 cache mode, cachable, write-through */
 103 
 104 #define _DESCTYPE_MASK  0x003
 105 
 106 #define _CACHEMASK040   (~0x060)
 107 #define _TABLE_MASK     (0xfffffff0)
 108 
 109 #define _PAGE_TABLE     (_PAGE_SHORT)
 110 #define _PAGE_CHG_MASK  (PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY | _PAGE_NOCACHE)
 111 
 112 #define PAGE_NONE       __pgprot(_PAGE_PRESENT | _PAGE_RONLY | _PAGE_ACCESSED | _PAGE_CACHE040)
 113 #define PAGE_SHARED     __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_CACHE040)
 114 #define PAGE_COPY       __pgprot(_PAGE_PRESENT | _PAGE_RONLY | _PAGE_ACCESSED | _PAGE_CACHE040)
 115 #define PAGE_READONLY   __pgprot(_PAGE_PRESENT | _PAGE_RONLY | _PAGE_ACCESSED | _PAGE_CACHE040)
 116 #define PAGE_KERNEL     __pgprot(_PAGE_PRESENT | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_CACHE040)
 117 
 118 /*
 119  * The m68k can't do page protection for execute, and considers that the same are read.
 120  * Also, write permissions imply read permissions. This is the closest we can get..
 121  */
 122 #define __P000  PAGE_NONE
 123 #define __P001  PAGE_READONLY
 124 #define __P010  PAGE_COPY
 125 #define __P011  PAGE_COPY
 126 #define __P100  PAGE_READONLY
 127 #define __P101  PAGE_READONLY
 128 #define __P110  PAGE_COPY
 129 #define __P111  PAGE_COPY
 130 
 131 #define __S000  PAGE_NONE
 132 #define __S001  PAGE_READONLY
 133 #define __S010  PAGE_SHARED
 134 #define __S011  PAGE_SHARED
 135 #define __S100  PAGE_READONLY
 136 #define __S101  PAGE_READONLY
 137 #define __S110  PAGE_SHARED
 138 #define __S111  PAGE_SHARED
 139 
 140 /* zero page used for uninitialized stuff */
 141 extern unsigned long empty_zero_page;
 142 
 143 /*
 144  * BAD_PAGETABLE is used when we need a bogus page-table, while
 145  * BAD_PAGE is used for a bogus page.
 146  *
 147  * ZERO_PAGE is a global shared page that is always zero: used
 148  * for zero-mapped memory areas etc..
 149  */
 150 extern pte_t __bad_page(void);
 151 extern pte_t * __bad_pagetable(void);
 152 
 153 #define BAD_PAGETABLE __bad_pagetable()
 154 #define BAD_PAGE __bad_page()
 155 #define ZERO_PAGE empty_zero_page
 156 
 157 /* number of bits that fit into a memory pointer */
 158 #define BITS_PER_PTR                    (8*sizeof(unsigned long))
 159 
 160 /* to align the pointer to a pointer address */
 161 #define PTR_MASK                        (~(sizeof(void*)-1))
 162 
 163 /* sizeof(void*)==1<<SIZEOF_PTR_LOG2 */
 164 /* 64-bit machines, beware!  SRB. */
 165 #define SIZEOF_PTR_LOG2                 2
 166 
 167 /* to find an entry in a page-table */
 168 #define PAGE_PTR(address) \
 169 ((unsigned long)(address)>>(PAGE_SHIFT-SIZEOF_PTR_LOG2)&PTR_MASK&~PAGE_MASK)
 170 
 171 extern unsigned long high_memory;
 172 
 173 /* For virtual address to physical address conversion */
 174 extern unsigned long mm_vtop(unsigned long addr) __attribute__ ((const));
 175 extern unsigned long mm_ptov(unsigned long addr) __attribute__ ((const));
 176 #define VTOP(addr)  (mm_vtop((unsigned long)(addr)))
 177 #define PTOV(addr)  (mm_ptov((unsigned long)(addr)))
 178 
 179 /*
 180  * Conversion functions: convert a page and protection to a page entry,
 181  * and a page entry and page directory to the page they refer to.
 182  */
 183 extern inline pte_t mk_pte(unsigned long page, pgprot_t pgprot)
     /* [previous][next][first][last][top][bottom][index][help] */
 184 { pte_t pte; pte_val(pte) = VTOP(page) | pgprot_val(pgprot); return pte; }
 185 
 186 extern inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
     /* [previous][next][first][last][top][bottom][index][help] */
 187 { pte_val(pte) = (pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot); return pte; }
 188 
 189 extern inline void pmd_set(pmd_t * pmdp, pte_t * ptep)
     /* [previous][next][first][last][top][bottom][index][help] */
 190 {
 191         int i;
 192 
 193         ptep = (pte_t *) VTOP(ptep);
 194         for (i = 0; i < 16; i++, ptep += PTRS_PER_PTE/16)
 195                 pmdp->pmd[i] = _PAGE_TABLE | (unsigned long)ptep;
 196 }
 197 
 198 /* early termination version of the above */
 199 extern inline void pmd_set_et(pmd_t * pmdp, pte_t * ptep)
     /* [previous][next][first][last][top][bottom][index][help] */
 200 {
 201         int i;
 202 
 203         ptep = (pte_t *) VTOP(ptep);
 204         for (i = 0; i < 16; i++, ptep += PTRS_PER_PTE/16)
 205                 pmdp->pmd[i] = _PAGE_PRESENT | (unsigned long)ptep;
 206 }
 207 
 208 extern inline void pgd_set(pgd_t * pgdp, pmd_t * pmdp)
     /* [previous][next][first][last][top][bottom][index][help] */
 209 { pgd_val(*pgdp) = _PAGE_TABLE | VTOP(pmdp); }
 210 
 211 extern inline unsigned long pte_page(pte_t pte)
     /* [previous][next][first][last][top][bottom][index][help] */
 212 { return PTOV(pte_val(pte) & PAGE_MASK); }
 213 
 214 extern inline unsigned long pmd_page2(pmd_t *pmd)
     /* [previous][next][first][last][top][bottom][index][help] */
 215 { return PTOV(pmd_val(*pmd) & _TABLE_MASK); }
 216 #define pmd_page(pmd) pmd_page2(&(pmd))
 217 
 218 extern inline unsigned long pgd_page(pgd_t pgd)
     /* [previous][next][first][last][top][bottom][index][help] */
 219 { return PTOV(pgd_val(pgd) & _TABLE_MASK); }
 220 
 221 extern inline int pte_none(pte_t pte)           { return !pte_val(pte); }
     /* [previous][next][first][last][top][bottom][index][help] */
 222 extern inline int pte_present(pte_t pte)        { return pte_val(pte) & _PAGE_PRESENT; }
     /* [previous][next][first][last][top][bottom][index][help] */
 223 extern inline void pte_clear(pte_t *ptep)       { pte_val(*ptep) = 0; }
     /* [previous][next][first][last][top][bottom][index][help] */
 224 
 225 extern inline int pmd_none2(pmd_t *pmd)         { return !pmd_val(*pmd); }
     /* [previous][next][first][last][top][bottom][index][help] */
 226 #define pmd_none(pmd) pmd_none2(&(pmd))
 227 extern inline int pmd_bad2(pmd_t *pmd)          { return (pmd_val(*pmd) & _DESCTYPE_MASK) != _PAGE_TABLE || pmd_page(*pmd) > high_memory; }
     /* [previous][next][first][last][top][bottom][index][help] */
 228 #define pmd_bad(pmd) pmd_bad2(&(pmd))
 229 extern inline int pmd_present2(pmd_t *pmd)      { return pmd_val(*pmd) & _PAGE_TABLE; }
     /* [previous][next][first][last][top][bottom][index][help] */
 230 #define pmd_present(pmd) pmd_present2(&(pmd))
 231 extern inline void pmd_clear(pmd_t * pmdp)
     /* [previous][next][first][last][top][bottom][index][help] */
 232 {
 233         int i;
 234 
 235         for (i = 0; i < 16; i++)
 236                 pmdp->pmd[i] = 0;
 237 }
 238 
 239 extern inline int pgd_none(pgd_t pgd)           { return !pgd_val(pgd); }
     /* [previous][next][first][last][top][bottom][index][help] */
 240 extern inline int pgd_bad(pgd_t pgd)            { return (pgd_val(pgd) & _DESCTYPE_MASK) != _PAGE_TABLE || pgd_page(pgd) > high_memory; }
     /* [previous][next][first][last][top][bottom][index][help] */
 241 extern inline int pgd_present(pgd_t pgd)        { return pgd_val(pgd) & _PAGE_TABLE; }
     /* [previous][next][first][last][top][bottom][index][help] */
 242 
 243 extern inline void pgd_clear(pgd_t * pgdp)      { pgd_val(*pgdp) = 0; }
     /* [previous][next][first][last][top][bottom][index][help] */
 244 
 245 /*
 246  * The following only work if pte_present() is true.
 247  * Undefined behaviour if not..
 248  */
 249 extern inline int pte_read(pte_t pte)           { return 1; }
     /* [previous][next][first][last][top][bottom][index][help] */
 250 extern inline int pte_write(pte_t pte)          { return !(pte_val(pte) & _PAGE_RONLY); }
     /* [previous][next][first][last][top][bottom][index][help] */
 251 extern inline int pte_exec(pte_t pte)           { return 1; }
     /* [previous][next][first][last][top][bottom][index][help] */
 252 extern inline int pte_dirty(pte_t pte)          { return pte_val(pte) & _PAGE_DIRTY; }
     /* [previous][next][first][last][top][bottom][index][help] */
 253 extern inline int pte_young(pte_t pte)          { return pte_val(pte) & _PAGE_ACCESSED; }
     /* [previous][next][first][last][top][bottom][index][help] */
 254 
 255 extern inline pte_t pte_wrprotect(pte_t pte)    { pte_val(pte) |= _PAGE_RONLY; return pte; }
     /* [previous][next][first][last][top][bottom][index][help] */
 256 extern inline pte_t pte_rdprotect(pte_t pte)    { return pte; }
     /* [previous][next][first][last][top][bottom][index][help] */
 257 extern inline pte_t pte_exprotect(pte_t pte)    { return pte; }
     /* [previous][next][first][last][top][bottom][index][help] */
 258 extern inline pte_t pte_mkclean(pte_t pte)      { pte_val(pte) &= ~_PAGE_DIRTY; return pte; }
     /* [previous][next][first][last][top][bottom][index][help] */
 259 extern inline pte_t pte_mkold(pte_t pte)        { pte_val(pte) &= ~_PAGE_ACCESSED; return pte; }
     /* [previous][next][first][last][top][bottom][index][help] */
 260 extern inline pte_t pte_mkwrite(pte_t pte)      { pte_val(pte) &= ~_PAGE_RONLY; return pte; }
     /* [previous][next][first][last][top][bottom][index][help] */
 261 extern inline pte_t pte_mkread(pte_t pte)       { return pte; }
     /* [previous][next][first][last][top][bottom][index][help] */
 262 extern inline pte_t pte_mkexec(pte_t pte)       { return pte; }
     /* [previous][next][first][last][top][bottom][index][help] */
 263 extern inline pte_t pte_mkdirty(pte_t pte)      { pte_val(pte) |= _PAGE_DIRTY; return pte; }
     /* [previous][next][first][last][top][bottom][index][help] */
 264 extern inline pte_t pte_mkyoung(pte_t pte)      { pte_val(pte) |= _PAGE_ACCESSED; return pte; }
     /* [previous][next][first][last][top][bottom][index][help] */
 265 extern inline pte_t pte_mknocache(pte_t pte)
     /* [previous][next][first][last][top][bottom][index][help] */
 266 {
 267         pte_val(pte) = (pte_val(pte) & _CACHEMASK040) | m68k_pgtable_cachemode;
 268         return pte;
 269 }
 270 extern inline pte_t pte_mkcache(pte_t pte)      { pte_val(pte) = (pte_val(pte) & _CACHEMASK040) | _PAGE_CACHE040; return pte; }
     /* [previous][next][first][last][top][bottom][index][help] */
 271 
 272 /* to set the page-dir */
 273 extern inline void SET_PAGE_DIR(struct task_struct * tsk, pgd_t * pgdir)
     /* [previous][next][first][last][top][bottom][index][help] */
 274 {
 275         tsk->tss.pagedir_v = (unsigned long *)pgdir;
 276         tsk->tss.pagedir_p = VTOP(pgdir);
 277         tsk->tss.crp[0] = 0x80000000 | _PAGE_SHORT;
 278         tsk->tss.crp[1] = tsk->tss.pagedir_p;
 279         if (tsk == current) {
 280                 if (m68k_is040or060)
 281                         __asm__ __volatile__ (".word 0xf510\n\t" /* pflushan */
 282                                               "movel %0@,%/d0\n\t"
 283                                               ".long 0x4e7b0806\n\t"
 284                                               /* movec d0,urp */
 285                                               : : "a" (&tsk->tss.crp[1])
 286                                               : "d0");
 287                 else
 288                         __asm__ __volatile__ ("movec  %/cacr,%/d0\n\t"
 289                                               "oriw #0x0808,%/d0\n\t"
 290                                               "movec %/d0,%/cacr\n\t"
 291                                               "pmove %0@,%/crp\n\t"
 292                                               : : "a" (&tsk->tss.crp[0])
 293                                               : "d0");
 294         }
 295 }
 296 
 297 #define PAGE_DIR_OFFSET(tsk,address) pgd_offset((tsk),(address))
 298 
 299 /* to find an entry in a page-table-directory */
 300 extern inline pgd_t * pgd_offset(struct mm_struct * mm, unsigned long address)
     /* [previous][next][first][last][top][bottom][index][help] */
 301 {
 302         return mm->pgd + (address >> PGDIR_SHIFT);
 303 }
 304 
 305 extern pgd_t swapper_pg_dir[128];
 306 extern pgd_t kernel_pg_dir[128];
 307 
 308 extern inline pgd_t * pgd_offset_k(unsigned long address)
     /* [previous][next][first][last][top][bottom][index][help] */
 309 {
 310         return kernel_pg_dir + (address >> PGDIR_SHIFT);
 311 }
 312 
 313 
 314 /* Find an entry in the second-level page table.. */
 315 extern inline pmd_t * pmd_offset(pgd_t * dir, unsigned long address)
     /* [previous][next][first][last][top][bottom][index][help] */
 316 {
 317         return (pmd_t *) pgd_page(*dir) + ((address >> PMD_SHIFT) & (PTRS_PER_PMD-1));
 318 }
 319 
 320 /* Find an entry in the third-level page table.. */ 
 321 extern inline pte_t * pte_offset(pmd_t * pmdp, unsigned long address)
     /* [previous][next][first][last][top][bottom][index][help] */
 322 {
 323         return (pte_t *) pmd_page(*pmdp) + ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1));
 324 }
 325 
 326 /*
 327  * Allocate and free page tables. The xxx_kernel() versions are
 328  * used to allocate a kernel page table - this turns on ASN bits
 329  * if any.
 330  */
 331 
 332 extern inline void nocache_page (unsigned long vaddr)
     /* [previous][next][first][last][top][bottom][index][help] */
 333 {
 334         if (m68k_is040or060) {
 335                 pgd_t *dir;
 336                 pmd_t *pmdp;
 337                 pte_t *ptep;
 338 
 339                 dir = pgd_offset_k(vaddr);
 340                 pmdp = pmd_offset(dir,vaddr);
 341                 ptep = pte_offset(pmdp,vaddr);
 342                 *ptep = pte_mknocache(*ptep);
 343         }
 344 }
 345 
 346 static inline void cache_page (unsigned long vaddr)
     /* [previous][next][first][last][top][bottom][index][help] */
 347 {
 348         if (m68k_is040or060) {
 349                 pgd_t *dir;
 350                 pmd_t *pmdp;
 351                 pte_t *ptep;
 352 
 353                 dir = pgd_offset_k(vaddr);
 354                 pmdp = pmd_offset(dir,vaddr);
 355                 ptep = pte_offset(pmdp,vaddr);
 356                 *ptep = pte_mkcache(*ptep);
 357         }
 358 }
 359 
 360 
 361 extern inline void pte_free(pte_t * pte)
     /* [previous][next][first][last][top][bottom][index][help] */
 362 {
 363         cache_page((unsigned long)pte);
 364         free_page((unsigned long) pte);
 365 }
 366 
 367 extern inline pte_t * pte_alloc(pmd_t * pmd, unsigned long address)
     /* [previous][next][first][last][top][bottom][index][help] */
 368 {
 369         address = (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1);
 370         if (pmd_none(*pmd)) {
 371                 pte_t * page = (pte_t *)get_free_page(GFP_KERNEL);
 372                 if (pmd_none(*pmd)) {
 373                         if (page) {
 374                                 nocache_page((unsigned long)page);
 375                                 pmd_set(pmd,page);
 376                                 return page + address;
 377                         }
 378                         pmd_set(pmd, BAD_PAGETABLE);
 379                         return NULL;
 380                 }
 381                 free_page((unsigned long)page);
 382         }
 383         if (pmd_bad(*pmd)) {
 384                 printk("Bad pmd in pte_alloc: %08lx\n", pmd_val(*pmd));
 385                 pmd_set(pmd, BAD_PAGETABLE);
 386                 return NULL;
 387         }
 388         return (pte_t *) pmd_page(*pmd) + address;
 389 }
 390 
 391 extern pmd_t *get_pointer_table (void);
 392 extern void free_pointer_table (pmd_t *);
 393 extern pmd_t *get_kpointer_table (void);
 394 extern void free_kpointer_table (pmd_t *);
 395 
 396 extern inline void pmd_free(pmd_t * pmd)
     /* [previous][next][first][last][top][bottom][index][help] */
 397 {
 398         free_pointer_table (pmd);
 399 }
 400 
 401 extern inline pmd_t * pmd_alloc(pgd_t * pgd, unsigned long address)
     /* [previous][next][first][last][top][bottom][index][help] */
 402 {
 403         address = (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1);
 404         if (pgd_none(*pgd)) {
 405                 pmd_t *page = get_pointer_table();
 406                 if (pgd_none(*pgd)) {
 407                         if (page) {
 408                                 pgd_set(pgd, page);
 409                                 return page + address;
 410                         }
 411                         pgd_set(pgd, (pmd_t *)BAD_PAGETABLE);
 412                         return NULL;
 413                 }
 414                 free_pointer_table(page);
 415         }
 416         if (pgd_bad(*pgd)) {
 417                 printk("Bad pgd in pmd_alloc: %08lx\n", pgd_val(*pgd));
 418                 pgd_set(pgd, (pmd_t *)BAD_PAGETABLE);
 419                 return NULL;
 420         }
 421         return (pmd_t *) pgd_page(*pgd) + address;
 422 }
 423 
 424 extern inline void pte_free_kernel(pte_t * pte)
     /* [previous][next][first][last][top][bottom][index][help] */
 425 {
 426         cache_page((unsigned long)pte);
 427         free_page((unsigned long) pte);
 428 }
 429 
 430 extern inline pte_t * pte_alloc_kernel(pmd_t * pmd, unsigned long address)
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 431 {
 432         address = (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1);
 433         if (pmd_none(*pmd)) {
 434                 pte_t * page = (pte_t *) get_free_page(GFP_KERNEL);
 435                 if (pmd_none(*pmd)) {
 436                         if (page) {
 437                                 nocache_page((unsigned long)page);
 438                                 pmd_set(pmd, page);
 439                                 return page + address;
 440                         }
 441                         pmd_set(pmd, BAD_PAGETABLE);
 442                         return NULL;
 443                 }
 444                 free_page((unsigned long) page);
 445         }
 446         if (pmd_bad(*pmd)) {
 447                 printk("Bad pmd in pte_alloc_kernel: %08lx\n", pmd_val(*pmd));
 448                 pmd_set(pmd, BAD_PAGETABLE);
 449                 return NULL;
 450         }
 451         return (pte_t *) pmd_page(*pmd) + address;
 452 }
 453 
 454 extern inline void pmd_free_kernel(pmd_t * pmd)
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 455 {
 456         free_kpointer_table(pmd);
 457 }
 458 
 459 extern inline pmd_t * pmd_alloc_kernel(pgd_t * pgd, unsigned long address)
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 460 {
 461         address = (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1);
 462         if (pgd_none(*pgd)) {
 463                 pmd_t *page = get_kpointer_table();
 464                 if (pgd_none(*pgd)) {
 465                         if (page) {
 466                                 pgd_set(pgd, page);
 467                                 return page + address;
 468                         }
 469                         pgd_set(pgd, (pmd_t *)BAD_PAGETABLE);
 470                         return NULL;
 471                 }
 472                 free_kpointer_table(page);
 473         }
 474         if (pgd_bad(*pgd)) {
 475                 printk("Bad pgd in pmd_alloc_kernel: %08lx\n", pgd_val(*pgd));
 476                 pgd_set(pgd, (pmd_t *)BAD_PAGETABLE);
 477                 return NULL;
 478         }
 479         return (pmd_t *) pgd_page(*pgd) + address;
 480 }
 481 
 482 extern inline void pgd_free(pgd_t * pgd)
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 483 {
 484         free_pointer_table ((pmd_t *) pgd);
 485 }
 486 
 487 extern inline pgd_t * pgd_alloc(void)
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 488 {
 489         return (pgd_t *)get_pointer_table ();
 490 }
 491 
 492 #define flush_icache() \
 493 do { \
 494         if (m68k_is040or060) \
 495                 asm (".word 0xf498"); /* CINVA I */ \
 496         else \
 497                 asm ("movec %/cacr,%/d0;" \
 498                      "oriw %0,%/d0;" \
 499                      "movec %/d0,%/cacr" \
 500                      : /* no outputs */ \
 501                      : "i" (FLUSH_I) \
 502                      : "d0"); \
 503 } while (0)
 504 
 505 /*
 506  * invalidate the cache for the specified memory range.
 507  * It starts at the physical address specified for
 508  * the given number of bytes.
 509  */
 510 extern void cache_clear (unsigned long paddr, int len);
 511 /*
 512  * push any dirty cache in the specified memory range.
 513  * It starts at the physical address specified for
 514  * the given number of bytes.
 515  */
 516 extern void cache_push (unsigned long paddr, int len);
 517 
 518 /*
 519  * push and invalidate pages in the specified user virtual
 520  * memory range.
 521  */
 522 extern void cache_push_v (unsigned long vaddr, int len);
 523 
 524 /*
 525  * Could someone take a look at these?
 526  */
 527 extern void flush_cache_all(void);
 528 #define flush_cache_mm(mm)                 flush_cache_all()
 529 #define flush_cache_range(mm, start, end)  flush_cache_all()
 530 #define flush_cache_page(vma, addr)        flush_cache_all()
 531 extern void flush_page_to_ram(unsigned long addr);
 532 
 533 /* cache code */
 534 #define FLUSH_I_AND_D   (0x00000808)
 535 #define FLUSH_I         (0x00000008)
 536 
 537 /*
 538  * Check if the addr/len goes up to the end of a physical
 539  * memory chunk.  Used for DMA functions.
 540  */
 541 int mm_end_of_chunk (unsigned long addr, int len);
 542 
 543 /*
 544  * Map some physical address range into the kernel address space. The
 545  * code is copied and adapted from map_chunk().
 546  */
 547 extern unsigned long kernel_map(unsigned long paddr, unsigned long size,
 548                                 int nocacheflag, unsigned long *memavailp );
 549 /*
 550  * Change the cache mode of some kernel address range.
 551  */
 552 extern void kernel_set_cachemode( unsigned long address, unsigned long size,
 553                                   unsigned cmode );
 554 
 555 /* Values for nocacheflag and cmode */
 556 #define KERNELMAP_FULL_CACHING          0
 557 #define KERNELMAP_NOCACHE_SER           1
 558 #define KERNELMAP_NOCACHE_NONSER        2
 559 #define KERNELMAP_NO_COPYBACK           3
 560 
 561 /*
 562  * The m68k doesn't have any external MMU info: the kernel page
 563  * tables contain all the necessary information.
 564  */
 565 extern inline void update_mmu_cache(struct vm_area_struct * vma,
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 566         unsigned long address, pte_t pte)
 567 {
 568 }
 569 
 570 /*
 571  * I don't know what is going on here, but since these were changed,
 572  * swapping hasn't been working on the 68040.
 573  */
 574 
 575 #define SWP_TYPE(entry)  (((entry) >> 2) & 0x7f)
 576 #if 0
 577 #define SWP_OFFSET(entry) ((entry) >> 9)
 578 #define SWP_ENTRY(type,offset) (((type) << 2) | ((offset) << 9))
 579 #else
 580 #define SWP_OFFSET(entry) ((entry) >> PAGE_SHIFT)
 581 #define SWP_ENTRY(type,offset) (((type) << 2) | ((offset) << PAGE_SHIFT))
 582 #endif
 583 
 584 #endif /* _M68K_PGTABLE_H */

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