root/kernel/FPU-emu/control_w.h

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INCLUDED FROM


   1 /*---------------------------------------------------------------------------+
   2  |  control_w.h                                                              |
   3  |                                                                           |
   4  | Copyright (C) 1992,1993                                                   |
   5  |                       W. Metzenthen, 22 Parker St, Ormond, Vic 3163,      |
   6  |                       Australia.  E-mail apm233m@vaxc.cc.monash.edu.au    |
   7  |                                                                           |
   8  +---------------------------------------------------------------------------*/
   9 
  10 #ifndef _CONTROLW_H_
  11 #define _CONTROLW_H_
  12 
  13 #ifdef __ASSEMBLER__
  14 #define _Const_(x)      $##x
  15 #else
  16 #define _Const_(x)      x
  17 #endif
  18 
  19 #define CW_RC           _Const_(0x0C00) /* rounding control */
  20 #define CW_PC           _Const_(0x0300) /* precision control */
  21 #define CW_PM           _Const_(0x0020) /* precision mask */
  22 #define CW_UM           _Const_(0x0010) /* underflow mask */
  23 #define CW_OM           _Const_(0x0008) /* overflow mask */
  24 #define CW_ZM           _Const_(0x0004) /* divide by zero mask */
  25 #define CW_DM           _Const_(0x0002) /* denormalized operand mask */
  26 #define CW_IM           _Const_(0x0001) /* invalid operation mask */
  27 #define CW_EXM          _Const_(0x007f) /* all masks */
  28 
  29 #define RC_RND          _Const_(0x0000)
  30 #define RC_DOWN         _Const_(0x0400)
  31 #define RC_UP           _Const_(0x0800)
  32 #define RC_CHOP         _Const_(0x0C00)
  33 
  34 /* p 15-5: Precision control bits affect only the following:
  35    ADD, SUB(R), MUL, DIV(R), and SQRT */
  36 #define FULL_PRECISION  (CW_PC | RC_RND)
  37 #define PR_24_BITS      _Const_(0x000)
  38 #define PR_53_BITS      _Const_(0x200)
  39 #define PR_64_BITS      _Const_(0x300)
  40 
  41 #endif _CONTROLW_H_

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