This source file includes following definitions.
- serial_in
- serial_inp
- serial_out
- serial_outp
- rs_sched_event
- receive_chars
- transmit_chars
- check_modem_status
- figure_RS_timer
- rs_interrupt
- rs_probe
- handle_rs_break
- do_softint
- rs_timer
- figure_IRQ_timeout
- startup
- shutdown
- change_speed
- restart_port
- rs_write
- rs_throttle
- get_serial_info
- set_serial_info
- get_modem_info
- set_modem_info
- send_break
- rs_ioctl
- rs_set_termios
- rs_close
- block_til_ready
- rs_open
- show_serial_version
- get_auto_irq
- init
- rs_init
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20 #include <linux/errno.h>
21 #include <linux/signal.h>
22 #include <linux/sched.h>
23 #include <linux/timer.h>
24 #include <linux/tty.h>
25 #include <linux/serial.h>
26 #include <linux/interrupt.h>
27 #include <linux/config.h>
28 #include <linux/string.h>
29 #include <linux/fcntl.h>
30 #include <linux/ptrace.h>
31
32 #include <asm/system.h>
33 #include <asm/io.h>
34 #include <asm/segment.h>
35 #include <asm/bitops.h>
36
37
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53
54
55 #define WAKEUP_CHARS (3*TTY_BUF_SIZE/4)
56
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61
62
63
64 static int rs_event[2];
65
66 static struct async_struct *IRQ_ports[16];
67 static int IRQ_active;
68 static unsigned long IRQ_timer[16];
69 static int IRQ_timeout[16];
70
71
72
73
74
75
76
77
78 #define BASE_BAUD ( 1843200 / 16 )
79
80 struct async_struct rs_table[] = {
81
82 { BASE_BAUD, 0x3F8, 4, ASYNC_SKIP_TEST, },
83 { BASE_BAUD, 0x2F8, 3, ASYNC_SKIP_TEST, },
84 { BASE_BAUD, 0x3E8, 4, ASYNC_SKIP_TEST, },
85 { BASE_BAUD, 0x2E8, 3, ASYNC_SKIP_TEST, },
86 #ifdef CONFIG_AST_FOURPORT
87 { BASE_BAUD, 0x1A0, 9, ASYNC_FOURPORT },
88 { BASE_BAUD, 0x1A8, 9, ASYNC_FOURPORT },
89 { BASE_BAUD, 0x1B0, 9, ASYNC_FOURPORT },
90 { BASE_BAUD, 0x1B8, 9, ASYNC_FOURPORT },
91
92 { BASE_BAUD, 0x2A0, 5, ASYNC_FOURPORT },
93 { BASE_BAUD, 0x2A8, 5, ASYNC_FOURPORT },
94 { BASE_BAUD, 0x2B0, 5, ASYNC_FOURPORT },
95 { BASE_BAUD, 0x2B8, 5, ASYNC_FOURPORT },
96 #else
97 { BASE_BAUD, 0x000, 0 },
98 { BASE_BAUD, 0x000, 0 },
99 { BASE_BAUD, 0x000, 0 },
100 { BASE_BAUD, 0x000, 0 },
101
102 { BASE_BAUD, 0x000, 0 },
103 { BASE_BAUD, 0x000, 0 },
104 { BASE_BAUD, 0x000, 0 },
105 { BASE_BAUD, 0x000, 0 },
106 #endif
107
108 #ifdef CONFIG_ACCENT_ASYNC
109 { BASE_BAUD, 0x330, 4, 0 },
110 { BASE_BAUD, 0x338, 4, 0 },
111 #else
112 { BASE_BAUD, 0x000, 0 },
113 { BASE_BAUD, 0x000, 0 },
114 #endif
115 { BASE_BAUD, 0x000, 0 },
116 { BASE_BAUD, 0x000, 0 },
117
118 { BASE_BAUD, 0x100, 12, 0 },
119 { BASE_BAUD, 0x108, 12, 0 },
120 { BASE_BAUD, 0x110, 12, 0 },
121 { BASE_BAUD, 0x118, 12, 0 },
122 { BASE_BAUD, 0x120, 12, 0 },
123 { BASE_BAUD, 0x128, 12, 0 },
124 { BASE_BAUD, 0x130, 12, 0 },
125 { BASE_BAUD, 0x138, 12, 0 },
126 { BASE_BAUD, 0x140, 12, 0 },
127 { BASE_BAUD, 0x148, 12, 0 },
128 { BASE_BAUD, 0x150, 12, 0 },
129 { BASE_BAUD, 0x158, 12, 0 },
130 { BASE_BAUD, 0x160, 12, 0 },
131 { BASE_BAUD, 0x168, 12, 0 },
132 { BASE_BAUD, 0x170, 12, 0 },
133 { BASE_BAUD, 0x178, 12, 0 },
134 };
135
136 #define NR_PORTS (sizeof(rs_table)/sizeof(struct async_struct))
137
138
139
140
141 static int baud_table[] = {
142 0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400, 4800,
143 9600, 19200, 38400, 57600, 115200, 0 };
144
145 static void rs_throttle(struct tty_struct * tty, int status);
146
147 static inline unsigned int serial_in(struct async_struct *info, int offset)
148 {
149 return inb(info->port + offset);
150 }
151
152 static inline unsigned int serial_inp(struct async_struct *info, int offset)
153 {
154 return inb_p(info->port + offset);
155 }
156
157 static inline void serial_out(struct async_struct *info, int offset, int value)
158 {
159 outb(value, info->port+offset);
160 }
161
162 static inline void serial_outp(struct async_struct *info, int offset,
163 int value)
164 {
165 outb_p(value, info->port+offset);
166 }
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192
193 static inline void rs_sched_event(struct async_struct *info,
194 int event)
195 {
196 info->event |= 1 << event;
197 set_bit(info->line, rs_event);
198 mark_bh(SERIAL_BH);
199 }
200
201 static inline void receive_chars(struct async_struct *info,
202 int *status)
203 {
204 struct tty_queue * queue;
205 int head, tail, ch;
206
207
208
209
210
211 #define VLEFT ((tail-head-1)&(TTY_BUF_SIZE-1))
212
213 queue = &info->tty->read_q;
214 head = queue->head;
215 tail = queue->tail;
216 do {
217 ch = serial_in(info, UART_RX);
218
219
220
221
222 if (VLEFT < 2)
223 continue;
224 if (*status & info->read_status_mask) {
225 set_bit(head, &info->tty->readq_flags);
226 if (*status & (UART_LSR_BI)) {
227 queue->buf[head++]= TTY_BREAK;
228 rs_sched_event(info, RS_EVENT_BREAK);
229 } else if (*status & UART_LSR_PE)
230 queue->buf[head++]= TTY_PARITY;
231 else if (*status & UART_LSR_FE)
232 queue->buf[head++]= TTY_FRAME;
233 head &= TTY_BUF_SIZE-1;
234 }
235 queue->buf[head++] = ch;
236 head &= TTY_BUF_SIZE-1;
237 } while ((*status = serial_inp(info, UART_LSR)) & UART_LSR_DR);
238 queue->head = head;
239 if ((VLEFT < RQ_THRESHOLD_LW) && !set_bit(TTY_RQ_THROTTLED,
240 &info->tty->flags))
241 rs_throttle(info->tty, TTY_THROTTLE_RQ_FULL);
242 rs_sched_event(info, RS_EVENT_READ_PROCESS);
243 }
244
245 static inline void transmit_chars(struct async_struct *info, int *done_work)
246 {
247 struct tty_queue * queue;
248 int head, tail, count;
249
250 queue = &info->tty->write_q;
251 head = queue->head;
252 tail = queue->tail;
253 if (head==tail && !info->x_char)
254 return;
255 count = info->xmit_fifo_size;
256 if (info->x_char) {
257 serial_outp(info, UART_TX, info->x_char);
258 info->x_char = 0;
259 count--;
260 }
261 while (count-- && (tail != head)) {
262 serial_outp(info, UART_TX, queue->buf[tail++]);
263 tail &= TTY_BUF_SIZE-1;
264 }
265 queue->tail = tail;
266 if (VLEFT > WAKEUP_CHARS) {
267 rs_sched_event(info, RS_EVENT_WRITE_WAKEUP);
268 if (info->tty->write_data_cnt) {
269 set_bit(info->tty->line, &tty_check_write);
270 mark_bh(TTY_BH);
271 }
272 }
273 #ifdef SERIAL_INT_DEBUG
274 printk("THRE...");
275 #endif
276 (*done_work)++;
277 }
278
279 static inline int check_modem_status(struct async_struct *info)
280 {
281 int status;
282
283 status = serial_in(info, UART_MSR);
284
285 if ((status & UART_MSR_DDCD) && !C_LOCAL(info->tty)) {
286 if (status & UART_MSR_DCD)
287 rs_sched_event(info, RS_EVENT_OPEN_WAKEUP);
288 else
289 rs_sched_event(info, RS_EVENT_HANGUP);
290 }
291 if (C_RTSCTS(info->tty)) {
292 if (info->tty->stopped) {
293 if (status & UART_MSR_CTS) {
294 info->tty->stopped = 0;
295 return 1;
296 }
297 } else
298 info->tty->stopped = !(status & UART_MSR_CTS);
299 }
300 return 0;
301 }
302
303 static inline void figure_RS_timer(void)
304 {
305 int timeout = 6000;
306 int i, mask;
307
308 if (!IRQ_active)
309 return;
310 for (i=0, mask = 1; mask <= IRQ_active; i++, mask <<= 1) {
311 if (!(mask & IRQ_active))
312 continue;
313 if (IRQ_timer[i] < timeout)
314 timeout = IRQ_timer[i];
315 }
316 timer_table[RS_TIMER].expires = timeout;
317 timer_active |= 1 << RS_TIMER;
318 }
319
320
321
322
323
324 static void rs_interrupt(int irq)
325 {
326 int status;
327 struct async_struct * info;
328 int done, done_work, pass_number;
329
330 info = IRQ_ports[irq];
331 done = 1;
332 done_work = 0;
333 pass_number = 0;
334 while (info) {
335 if (!pass_number ||
336 !(serial_inp(info, UART_IIR) & UART_IIR_NO_INT)) {
337 done = 0;
338 status = serial_inp(info, UART_LSR);
339 if (status & UART_LSR_DR) {
340 receive_chars(info, &status);
341 done_work++;
342 }
343 recheck_write:
344 if ((status & UART_LSR_THRE) &&
345 !info->tty->stopped) {
346 transmit_chars(info, &done_work);
347 }
348 if (check_modem_status(info))
349 goto recheck_write;
350 }
351
352 info = info->next_port;
353 if (!info && !done) {
354 info = IRQ_ports[irq];
355 done = 1;
356 if (pass_number++ > 64)
357 break;
358 }
359 }
360 if (IRQ_ports[irq]) {
361 if (irq && !done_work)
362 IRQ_timer[irq] = jiffies + 1500;
363 else
364 IRQ_timer[irq] = jiffies + IRQ_timeout[irq];
365 IRQ_active |= 1 << irq;
366 }
367 figure_RS_timer();
368 }
369
370
371
372
373
374 static volatile int rs_irq_triggered;
375 static volatile int rs_triggered;
376
377 static void rs_probe(int irq)
378 {
379 rs_irq_triggered = irq;
380 rs_triggered |= 1 << irq;
381 return;
382 }
383
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389
390
391
392
393
394 static inline void handle_rs_break(struct async_struct *info)
395 {
396 if (info->flags & ASYNC_SAK)
397 do_SAK(info->tty);
398
399 if (I_BRKINT(info->tty)) {
400 flush_input(info->tty);
401 flush_output(info->tty);
402 if (info->tty->pgrp > 0)
403 kill_pg(info->tty->pgrp, SIGINT,1);
404 }
405 }
406
407
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411
412
413
414
415
416 static void do_softint(void *unused)
417 {
418 int i;
419 struct async_struct *info;
420
421 for (i = 0, info = rs_table; i < NR_PORTS; i++,info++) {
422 if (!clear_bit(i, rs_event)) {
423 if (!info->tty)
424 continue;
425 if (!clear_bit(RS_EVENT_READ_PROCESS, &info->event)) {
426 TTY_READ_FLUSH(info->tty);
427 }
428 if (!clear_bit(RS_EVENT_WRITE_WAKEUP, &info->event)) {
429 wake_up_interruptible(&info->tty->write_q.proc_list);
430 }
431 if (!clear_bit(RS_EVENT_HANGUP, &info->event)) {
432 tty_hangup(info->tty);
433 wake_up_interruptible(&info->open_wait);
434 info->flags &= ~(ASYNC_NORMAL_ACTIVE|
435 ASYNC_CALLOUT_ACTIVE);
436 }
437 if (!clear_bit(RS_EVENT_BREAK, &info->event))
438 handle_rs_break(info);
439 if (!clear_bit(RS_EVENT_OPEN_WAKEUP, &info->event)) {
440 wake_up_interruptible(&info->open_wait);
441 }
442 }
443 }
444 }
445
446
447
448
449
450
451
452
453 static void rs_timer(void)
454 {
455 int i, mask;
456 int timeout = 0;
457
458 for (i = 0, mask = 1; mask <= IRQ_active; i++, mask <<= 1) {
459 if ((mask & IRQ_active) && (IRQ_timer[i] <= jiffies)) {
460 IRQ_active &= ~mask;
461 if (i) {
462 cli();
463 rs_interrupt(i);
464 sti();
465 } else
466 rs_interrupt(i);
467 }
468 if (mask & IRQ_active) {
469 if (!timeout || (IRQ_timer[i] < timeout))
470 timeout = IRQ_timer[i];
471 }
472 }
473 if (timeout) {
474 timer_table[RS_TIMER].expires = timeout;
475 timer_active |= 1 << RS_TIMER;
476 }
477 }
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492
493 static void figure_IRQ_timeout(int irq)
494 {
495 struct async_struct *info;
496 int timeout = 6000;
497
498 info = IRQ_ports[irq];
499 if (!info) {
500 IRQ_timeout[irq] = 0;
501 return;
502 }
503 while (info) {
504 if (info->timeout < timeout)
505 timeout = info->timeout;
506 info = info->next_port;
507 }
508 if (!irq)
509 timeout = timeout / 2;
510 IRQ_timeout[irq] = timeout;
511 }
512
513 static void startup(struct async_struct * info)
514 {
515 unsigned short ICP;
516 unsigned long flags;
517
518 save_flags(flags); cli();
519
520
521
522
523 if (info->type == PORT_16550A)
524 serial_outp(info, UART_FCR, UART_FCR_CLEAR_CMD);
525
526
527
528
529 (void)serial_inp(info, UART_LSR);
530 (void)serial_inp(info, UART_RX);
531 (void)serial_inp(info, UART_IIR);
532 (void)serial_inp(info, UART_MSR);
533
534
535
536
537 serial_outp(info, UART_LCR, UART_LCR_WLEN8);
538 if (info->flags & ASYNC_FOURPORT)
539 serial_outp(info, UART_MCR, UART_MCR_DTR | UART_MCR_RTS);
540 else
541 serial_outp(info, UART_MCR,
542 UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2);
543
544
545
546
547 if (info->type == PORT_16550A) {
548 serial_outp(info, UART_FCR, UART_FCR_SETUP_CMD);
549 info->xmit_fifo_size = 16;
550 } else {
551 info->xmit_fifo_size = 1;
552 }
553
554
555
556
557 serial_outp(info, UART_IER, 0x0f);
558 if (info->flags & ASYNC_FOURPORT) {
559
560 ICP = (info->port & 0xFE0) | 0x01F;
561 outb_p(0x80, ICP);
562 (void) inb_p(ICP);
563 }
564
565
566
567
568 (void)serial_inp(info, UART_LSR);
569 (void)serial_inp(info, UART_RX);
570 (void)serial_inp(info, UART_IIR);
571 (void)serial_inp(info, UART_MSR);
572
573 info->flags |= ASYNC_INITIALIZED;
574 if (info->tty)
575 clear_bit(TTY_IO_ERROR, &info->tty->flags);
576
577
578
579 if (info->tty && info->tty->termios && I_INPCK(info->tty))
580 info->read_status_mask = UART_LSR_BI | UART_LSR_FE |
581 UART_LSR_PE;
582 else
583 info->read_status_mask = UART_LSR_BI | UART_LSR_FE;
584 restore_flags(flags);
585 }
586
587
588
589
590
591 static void shutdown(struct async_struct * info)
592 {
593 unsigned long flags;
594
595 save_flags(flags); cli();
596 serial_outp(info, UART_IER, 0x00);
597 if (info->tty && !(info->tty->termios->c_cflag & HUPCL))
598 serial_outp(info, UART_MCR, UART_MCR_DTR);
599 else
600
601 serial_outp(info, UART_MCR, 0x00);
602 serial_outp(info, UART_FCR, UART_FCR_CLEAR_CMD);
603 (void)serial_in(info, UART_RX);
604 info->flags &= ~ASYNC_INITIALIZED;
605 if (info->tty)
606 set_bit(TTY_IO_ERROR, &info->tty->flags);
607 restore_flags(flags);
608 }
609
610
611
612
613
614 static void change_speed(unsigned int line)
615 {
616 struct async_struct * info;
617 unsigned short port;
618 int quot = 0;
619 unsigned cflag,cval,mcr;
620 int i;
621
622 if (line >= NR_PORTS)
623 return;
624 info = rs_table + line;
625 if (!info->tty || !info->tty->termios)
626 return;
627 cflag = info->tty->termios->c_cflag;
628 if (!(port = info->port))
629 return;
630 i = cflag & CBAUD;
631 if (i == 15) {
632 if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_HI)
633 i += 1;
634 if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_VHI)
635 i += 2;
636 if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST)
637 quot = info->custom_divisor;
638 }
639 if (quot) {
640 info->timeout = ((info->xmit_fifo_size*HZ*15*quot) /
641 info->baud_base) + 2;
642 } else if (baud_table[i] == 134) {
643 quot = (2*info->baud_base / 269);
644 info->timeout = (info->xmit_fifo_size*HZ*30/269) + 2;
645 } else if (baud_table[i]) {
646 quot = info->baud_base / baud_table[i];
647 info->timeout = (info->xmit_fifo_size*HZ*15/baud_table[i]) + 2;
648 } else {
649 quot = 0;
650 info->timeout = 0;
651 }
652 mcr = serial_in(info, UART_MCR);
653 if (quot)
654 serial_out(info, UART_MCR, mcr | UART_MCR_DTR);
655 else {
656 serial_out(info, UART_MCR, mcr & ~UART_MCR_DTR);
657 return;
658 }
659
660 cval = cflag & (CSIZE | CSTOPB);
661 cval >>= 4;
662 if (cflag & PARENB)
663 cval |= UART_LCR_PARITY;
664 if (!(cflag & PARODD))
665 cval |= UART_LCR_EPAR;
666 cli();
667 serial_outp(info, UART_LCR, cval | UART_LCR_DLAB);
668 serial_outp(info, UART_DLL, quot & 0xff);
669 serial_outp(info, UART_DLM, quot >> 8);
670 serial_outp(info, UART_LCR, cval);
671 sti();
672 }
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687 static void restart_port(struct async_struct *info)
688 {
689 struct tty_queue * queue;
690 int head, tail, count;
691
692 if (serial_inp(info, UART_LSR) & UART_LSR_THRE) {
693 if (info->x_char) {
694 serial_outp(info, UART_TX, info->x_char);
695 info->x_char = 0;
696 } else {
697 queue = &info->tty->write_q;
698 head = queue->head;
699 tail = queue->tail;
700 count = info->xmit_fifo_size;
701 while (count--) {
702 if (tail == head)
703 break;
704 serial_outp(info, UART_TX, queue->buf[tail++]);
705 tail &= TTY_BUF_SIZE-1;
706 }
707 queue->tail = tail;
708 }
709 }
710 }
711
712
713
714
715
716 void rs_write(struct tty_struct * tty)
717 {
718 struct async_struct *info;
719
720 if (!tty || tty->stopped)
721 return;
722 info = rs_table + DEV_TO_SL(tty->line);
723 cli();
724 restart_port(info);
725 sti();
726 }
727
728
729
730
731
732
733
734
735
736
737 static void rs_throttle(struct tty_struct * tty, int status)
738 {
739 struct async_struct *info;
740 unsigned char mcr;
741
742 #ifdef notdef
743 printk("throttle tty%d: %d (%d, %d)....\n", DEV_TO_SL(tty->line),
744 status, LEFT(&tty->read_q), LEFT(&tty->secondary));
745 #endif
746 switch (status) {
747 case TTY_THROTTLE_RQ_FULL:
748 info = rs_table + DEV_TO_SL(tty->line);
749 if (tty->termios->c_iflag & IXOFF) {
750 info->x_char = STOP_CHAR(tty);
751 } else {
752 mcr = serial_inp(info, UART_MCR);
753 mcr &= ~UART_MCR_RTS;
754 serial_out(info, UART_MCR, mcr);
755 }
756 break;
757 case TTY_THROTTLE_RQ_AVAIL:
758 info = rs_table + DEV_TO_SL(tty->line);
759 if (tty->termios->c_iflag & IXOFF) {
760 cli();
761 if (info->x_char)
762 info->x_char = 0;
763 else
764 info->x_char = START_CHAR(tty);
765 sti();
766 } else {
767 mcr = serial_in(info, UART_MCR);
768 mcr |= UART_MCR_RTS;
769 serial_out(info, UART_MCR, mcr);
770 }
771 break;
772 }
773 }
774
775
776
777
778
779
780
781 static int get_serial_info(struct async_struct * info,
782 struct serial_struct * retinfo)
783 {
784 struct serial_struct tmp;
785
786 if (!retinfo)
787 return -EFAULT;
788 memset(&tmp, 0, sizeof(tmp));
789 tmp.type = info->type;
790 tmp.line = info->line;
791 tmp.port = info->port;
792 tmp.irq = info->irq;
793 tmp.flags = info->flags;
794 tmp.baud_base = info->baud_base;
795 tmp.close_delay = info->close_delay;
796 memcpy_tofs(retinfo,&tmp,sizeof(*retinfo));
797 return 0;
798 }
799
800 static int set_serial_info(struct async_struct * info,
801 struct serial_struct * new_info)
802 {
803 struct serial_struct new;
804 unsigned int irq,check_irq;
805 int retval;
806 struct sigaction sa;
807 struct async_struct old_info;
808
809 if (!new_info)
810 return -EFAULT;
811 memcpy_fromfs(&new,new_info,sizeof(new));
812
813 check_irq = 0;
814 old_info = *info;
815 if (!suser()) {
816 info->flags = ((info->flags & ~ASYNC_SPD_MASK) |
817 (new.flags & ASYNC_SPD_MASK));
818 info->custom_divisor = new.custom_divisor;
819 new.port = 0;
820 goto check_and_exit;
821 }
822
823 if ((new.irq > 15) || (new.port > 0xffff) ||
824 (new.type < PORT_UNKNOWN) || (new.type > PORT_MAX)) {
825 return -EINVAL;
826 }
827
828 info->baud_base = new.baud_base;
829 info->flags = ((info->flags & ~ASYNC_FLAGS) |
830 (new.flags & ASYNC_FLAGS));
831 info->custom_divisor = new.custom_divisor;
832 info->type = new.type;
833 info->close_delay = new.close_delay;
834
835 if (new.irq == 2)
836 new.irq = 9;
837 irq = info->irq;
838 if (irq == 2)
839 irq = 9;
840
841
842
843
844
845
846 if (new.port && info->type &&
847 ((irq != new.irq) || !(info->flags & ASYNC_INITIALIZED))) {
848 if (new.irq && !IRQ_ports[new.irq]) {
849 sa.sa_handler = rs_interrupt;
850 sa.sa_flags = (SA_INTERRUPT);
851 sa.sa_mask = 0;
852 sa.sa_restorer = NULL;
853 retval = irqaction(new.irq,&sa);
854 if (retval) {
855 *info = old_info;
856 return retval;
857 }
858 }
859 }
860
861 if ((new.irq != irq) ||
862 (new.port != info->port)) {
863
864
865
866
867 if (info->flags & ASYNC_INITIALIZED) {
868 shutdown(info);
869 if (info->next_port)
870 info->next_port->prev_port = info->prev_port;
871 if (info->prev_port)
872 info->prev_port->next_port = info->next_port;
873 else
874 IRQ_ports[irq] = info->next_port;
875 figure_IRQ_timeout(irq);
876 check_irq = irq;
877
878 }
879 info->irq = new.irq;
880 info->port = new.port;
881 }
882
883 check_and_exit:
884 if (new.port && info->type &&
885 !(info->flags & ASYNC_INITIALIZED)) {
886
887
888
889 info->prev_port = 0;
890 info->next_port = IRQ_ports[info->irq];
891 if (info->next_port)
892 info->next_port->prev_port = info;
893 IRQ_ports[info->irq] = info;
894 figure_IRQ_timeout(info->irq);
895 startup(info);
896 change_speed(info->line);
897 } else if (((old_info.flags & ASYNC_SPD_MASK) !=
898 (info->flags & ASYNC_SPD_MASK)) ||
899 (old_info.custom_divisor != info->custom_divisor))
900 change_speed(info->line);
901
902 if (check_irq && !IRQ_ports[check_irq])
903 free_irq(check_irq);
904
905 return 0;
906 }
907
908 static int get_modem_info(struct async_struct * info, unsigned int *value)
909 {
910 unsigned char control, status;
911 unsigned int result;
912
913 control = serial_in(info, UART_MCR);
914 status = serial_in(info, UART_MSR);
915 result = ((control & UART_MCR_RTS) ? TIOCM_RTS : 0)
916 | ((control & UART_MCR_DTR) ? TIOCM_DTR : 0)
917 | ((status & UART_MSR_DCD) ? TIOCM_CAR : 0)
918 | ((status & UART_MSR_RI) ? TIOCM_RNG : 0)
919 | ((status & UART_MSR_DSR) ? TIOCM_DSR : 0)
920 | ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
921 put_fs_long(result,(unsigned long *) value);
922 return 0;
923 }
924
925 static int set_modem_info(struct async_struct * info, unsigned int cmd,
926 unsigned int *value)
927 {
928 unsigned char control;
929 unsigned int arg = get_fs_long((unsigned long *) value);
930
931 control = serial_in(info, UART_MCR);
932
933 switch (cmd) {
934 case TIOCMBIS:
935 if (arg & TIOCM_RTS)
936 control |= UART_MCR_RTS;
937 if (arg & TIOCM_DTR)
938 control |= UART_MCR_DTR;
939 break;
940 case TIOCMBIC:
941 if (arg & TIOCM_RTS)
942 control &= ~UART_MCR_RTS;
943 if (arg & TIOCM_DTR)
944 control &= ~UART_MCR_DTR;
945 break;
946 case TIOCMSET:
947 control = (control & ~0x03)
948 | ((arg & TIOCM_RTS) ? UART_MCR_RTS : 0)
949 | ((arg & TIOCM_DTR) ? UART_MCR_DTR : 0);
950 break;
951 default:
952 return -EINVAL;
953 }
954 serial_out(info, UART_MCR, control);
955 return 0;
956 }
957
958
959
960
961 static void send_break( struct async_struct * info, int duration)
962 {
963 if (!info->port)
964 return;
965 current->state = TASK_INTERRUPTIBLE;
966 current->timeout = jiffies + duration;
967 serial_out(info, UART_LCR, serial_inp(info, UART_LCR) | UART_LCR_SBC);
968 schedule();
969 serial_out(info, UART_LCR, serial_inp(info, UART_LCR) & ~UART_LCR_SBC);
970 }
971
972 static int rs_ioctl(struct tty_struct *tty, struct file * file,
973 unsigned int cmd, unsigned long arg)
974 {
975 int error, line;
976 struct async_struct * info;
977
978 line = DEV_TO_SL(tty->line);
979 if (line < 0 || line >= NR_PORTS)
980 return -ENODEV;
981 info = rs_table + line;
982
983 switch (cmd) {
984 case TCSBRK:
985 wait_until_sent(tty);
986 if (!arg)
987 send_break(info, HZ/4);
988 return 0;
989 case TCSBRKP:
990 wait_until_sent(tty);
991 send_break(info, arg ? arg*(HZ/10) : HZ/4);
992 return 0;
993 case TIOCGSOFTCAR:
994 error = verify_area(VERIFY_WRITE, (void *) arg,sizeof(unsigned int *));
995 if (error)
996 return error;
997 put_fs_long(C_LOCAL(tty) ? 1 : 0,
998 (unsigned long *) arg);
999 return 0;
1000 case TIOCSSOFTCAR:
1001 arg = get_fs_long((unsigned long *) arg);
1002 tty->termios->c_cflag =
1003 ((tty->termios->c_cflag & ~CLOCAL) |
1004 (arg ? CLOCAL : 0));
1005 return 0;
1006 case TIOCMGET:
1007 error = verify_area(VERIFY_WRITE, (void *) arg,sizeof(unsigned int *));
1008 if (error)
1009 return error;
1010 return get_modem_info(info, (unsigned int *) arg);
1011 case TIOCMBIS:
1012 case TIOCMBIC:
1013 case TIOCMSET:
1014 return set_modem_info(info, cmd, (unsigned int *) arg);
1015 case TIOCGSERIAL:
1016 error = verify_area(VERIFY_WRITE, (void *) arg,
1017 sizeof(struct serial_struct));
1018 if (error)
1019 return error;
1020 return get_serial_info(info,
1021 (struct serial_struct *) arg);
1022 case TIOCSSERIAL:
1023 return set_serial_info(info,
1024 (struct serial_struct *) arg);
1025
1026 default:
1027 return -EINVAL;
1028 }
1029 return 0;
1030 }
1031
1032 static void rs_set_termios(struct tty_struct *tty, struct termios *old_termios)
1033 {
1034 struct async_struct *info;
1035
1036 if (tty->termios->c_cflag == old_termios->c_cflag)
1037 return;
1038
1039 info = &rs_table[DEV_TO_SL(tty->line)];
1040
1041 change_speed(DEV_TO_SL(tty->line));
1042
1043 if ((old_termios->c_cflag & CRTSCTS) &&
1044 !(tty->termios->c_cflag & CRTSCTS)) {
1045 tty->stopped = 0;
1046 rs_write(tty);
1047 }
1048
1049 if (!(old_termios->c_cflag & CLOCAL) &&
1050 (tty->termios->c_cflag & CLOCAL))
1051 wake_up_interruptible(&info->open_wait);
1052
1053 if (I_INPCK(tty))
1054 info->read_status_mask = UART_LSR_BI | UART_LSR_FE |
1055 UART_LSR_PE;
1056 else
1057 info->read_status_mask = UART_LSR_BI | UART_LSR_FE;
1058 }
1059
1060
1061
1062
1063
1064
1065
1066
1067
1068
1069
1070 static void rs_close(struct tty_struct *tty, struct file * filp)
1071 {
1072 struct async_struct * info;
1073 int irq, line;
1074
1075 line = DEV_TO_SL(tty->line);
1076 if ((line < 0) || (line >= NR_PORTS))
1077 return;
1078 info = rs_table + line;
1079 #ifdef SERIAL_DEBUG_OPEN
1080 printk("rs_close ttys%d, count = %d\n", info->line, info->count);
1081 #endif
1082 if (--info->count > 0)
1083 return;
1084 tty->stopped = 0;
1085 wait_until_sent(tty);
1086 clear_bit(line, rs_event);
1087 info->event = 0;
1088 info->count = 0;
1089 info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CALLOUT_ACTIVE);
1090 if (info->blocked_open) {
1091 shutdown(info);
1092 if (info->close_delay) {
1093 current->state = TASK_INTERRUPTIBLE;
1094 current->timeout = jiffies + info->close_delay;
1095 schedule();
1096 }
1097 startup(info);
1098 return;
1099 }
1100 if (info->flags & ASYNC_INITIALIZED) {
1101 shutdown(info);
1102 irq = info->irq;
1103 if (irq == 2)
1104 irq = 9;
1105 if (info->next_port)
1106 info->next_port->prev_port = info->prev_port;
1107 if (info->prev_port)
1108 info->prev_port->next_port = info->next_port;
1109 else
1110 IRQ_ports[irq] = info->next_port;
1111 if (irq && !IRQ_ports[irq])
1112 free_irq(irq);
1113 figure_IRQ_timeout(irq);
1114 }
1115 info->tty = 0;
1116 }
1117
1118
1119
1120
1121
1122
1123 static int block_til_ready(struct tty_struct *tty, struct file * filp,
1124 struct async_struct *info)
1125 {
1126 struct wait_queue wait = { current, NULL };
1127 int retval;
1128
1129
1130
1131
1132
1133 if (MAJOR(filp->f_rdev) == 5) {
1134 if (info->flags & ASYNC_NORMAL_ACTIVE)
1135 return -EBUSY;
1136 info->flags |= ASYNC_CALLOUT_ACTIVE;
1137 return 0;
1138 }
1139
1140
1141
1142
1143
1144 if (filp->f_flags & O_NONBLOCK) {
1145 if (info->flags & ASYNC_CALLOUT_ACTIVE)
1146 return -EBUSY;
1147 info->flags |= ASYNC_NORMAL_ACTIVE;
1148 return 0;
1149 }
1150
1151
1152
1153
1154
1155
1156
1157
1158 retval = 0;
1159 add_wait_queue(&info->open_wait, &wait);
1160 #ifdef SERIAL_DEBUG_OPEN
1161 printk("block_til_ready before block: ttys%d, count = %d\n",
1162 info->line, info->count);
1163 #endif
1164 info->count--;
1165 info->blocked_open++;
1166 while (1) {
1167 serial_out(info, UART_MCR,
1168 serial_inp(info, UART_MCR) | UART_MCR_DTR);
1169 current->state = TASK_INTERRUPTIBLE;
1170 if (tty_hung_up_p(filp)) {
1171 if (info->flags & ASYNC_HUP_NOTIFY)
1172 retval = -EAGAIN;
1173 else
1174 retval = -ERESTARTNOINTR;
1175 break;
1176 }
1177 if (!(info->flags & ASYNC_CALLOUT_ACTIVE) &&
1178 (C_LOCAL(tty) ||
1179 (serial_in(info, UART_MSR) & UART_MSR_DCD)))
1180 break;
1181 if (current->signal & ~current->blocked) {
1182 retval = -ERESTARTSYS;
1183 break;
1184 }
1185 #ifdef SERIAL_DEBUG_OPEN
1186 printk("block_til_ready blocking: ttys%d, count = %d\n",
1187 info->line, info->count);
1188 #endif
1189 schedule();
1190 }
1191 current->state = TASK_RUNNING;
1192 remove_wait_queue(&info->open_wait, &wait);
1193 info->count++;
1194 info->blocked_open--;
1195 #ifdef SERIAL_DEBUG_OPEN
1196 printk("block_til_ready after blocking: ttys%d, count = %d\n",
1197 info->line, info->count);
1198 #endif
1199 if (retval)
1200 return retval;
1201 info->flags |= ASYNC_NORMAL_ACTIVE;
1202 return 0;
1203 }
1204
1205
1206
1207
1208
1209
1210
1211 int rs_open(struct tty_struct *tty, struct file * filp)
1212 {
1213 struct async_struct *info;
1214 int irq, retval, line;
1215 struct sigaction sa;
1216
1217 line = DEV_TO_SL(tty->line);
1218 if ((line < 0) || (line >= NR_PORTS))
1219 return -ENODEV;
1220 info = rs_table + line;
1221 #ifdef SERIAL_DEBUG_OPEN
1222 printk("rs_open ttys%d, count = %d\n", info->line, info->count);
1223 #endif
1224 info->count++;
1225 info->tty = tty;
1226
1227 tty->write = rs_write;
1228 tty->close = rs_close;
1229 tty->ioctl = rs_ioctl;
1230 tty->throttle = rs_throttle;
1231 tty->set_termios = rs_set_termios;
1232
1233 if (!(info->flags & ASYNC_INITIALIZED)) {
1234 if (!info->port || !info->type) {
1235 set_bit(TTY_IO_ERROR, &tty->flags);
1236 return 0;
1237 }
1238 irq = info->irq;
1239 if (irq == 2)
1240 irq = 9;
1241 if (irq && !IRQ_ports[irq]) {
1242 sa.sa_handler = rs_interrupt;
1243 sa.sa_flags = (SA_INTERRUPT);
1244 sa.sa_mask = 0;
1245 sa.sa_restorer = NULL;
1246 retval = irqaction(irq,&sa);
1247 if (retval)
1248 return retval;
1249 }
1250
1251
1252
1253 info->prev_port = 0;
1254 info->next_port = IRQ_ports[irq];
1255 if (info->next_port)
1256 info->next_port->prev_port = info;
1257 IRQ_ports[irq] = info;
1258 figure_IRQ_timeout(irq);
1259
1260 startup(info);
1261 change_speed(info->line);
1262 if (!irq) {
1263 cli();
1264 figure_RS_timer();
1265 sti();
1266 }
1267 }
1268
1269 retval = block_til_ready(tty, filp, info);
1270 if (retval)
1271 return retval;
1272
1273 return 0;
1274 }
1275
1276
1277
1278
1279
1280
1281
1282
1283
1284
1285
1286
1287
1288
1289 static void show_serial_version(void)
1290 {
1291 printk("Serial driver version 3.94 with");
1292 #ifdef CONFIG_AST_FOURPORT
1293 printk(" AST_FOURPORT");
1294 #define SERIAL_OPT
1295 #endif
1296 #ifdef CONFIG_ACCENT_ASYNC
1297 printk(" ACCENT_ASYNC");
1298 #define SERIAL_OPT
1299 #endif
1300 #ifdef CONFIG_AUTO_IRQ
1301 printk (" AUTO_IRQ");
1302 #define SERIAL_OPT
1303 #endif
1304 #ifdef SERIAL_OPT
1305 printk(" enabled\n");
1306 #else
1307 printk(" no serial options enabled\n");
1308 #endif
1309 #undef SERIAL_OPT
1310 }
1311
1312
1313
1314
1315
1316
1317 static int get_auto_irq(struct async_struct *info)
1318 {
1319 unsigned char save_MCR, save_IER, save_ICP=0;
1320 unsigned short ICP=0, port = info->port;
1321 unsigned long timeout;
1322
1323
1324
1325
1326 rs_irq_triggered = 0;
1327 save_IER = serial_inp(info, UART_IER);
1328 save_MCR = serial_inp(info, UART_MCR);
1329 if (info->flags & ASYNC_FOURPORT) {
1330 serial_outp(info, UART_MCR, UART_MCR_DTR | UART_MCR_RTS);
1331 serial_outp(info, UART_IER, 0x0f);
1332 ICP = (port & 0xFE0) | 0x01F;
1333 save_ICP = inb_p(ICP);
1334 outb_p(0x80, ICP);
1335 (void) inb_p(ICP);
1336 } else {
1337 serial_outp(info, UART_MCR,
1338 UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2);
1339 serial_outp(info, UART_IER, 0x0f);
1340 }
1341
1342
1343
1344 (void)serial_inp(info, UART_LSR);
1345 (void)serial_inp(info, UART_RX);
1346 (void)serial_inp(info, UART_IIR);
1347 (void)serial_inp(info, UART_MSR);
1348
1349 timeout = jiffies+2;
1350 while (timeout >= jiffies) {
1351 if (rs_irq_triggered)
1352 break;
1353 }
1354
1355
1356
1357 serial_outp(info, UART_IER, save_IER);
1358 serial_outp(info, UART_MCR, save_MCR);
1359 if (info->flags & ASYNC_FOURPORT)
1360 outb_p(save_ICP, ICP);
1361 return(rs_irq_triggered);
1362 }
1363
1364
1365
1366
1367
1368
1369
1370
1371
1372
1373
1374
1375 static void init(struct async_struct * info)
1376 {
1377 unsigned char status1, status2, scratch, scratch2;
1378 unsigned port = info->port;
1379 int retries;
1380
1381 if (!port)
1382 return;
1383
1384
1385
1386
1387
1388 scratch = serial_inp(info, UART_IER);
1389 serial_outp(info, UART_IER, 0);
1390 scratch2 = serial_inp(info, UART_IER);
1391 serial_outp(info, UART_IER, scratch);
1392 if (scratch2)
1393 return;
1394
1395
1396
1397
1398
1399
1400
1401
1402
1403
1404 if (!(info->flags & ASYNC_SKIP_TEST)) {
1405 scratch = serial_inp(info, UART_MCR);
1406 serial_outp(info, UART_MCR, UART_MCR_LOOP | scratch);
1407 scratch2 = serial_inp(info, UART_MSR);
1408 serial_outp(info, UART_MCR, UART_MCR_LOOP | 0x0A);
1409 status1 = serial_inp(info, UART_MSR) & 0xF0;
1410 serial_outp(info, UART_MCR, scratch);
1411 serial_outp(info, UART_MSR, scratch2);
1412 if (status1 != 0x90) {
1413 info->type = PORT_UNKNOWN;
1414 return;
1415 }
1416 }
1417
1418
1419
1420
1421
1422
1423
1424
1425
1426 scratch = scratch2 = 0;
1427 for (retries = 0; retries < 5; retries++) {
1428 if (!scratch)
1429 scratch = get_auto_irq(info);
1430 if (!scratch2)
1431 scratch2 = get_auto_irq(info);
1432 if (scratch && scratch2) {
1433 if (scratch == scratch2)
1434 break;
1435 scratch = scratch2 = 0;
1436 }
1437 }
1438 if (scratch && (scratch == scratch2)) {
1439 #ifdef CONFIG_AUTO_IRQ
1440 info->irq = scratch;
1441 #else
1442 if (info->irq != scratch)
1443 printk("Warning: auto IRQ detection for tty%d found IRQ %d, not %d.\n",
1444 info->line, scratch, info->irq);
1445 #endif
1446 } else {
1447 #ifdef CONFIG_AUTO_IRQ
1448 info->type = PORT_UNKNOWN;
1449 return;
1450 #else
1451 printk("Warning: auto IRQ detection for tty%d failed; using default IRQ.\n", info->line);
1452 #endif
1453 }
1454
1455 outb_p(UART_FCR_ENABLE_FIFO, UART_FCR + port);
1456 scratch = inb(UART_IIR + port) >> 6;
1457 info->xmit_fifo_size = 1;
1458 switch (scratch) {
1459 case 0:
1460 info->type = PORT_16450;
1461 break;
1462 case 1:
1463 info->type = PORT_UNKNOWN;
1464 break;
1465 case 2:
1466 info->type = PORT_16550;
1467 break;
1468 case 3:
1469 info->type = PORT_16550A;
1470 info->xmit_fifo_size = 16;
1471 break;
1472 }
1473 if (info->type == PORT_16450) {
1474 scratch = inb(UART_SCR + port);
1475 outb_p(0xa5, UART_SCR + port);
1476 status1 = inb(UART_SCR + port);
1477 outb_p(0x5a, UART_SCR + port);
1478 status2 = inb(UART_SCR + port);
1479 outb_p(scratch, UART_SCR + port);
1480 if ((status1 != 0xa5) || (status2 != 0x5a))
1481 info->type = PORT_8250;
1482 }
1483 shutdown(info);
1484 }
1485
1486
1487
1488
1489 long rs_init(long kmem_start)
1490 {
1491 int i;
1492 struct async_struct * info;
1493 int irq_lines = 0;
1494 struct sigaction sa;
1495 unsigned long timeout;
1496
1497
1498
1499
1500 sti();
1501
1502 sa.sa_handler = rs_probe;
1503 sa.sa_flags = (SA_INTERRUPT);
1504 sa.sa_mask = 0;
1505 sa.sa_restorer = NULL;
1506
1507 memset(&rs_event, 0, sizeof(rs_event));
1508 bh_base[SERIAL_BH].routine = do_softint;
1509 timer_table[RS_TIMER].fn = rs_timer;
1510 timer_table[RS_TIMER].expires = 0;
1511 IRQ_active = 0;
1512
1513 rs_triggered = 0;
1514 for (i = 0; i < 16; i++) {
1515 IRQ_ports[i] = 0;
1516 IRQ_timeout[i] = 0;
1517 if (!irqaction(i, &sa))
1518 irq_lines |= 1 << i;
1519 }
1520
1521 timeout = jiffies+10;
1522 while (timeout >= jiffies)
1523 ;
1524 for (i = 0; i < 16; i++) {
1525 if ((rs_triggered & (1 << i)) &&
1526 (irq_lines & (1 << i))) {
1527 irq_lines &= ~(1 << i);
1528 printk("Wild interrupt? (IRQ %d)\n", i);
1529 free_irq(i);
1530 }
1531 }
1532
1533 show_serial_version();
1534 for (i = 0, info = rs_table; i < NR_PORTS; i++,info++) {
1535 info->line = i;
1536 info->tty = 0;
1537 info->type = PORT_UNKNOWN;
1538 info->custom_divisor = 0;
1539 info->close_delay = 50;
1540 info->x_char = 0;
1541 info->event = 0;
1542 info->count = 0;
1543 info->blocked_open = 0;
1544 info->open_wait = 0;
1545 info->next_port = 0;
1546 info->prev_port = 0;
1547 init(info);
1548 if (info->type == PORT_UNKNOWN)
1549 continue;
1550 printk("tty%02d%s at 0x%04x (irq = %d)", info->line,
1551 (info->flags & ASYNC_FOURPORT) ? " FourPort" : "",
1552 info->port, info->irq);
1553 switch (info->type) {
1554 case PORT_8250:
1555 printk(" is a 8250\n");
1556 break;
1557 case PORT_16450:
1558 printk(" is a 16450\n");
1559 break;
1560 case PORT_16550:
1561 printk(" is a 16550\n");
1562 break;
1563 case PORT_16550A:
1564 printk(" is a 16550A\n");
1565 break;
1566 default:
1567 printk("\n");
1568 break;
1569 }
1570 }
1571
1572
1573
1574
1575 cli();
1576 for (i = 0; i < 16; i++) {
1577 if (irq_lines & (1 << i))
1578 free_irq(i);
1579 }
1580 return kmem_start;
1581 }
1582