drivers/scsi/t128.h

/* */
   1 /*
   2  * Trantor T128/T128F/T228 defines
   3  *      Note : architecturally, the T100 and T128 are different and won't work
   4  *
   5  * Copyright 1993, Drew Eckhardt
   6  *      Visionary Computing
   7  *      (Unix and Linux consulting and custom programming)
   8  *      drew@colorado.edu
   9  *      +1 (303) 440-4894
  10  *
  11  * DISTRIBUTION RELEASE 3. 
  12  *
  13  * For more information, please consult 
  14  *
  15  * Trantor Systems, Ltd.
  16  * T128/T128F/T228 SCSI Host Adapter
  17  * Hardware Specifications
  18  * 
  19  * Trantor Systems, Ltd. 
  20  * 5415 Randall Place
  21  * Fremont, CA 94538
  22  * 1+ (415) 770-1400, FAX 1+ (415) 770-9910
  23  * 
  24  * and 
  25  *
  26  * NCR 5380 Family
  27  * SCSI Protocol Controller
  28  * Databook
  29  *
  30  * NCR Microelectronics
  31  * 1635 Aeroplaza Drive
  32  * Colorado Springs, CO 80916
  33  * 1+ (719) 578-3400
  34  * 1+ (800) 334-5454
  35  */
  36 
  37 /*
  38  * $Log: t128.h,v $
  39  */
  40 
  41 #ifndef T128_H
  42 #define T128_H
  43 
  44 #define T128_PUBLIC_RELEASE 3
  45 
  46 #define TDEBUG_INIT     0x1
  47 #define TDEBUG_TRANSFER 0x2
  48 
  49 /*
  50  * The trantor boards are memory mapped. They use an NCR5380 or 
  51  * equivalent (my sample board had part second sourced from ZILOG).
  52  * NCR's recommended "Pseudo-DMA" architecture is used, where 
  53  * a PAL drives the DMA signals on the 5380 allowing fast, blind
  54  * transfers with propper handshaking. 
  55  */
  56 
  57 /*
  58  * Note : a boot switch is provided for the purpose of informing the 
  59  * firmware to boot or not boot from attached SCSI devices.  So, I imagine
  60  * there are fewer people who've yanked the ROM like they do on the Seagate
  61  * to make bootup faster, and I'll probably use this for autodetection.
  62  */
  63 #define T_ROM_OFFSET            0
  64 
  65 /*
  66  * Note : my sample board *WAS NOT* populated with the SRAM, so this
  67  * can't be used for autodetection without a ROM present.
  68  */
  69 #define T_RAM_OFFSET            0x1800
  70 
  71 /*
  72  * All of the registers are allocated 32 bytes of address space, except
  73  * for the data register (read/write to/from the 5380 in pseudo-DMA mode)
  74  */ 
  75 #define T_CONTROL_REG_OFFSET    0x1c00  /* rw */
  76 #define T_CR_INT                0x10    /* Enable interrupts */
  77 #define T_CR_CT                 0x02    /* Reset watchdog timer */
  78 
  79 #define T_STATUS_REG_OFFSET     0x1c20  /* ro */
  80 #define T_ST_BOOT               0x80    /* Boot switch */
  81 #define T_ST_S3                 0x40    /* User setable switches, */
  82 #define T_ST_S2                 0x20    /* read 0 when switch is on, 1 off */
  83 #define T_ST_S1                 0x10
  84 #define T_ST_PS2                0x08    /* Set for Microchannel 228 */
  85 #define T_ST_RDY                0x04    /* 5380 DRQ */
  86 #define T_ST_TIM                0x02    /* indicates 40us watchdog timer fired */
  87 #define T_ST_ZERO               0x01    /* Allways zero */
  88 
  89 #define T_5380_OFFSET           0x1d00  /* 8 registers here, see NCR5380.h */
  90 
  91 #define T_DATA_REG_OFFSET       0x1e00  /* rw 512 bytes long */
  92 
  93 #ifndef ASM
  94 int t128_abort(Scsi_Cmnd *, int);
  95 int t128_biosparam(int, int, int*);
  96 int t128_detect(int);
  97 const char *t128_info(void);
  98 int t128_queue_command(Scsi_Cmnd *, void (*done)(Scsi_Cmnd *));
  99 int t128_reset(Scsi_Cmnd *);
 100 
 101 #ifndef NULL
 102 #define NULL 0
 103 #endif
 104 
 105 #ifndef CMD_PER_LUN
 106 #define CMD_PER_LUN 2
 107 #endif
 108 
 109 #ifndef CAN_QUEUE
 110 #define CAN_QUEUE 32 
 111 #endif
 112 
 113 /* 
 114  * I hadn't thought of this with the earlier drivers - but to prevent
 115  * macro definition conflicts, we shouldn't define all of the internal
 116  * macros when this is being used solely for the host stub.
 117  */
 118 
 119 #ifdef HOSTS_C
 120 
 121 #define TRANTOR_T128 {"Trantor T128/T128F/T228", t128_detect, t128_info,\
 122         NULL, t128_queue_command, t128_abort, t128_reset, NULL,         \
 123         t128_biosparam,                                                 \
 124         /* can queue */ CAN_QUEUE, /* id */ 7, SG_ALL,                  \
 125         /* cmd per lun */ CMD_PER_LUN , 0, 0}
 126 
 127 #else
 128 
 129 #define NCR5380_implementation_fields \
 130     volatile unsigned char *base
 131 
 132 #define NCR5380_local_declare() \
 133     volatile unsigned char *base
 134 
 135 #define NCR5380_setup(instance) \
 136     base = (volatile unsigned char *) (instance)->base
 137 
 138 #define T128_address(reg) (base + T_5380_OFFSET + ((reg) * 0x20))
 139 
 140 #if !(TDEBUG & TDEBUG_TRANSFER) 
 141 #define NCR5380_read(reg) (*(T128_address(reg)))
 142 #define NCR5380_write(reg, value) (*(T128_address(reg)) = (value))
 143 #else
 144 #define NCR5380_read(reg)                                               \
 145     (((unsigned char) printk("scsi%d : read register %d at address %08x\n"\
 146     , instance->hostno, (reg), T128_address(reg))), *(T128_address(reg)))
 147 
 148 #define NCR5380_write(reg, value) {                                     \
 149     printk("scsi%d : write %02x to register %d at address %08x\n",      \
 150             instance->hostno, (value), (reg), T128_address(reg));       \
 151     *(T128_address(reg)) = (value);                                     \
 152 }
 153 #endif
 154 
 155 #define NCR5380_intr t128_intr
 156 #define NCR5380_queue_command t128_queue_command
 157 #define NCR5380_abort t128_abort
 158 #define NCR5380_reset t128_reset
 159 
 160 /* 15 14 12 10 7 5 3 
 161    1101 0100 1010 1000 */
 162    
 163 #define T128_IRQS 0xc4a8 
 164 
 165 #endif /* else def HOSTS_C */
 166 #endif /* ndef ASM */
 167 #endif /* T128_H */
/* */
root/drivers/scsi/t128.h

INCLUDED FROM
