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*/
1 /* depca.c: A DIGITAL DEPCA & EtherWORKS ethernet driver for linux.
2
3 Written 1994 by David C. Davies.
4
5
6 Copyright 1994 David C. Davies
7 and
8 United States Government
9 (as represented by the Director, National Security Agency).
10
11
12 This software may be used and distributed according to the terms of
13 the GNU Public License, incorporated herein by reference.
14
15 This driver is written for the Digital Equipment Corporation series
16 of DEPCA and EtherWORKS ethernet cards:
17
18 DEPCA (the original)
19 DE100
20 DE200 Turbo
21 DE201 Turbo
22 DE202 Turbo (TP BNC)
23 DE210
24
25 The driver has been tested on DE100, DE200 and DE202 cards in a
26 relatively busy network.
27
28 This driver will not work for the DE203, DE204 and DE205 series of
29 cards, since they have a new custom ASIC in place of the AMD LANCE chip.
30
31 The author may be reached as davies@wanton.lkg.dec.com or
32 Digital Equipment Corporation, 146 Main Street, Maynard MA 01754.
33
34 =========================================================================
35 The driver was based on the 'lance.c' driver from Donald Becker which is
36 included with the standard driver distribution for linux. Modifications
37 were made to most routines and the hardware recognition routines were
38 written from scratch. Primary references used were:
39
40 1) Lance.c code in /linux/drivers/net/
41 2) "Ethernet/IEEE 802.3 Family. 1992 World Network Data Book/Handbook",
42 AMD, 1992 [(800) 222-9323].
43 3) "Am79C90 CMOS Local Area Network Controller for Ethernet (C-LANCE)",
44 AMD, Pub. #17881, May 1993.
45 4) "Am79C960 PCnet-ISA(tm), Single-Chip Ethernet Controller for ISA",
46 AMD, Pub. #16907, May 1992
47 5) "DEC EtherWORKS LC Ethernet Controller Owners Manual",
48 Digital Equipment corporation, 1990, Pub. #EK-DE100-OM.003
49 6) "DEC EtherWORKS Turbo Ethernet Controller Owners Manual",
50 Digital Equipment corporation, 1990, Pub. #EK-DE200-OM.003
51 7) "DEPCA Hardware Reference Manual", Pub. #EK-DEPCA-PR
52 Digital Equipment Corporation, 1989
53 8) "DEC EtherWORKS Turbo_(TP BNC) Ethernet Controller Owners Manual",
54 Digital Equipment corporation, 1991, Pub. #EK-DE202-OM.001
55
56 Peter Bauer's depca.c (V0.5) was referred to when debugging this driver.
57 The hash filter code was derived from Reference 3 and has been tested
58 only to the extent that the Table A-1, page A-7, was confirmed to fill
59 the filter bit positions correctly. Hash filtering is not yet
60 implemented in the current driver set.
61
62 The original DEPCA card requires that the ethernet ROM address counter
63 be enabled to count and has an 8 bit NICSR. The ROM counter enabling is
64 only done when a 0x08 is read as the first address octet (to minimise
65 the chances of writing over some other hardware's I/O register). The
66 size of the NICSR is tested by a word read: if both bytes are the same,
67 the register is 8 bits wide. Also, there is a maximum of only 48kB
68 network RAM for this card. My thanks to Torbjorn Lindh for help
69 debugging all this (and holding my feet to the fire until I got it
70 right).
71
72 The DE200 series boards have on-board 64kB RAM for use as a shared
73 memory network buffer. Only the DE100 cards make use of a 2kB buffer
74 mode which has not been implemented in this driver (only the 32kB and
75 64kB modes are supported [16kB/48kB for the original DEPCA]).
76
77 At the most only 2 DEPCA cards can be supported because there is only
78 provision for two I/O base addresses on the cards (0x300 and 0x200). The
79 base address is 'autoprobed' by looking for the self test PROM and
80 detecting the card name. The shared memory base address is decoded by
81 'autoprobing' the Ethernet PROM address information. The second DEPCA is
82 detected and information placed in the base_addr variable of the next
83 device structure (which is created if necessary), thus enabling
84 ethif_probe initialization for the device.
85
86 ************************************************************************
87
88 NOTE: If you are using two DEPCAs, it is important that you assign the
89 base memory addresses correctly. The driver autoprobes I/O 0x300 then
90 0x200. The base memory address for the first device must be less than
91 that of the second so that the auto probe will correctly assign the I/O
92 and memory addresses on the same card. I can't think of a way to do
93 this unambiguously at the moment, since there is nothing on the cards to
94 tie I/O and memory information together.
95
96 I am unable to test 2 cards together for now, so this code is
97 unchecked. All reports, good or bad, are welcome.
98
99 ************************************************************************
100
101 The board IRQ setting must be at an unused IRQ which is auto-probed
102 using Donald Becker's autoprobe routines. DEPCA and DE100 board IRQs are
103 {2,3,4,5,7}, whereas the DE200 is at {5,9,10,11,15}. Note that IRQ2 is
104 really IRQ9 in machines with 16 IRQ lines.
105
106 No 16MB memory limitation should exist with this driver as DMA is not
107 used and the common memory area is in low memory on the network card (my
108 current system has 20MB and I've not had problems yet).
109
110 TO DO:
111 ------
112
113 1. Implement the 2k buffer mode - does anyone need it??
114
115 Revision History
116 ----------------
117
118 Version Date Description
119
120 0.1 25-jan-94 Initial writing.
121 0.2 27-jan-94 Added LANCE TX buffer chaining.
122 0.3 1-feb-94 Added multiple DEPCA support.
123 0.31 4-feb-94 Added DE202 recognition.
124 0.32 19-feb-94 Tidy up. Improve multi-DEPCA support.
125 0.33 25-feb-94 Fix DEPCA ethernet ROM counter enable.
126 Add jabber packet fix from murf@perftech.com
127 and becker@super.org
128 0.34 7-mar-94 Fix DEPCA max network memory RAM & NICSR access.
129 0.35 8-mar-94 Added DE201 recognition.
130
131 =========================================================================
132 */
133
134 static char *version = "depca.c:v0.35 3/8/94 davies@wanton.lkg.dec.com\n";
135
136 #include <stdarg.h>
137 #include <linux/config.h>
138 #include <linux/kernel.h>
139 #include <linux/sched.h>
140 #include <linux/string.h>
141 #include <linux/ptrace.h>
142 #include <linux/errno.h>
143 #include <linux/ioport.h>
144 #include <linux/malloc.h>
145 #include <linux/interrupt.h>
146 #include <asm/bitops.h>
147 #include <asm/io.h>
148 #include <asm/dma.h>
149
150 #include <linux/netdevice.h>
151 #include "iow.h" /* left in for pl13/14 compatibility... */
152 #include <linux/etherdevice.h>
153 #include <linux/skbuff.h>
154 #include "depca.h"
155
156 #ifdef DEPCA_DEBUG
157 int depca_debug = DEPCA_DEBUG;
158 #else
159 int depca_debug = 1;
160 #endif
161
162 #ifndef DEPCA_IRQ
163 /*#define DEPCA_IRQ {5,9,10,11,15,0}*/
164 #define DEPCA_IRQ 5
165 #endif
166
167 #ifndef PROBE_LENGTH
168 #define PROBE_LENGTH 32
169 #endif
170
171 #ifndef PROBE_SEQUENCE
172 #define PROBE_SEQUENCE "FF0055AAFF0055AA"
173 #endif
174
175 #ifndef DEPCA_SIGNATURE
176 #define DEPCA_SIGNATURE {"DEPCA","DE100","DE200","DE201","DE202","DE210",""}
177 #define DEPCA_NAME_LENGTH 8
178 #endif
179
180 #ifndef DEPCA_RAM_BASE_ADDRESSES
181 #define DEPCA_RAM_BASE_ADDRESSES {0xc0000,0xd0000,0xe0000,0x00000}
182 #endif
183 static short mem_chkd = 0; /* holds which base addrs have been */
184 /* checked, for multi-DEPCA case */
185
186 #ifndef DEPCA_IO_PORTS
187 #define DEPCA_IO_PORTS {0x300, 0x200, 0}
188 #endif
189
190 #ifndef DEPCA_TOTAL_SIZE
191 #define DEPCA_TOTAL_SIZE 0x10
192 #endif
193
194 #ifndef MAX_NUM_DEPCAS
195 #define MAX_NUM_DEPCAS 2
196 #endif
197
198 /*
199 ** Set the number of Tx and Rx buffers.
200 */
201 #ifndef DEPCA_BUFFER_LOG_SZ
202 #define RING_SIZE 16 /* 16 buffers */
203 #else
204 #define RING_SIZE (1 << (DEPCA_BUFFERS_LOG_SZ))
205 #endif /* DEPCA_BUFFER_LOG_SZ */
206
207 #define PKT_BUF_SZ 1544 /* Buffer size for each Tx/Rx buffer */
208 #define PKT_SZ 1514 /* Maximum ethernet packet length */
209 #define DAT_SZ 1500 /* Maximum ethernet data length */
210 #define PKT_HDR_LEN 14 /* Addresses and data length info */
211
212 #ifdef HAVE_MULTICAST
213 #ifndef CRC_POLYNOMIAL
214 #define CRC_POLYNOMIAL 0x04c11db7 /* Ethernet CRC polynomial */
215 #endif /* CRC_POLYNOMIAL */
216 #endif /* HAVE_MULTICAST */
217
218 /*
219 ** The DEPCA Rx and Tx ring descriptors.
220 */
221 struct depca_rx_head {
222 long base;
223 short buf_length; /* This length is negative 2's complement! */
224 short msg_length; /* This length is "normal". */
225 };
226
227 struct depca_tx_head {
228 long base;
229 short length; /* This length is negative 2's complement! */
230 short misc; /* Errors and TDR info */
231 };
232
233 struct depca_ring_info {
234 };
235
236 /*
237 ** The Lance initialization block, described in databook, in common memory.
238 */
239 struct depca_init {
240 unsigned short mode; /* Mode register */
241 unsigned char phys_addr[ETH_ALEN]; /* Physical ethernet address */
242 unsigned short filter[4]; /* Multicast filter. */
243 unsigned long rx_ring; /* Rx ring base pointer & ring length */
244 unsigned long tx_ring; /* Tx ring base pointer & ring length */
245 };
246
247 struct depca_private {
248 char devname[8]; /* Not used */
249 struct depca_rx_head *rx_ring; /* Pointer to start of RX descriptor ring */
250 struct depca_tx_head *tx_ring; /* Pointer to start of TX descriptor ring */
251 struct depca_init init_block;/* Initialization block */
252 long dma_buffs; /* Start address of Rx and Tx buffers. */
253 int cur_rx, cur_tx; /* The next free ring entry */
254 int dirty_rx, dirty_tx; /* The ring entries to be free()ed. */
255 int dma;
256 struct enet_statistics stats;
257 char depca_na; /* NICSR access width: 0=>byte, 1=>word */
258 short ringSize; /* ring size based on available memory */
259 short rmask; /* modulus mask based on ring size */
260 long rlen; /* log2(ringSize) for the descriptors */
261 };
262
263 /*
264 ** Public Functions
265 */
266 static int depca_open(struct device *dev);
267 static int depca_start_xmit(struct sk_buff *skb, struct device *dev);
268 static void depca_interrupt(int reg_ptr);
269 static int depca_close(struct device *dev);
270 static struct enet_statistics *depca_get_stats(struct device *dev);
271 #ifdef HAVE_MULTICAST
272 static void set_multicast_list(struct device *dev, int num_addrs, void *addrs);
273 #endif
274
275 /*
276 ** Private functions
277 */
278 static int depca_probe1(struct device *dev, short ioaddr);
279 static void depca_init_ring(struct device *dev);
280 static int depca_rx(struct device *dev);
281 static int depca_tx(struct device *dev);
282
283 static void LoadCSRs(struct device *dev);
284 static int InitRestartDepca(struct device *dev);
285 static char *DepcaSignature(unsigned long mem_addr);
286 static int DevicePresent(short ioaddr);
287 #ifdef HAVE_MULTICAST
288 static void SetMulticastFilter(int num_addrs, char *addrs, char *multicast_table);
289 #endif
290
291 static int depca_na;
292 static int num_depcas = 0, num_eth = 0;;
293
294 /*
295 ** Miscellaneous defines...
296 */
297 #define STOP_DEPCA \
298 outw(CSR0, DEPCA_ADDR);\
299 outw(STOP, DEPCA_DATA)
300
301 #define GET_NICSR(a,b) \
302 if (depca_na) { \
303 (a) = inw((b)); \
304 } else { \
305 (a) = inb((b)); \
306 }
307
308 #define PUT_NICSR(a,b) \
309 if (depca_na) { \
310 outw((a), (b)); \
311 } else { \
312 outb((a), (b)); \
313 }
314
315
316
317
318 int depca_probe(struct device *dev)
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*/
319 {
320 int *port, ports[] = DEPCA_IO_PORTS;
321 int base_addr = dev->base_addr;
322 int status;
323 struct device *eth0 = (struct device *) NULL;
324
325 if (base_addr > 0x1ff) { /* Check a single specified location. */
326 status = -ENODEV;
327 if (DevicePresent(base_addr) == 0) { /* Is DEPCA really here? */
328 status = depca_probe1(dev, base_addr);
329 }
330 } else if (base_addr > 0) { /* Don't probe at all. */
331 status = -ENXIO;
332 } else { /* First probe for the DEPCA test */
333 /* pattern in ROM */
334
335 for (status = -ENODEV, port = &ports[0];
336 *port && (num_depcas < MAX_NUM_DEPCAS); port++) {
337 int ioaddr = *port;
338
339 #ifdef HAVE_PORTRESERVE
340 if (check_region(ioaddr, DEPCA_TOTAL_SIZE))
341 continue;
342 #endif
343 if (DevicePresent(ioaddr) == 0) {
344 if (num_depcas > 0) { /* only gets here in autoprobe */
345
346 /*
347 ** Check the device structures for an end of list or unused device
348 */
349 while (dev->next != (struct device *)NULL) {
350 if (dev->next->base_addr == 0xffe0) break;
351 dev = dev->next; /* walk through eth device list */
352 num_eth++; /* increment eth device number */
353 }
354
355 /*
356 ** If no more device structures, malloc one up. If memory could
357 ** not be allocated, print an error message.
358 **
359 */
360 if (dev->next == (struct device *)NULL) {
361 dev->next = (struct device *)kmalloc(sizeof(struct device) + 8,
362 GFP_KERNEL);
363 } else {
364 printk("eth%d: Device not initialised, insufficient memory\n",
365 num_eth);
366 }
367
368 /*
369 ** If the memory was allocated, point to the new memory area
370 ** and initialize it (name, I/O address, next device (NULL) and
371 ** initialisation probe routine).
372 */
373 if ((dev->next != (struct device *)NULL) &&
374 (num_eth > 0) && (num_eth < 9999)) {
375 dev = dev->next; /* point to the new device */
376 dev->name = (char *)(dev + sizeof(struct device));
377 sprintf(dev->name,"eth%d", num_eth); /* New device name */
378 dev->base_addr = ioaddr; /* assign the io address */
379 dev->next = (struct device *)NULL; /* mark the end of list */
380 dev->init = &depca_probe;/* initialisation routine */
381 }
382 } else {
383 eth0 = dev; /* remember the first device */
384 status = depca_probe1(dev, ioaddr);
385 }
386 num_depcas++;
387 num_eth++;
388 }
389 }
390 if (eth0) dev = eth0; /* restore the first device */
391 }
392
393 if (status) dev->base_addr = base_addr;
394
395 return status; /* ENODEV would be more accurate. */
396 }
397
398 static int
399 depca_probe1(struct device *dev, short ioaddr)
/* ![[previous]](../icons/left.png)
*/
400 {
401 struct depca_private *lp;
402 int i,j, status=0;
403 unsigned long mem_start, mem_base[] = DEPCA_RAM_BASE_ADDRESSES;
404 char *name=(char *)NULL;
405 unsigned int nicsr, offset, netRAM;
406
407
408 /*
409 ** Stop the DEPCA. Enable the DBR ROM and the ethernet ROM address counter
410 ** (for the really old DEPCAs). Disable interrupts and remote boot.
411 */
412 STOP_DEPCA;
413
414 GET_NICSR(nicsr, DEPCA_NICSR);
415 nicsr = ((nicsr & ~SHE & ~RBE & ~IEN) | AAC | IM);
416 PUT_NICSR(nicsr, DEPCA_NICSR);
417
418 if (inw(DEPCA_DATA) == STOP) {
419
420 /* Now find out what kind of DEPCA we have. The DE100 uses a different
421 ** addressing scheme for some registers compared to the DE2xx series.
422 ** Note that a base address location is marked as checked if no DEPCA is
423 ** there or one is found (when the search is immediately terminated). This
424 ** shortens the search time a little for multiple DEPCAs.
425 */
426
427 for (j = 0, i = 0; mem_base[i] && (j == 0);) {
428 if (((mem_chkd >> i) & 0x01) == 0) { /* has the memory been checked? */
429 name = DepcaSignature(mem_base[i]);/* check for a DEPCA here */
430 mem_chkd |= (0x01 << i); /* mark location checked */
431 if (*name != (char)NULL) { /* one found? */
432 j = 1; /* set exit flag */
433 } else {
434 i++; /* increment search index */
435 }
436 }
437 }
438
439 if (*name != (char)NULL) { /* found a DEPCA device */
440 mem_start = mem_base[i];
441 dev->base_addr = ioaddr;
442
443 printk("%s: DEPCA at %#3x is a %s, ", dev->name, ioaddr, name);
444
445 /* There is a 32 byte station address PROM at DEPCA_PROM address.
446 The first six bytes are the station address. They can be read
447 directly since the signature search set up the ROM address
448 counter correctly just before this function.
449
450 For the DE100 we have to be careful about which port is used to
451 read the ROM info.
452 */
453
454 if (strstr(name,"DE100")!=(char *)NULL) {
455 j = 1;
456 } else {
457 j = 0;
458 }
459
460 printk("ethernet address ");
461 for (i = 0; i < ETH_ALEN - 1; i++) { /* get the ethernet address */
462 printk("%2.2x:", dev->dev_addr[i] = inb(DEPCA_PROM + j));
463 }
464 printk("%2.2x", dev->dev_addr[i] = inb(DEPCA_PROM + j));
465
466 for (;i<32;i++) { /* leave ROM counter in known state */
467 j=inb(DEPCA_PROM);
468 }
469
470 #ifdef HAVE_PORTRESERVE
471 snarf_region(ioaddr, DEPCA_TOTAL_SIZE);
472 #endif
473
474 /*
475 ** Set up the maximum amount of network RAM(kB)
476 */
477 if (strstr(name,"DEPCA")==(char *)NULL) {
478 netRAM=64;
479 } else {
480 netRAM=48;
481 }
482
483 /*
484 ** Determine the base address for the DEPCA RAM from the NI-CSR
485 ** and make up a DEPCA-specific-data structure.
486 */
487
488 if (nicsr & BUF) {
489 offset = 0x8000; /* 32kbyte RAM offset*/
490 nicsr &= ~BS; /* DEPCA RAM in top 32k */
491 printk(",\n with %dkB RAM", netRAM-(offset >> 10));
492 } else {
493 offset = 0x0000; /* 64k/48k bytes RAM */
494 printk(",\n with %dkB RAM", netRAM);
495 }
496
497 mem_start += offset;
498 printk(" starting at 0x%.5lx", mem_start);
499
500 /*
501 ** Enable the shadow RAM.
502 */
503 nicsr |= SHE;
504 PUT_NICSR(nicsr, DEPCA_NICSR);
505
506 /*
507 ** Calculate the ring size based on the available RAM
508 ** found above. Allocate an equal number of buffers, each
509 ** of size PKT_BUF_SZ (1544 bytes) to the Tx and Rx, allowing one
510 ** descriptor entry (8 bytes) for each buffer. Make sure
511 ** that this ring size is <= RING_SIZE. The ring size must be
512 ** a power of 2.
513 */
514
515 j = (((netRAM << 10) - offset - sizeof(struct depca_private)) /
516 (PKT_BUF_SZ + 8)) >> 1;
517 for (i=0;j>1;i++) {
518 j >>= 1;
519 }
520
521 /* Hold the ring size information here before the depca
522 ** private structure is allocated. Need this for the memory
523 ** space calculations.
524 */
525 j = 1 << i;
526
527 /*
528 ** Set up memory information in the device structure.
529 ** Align the descriptor rings on an 8 byte (quadword) boundary.
530 **
531 ** depca_private area
532 ** rx ring descriptors
533 ** tx ring descriptors
534 ** rx buffers
535 ** tx buffers
536 **
537 */
538
539 /* private area & initialise */
540 dev->priv = (void *)((mem_start + 0x07) & ~0x07);
541 lp = (struct depca_private *)dev->priv;
542 memset(dev->priv, 0, sizeof(struct depca_private));
543
544 /* Tx & Rx descriptors (aligned to a quadword boundary) */
545 mem_start = ((((unsigned long)dev->priv +
546 sizeof(struct depca_private)) +
547 (unsigned long)0x07) & (unsigned long)~0x07);
548 lp->rx_ring = (struct depca_rx_head *)mem_start;
549
550 mem_start += (sizeof(struct depca_rx_head) * j);
551 lp->tx_ring = (struct depca_tx_head *)mem_start;
552
553 mem_start += (sizeof(struct depca_tx_head) * j);
554 lp->dma_buffs = mem_start & 0x00ffffff;
555
556 mem_start += (PKT_BUF_SZ * j);
557 /* (mem_start now points to the start of the Tx buffers) */
558
559 /* Initialise the data structures */
560 memset(lp->rx_ring, 0, sizeof(struct depca_rx_head)*j);
561 memset(lp->tx_ring, 0, sizeof(struct depca_tx_head)*j);
562
563 /* This should never happen. */
564 if ((int)(lp->rx_ring) & 0x07) {
565 printk("\n **ERROR** DEPCA Rx and Tx descriptor rings not on a quadword boundary.\n");
566 return -ENXIO;
567 }
568
569 /*
570 ** Finish initialising the ring information.
571 */
572 lp->ringSize = j;
573 if (lp->ringSize > RING_SIZE) lp->ringSize = RING_SIZE;
574 lp->rmask = lp->ringSize - 1;
575
576 /*
577 ** calculate the real RLEN size for the descriptors. It is
578 ** log2(ringSize).
579 */
580 for (i=0, j = lp->ringSize; j>1; i++) {
581 j >>= 1;
582 }
583 lp->rlen = (unsigned long)(i << 29);
584
585 /*
586 ** load the initialisation block
587 */
588 depca_init_ring(dev);
589
590 /*
591 ** Initialise the control and status registers
592 */
593 LoadCSRs(dev);
594
595 /*
596 ** Store the NICSR width for this DEPCA
597 */
598 lp->depca_na = depca_na;
599
600 /*
601 ** Enable DEPCA board interrupts for autoprobing
602 */
603 nicsr = ((nicsr & ~IM)|IEN);
604 PUT_NICSR(nicsr, DEPCA_NICSR);
605
606 /* The DMA channel may be passed in on this parameter. */
607 dev->dma = 0;
608
609 /* To auto-IRQ we enable the initialization-done and DMA err,
610 interrupts. For now we will always get a DMA error. */
611 if (dev->irq < 2) {
612 autoirq_setup(0);
613
614 /* Trigger an initialization just for the interrupt. */
615 outw(INEA | INIT, DEPCA_DATA);
616
617 dev->irq = autoirq_report(1);
618 if (dev->irq) {
619 printk(" and probed IRQ%d.\n", dev->irq);
620 } else {
621 printk(". Failed to detect IRQ line.\n");
622 status = -EAGAIN;
623 }
624 } else {
625 printk(". Assigned IRQ%d.\n", dev->irq);
626 }
627 } else {
628 status = -ENXIO;
629 }
630 if (!status) {
631 if (depca_debug > 0) {
632 printk(version);
633 }
634
635 /* The DEPCA-specific entries in the device structure. */
636 dev->open = &depca_open;
637 dev->hard_start_xmit = &depca_start_xmit;
638 dev->stop = &depca_close;
639 dev->get_stats = &depca_get_stats;
640 #ifdef HAVE_MULTICAST
641 dev->set_multicast_list = &set_multicast_list;
642 #endif
643
644 dev->mem_start = 0;
645
646 /* Fill in the generic field of the device structure. */
647 ether_setup(dev);
648 }
649 } else {
650 status = -ENXIO;
651 }
652
653 return status;
654 }
655
656
657 static int
658 depca_open(struct device *dev)
/* */
659 {
660 struct depca_private *lp = (struct depca_private *)dev->priv;
661 int i,nicsr,ioaddr = dev->base_addr;
662
663 if (request_irq(dev->irq, &depca_interrupt)) {
664 printk("depca_open(): Requested IRQ%d is busy\n",dev->irq);
665 return -EAGAIN;
666 }
667
668 irq2dev_map[dev->irq] = dev;
669
670 /*
671 ** Stop the DEPCA & get the board status information.
672 */
673 depca_na=lp->depca_na;
674 STOP_DEPCA;
675 GET_NICSR(nicsr, DEPCA_NICSR);
676
677 /*
678 ** Re-initialize the DEPCA...
679 */
680 depca_init_ring(dev); /* initialize the descriptor rings */
681 LoadCSRs(dev);
682
683 if (depca_debug > 1){
684 printk("%s: depca open with irq %d\n",dev->name,dev->irq);
685 printk("Descriptor head addresses:\n");
686 printk("\t0x%8.8lx 0x%8.8lx\n",(long)lp->rx_ring,(long)lp->tx_ring);
687 printk("Descriptor addresses:\n");
688 for (i=0;i<lp->ringSize;i++){
689 printk("\t0x%8.8lx 0x%8.8lx\n",(long)&lp->rx_ring[i].base,
690 (long)&lp->tx_ring[i].base);
691 }
692 printk("Buffer addresses:\n");
693 for (i=0;i<lp->ringSize;i++){
694 printk("\t0x%8.8lx 0x%8.8lx\n",(long)lp->rx_ring[i].base,
695 (long)lp->tx_ring[i].base);
696 }
697 printk("Initialisation block at 0x%8.8lx\n",(long)&lp->init_block);
698 printk("\tmode: 0x%4.4x\n",lp->init_block.mode);
699 printk("\tphysical address: ");
700 for (i=0;i<6;i++){
701 printk("%2.2x:",(short)lp->init_block.phys_addr[i]);
702 }
703 printk("\n\tlogical address filter: 0x");
704 for (i=0;i<4;i++){
705 printk("%2.2x",(short)lp->init_block.filter[i]);
706 }
707 printk("\n\trx_ring at: 0x%8.8lx\n",(long)lp->init_block.rx_ring);
708 printk("\ttx_ring at: 0x%8.8lx\n",(long)lp->init_block.tx_ring);
709 printk("dma_buffs: 0x%8.8lx\n",(long)lp->dma_buffs);
710 printk("Ring size: %d\nMask: 0x%2.2x\nLog2(ringSize): 0x%8.8lx\n",
711 (short)lp->ringSize,
712 (char)lp->rmask,
713 (long)lp->rlen);
714 outw(CSR2,DEPCA_ADDR);
715 printk("CSR2&1: 0x%4.4x",inw(DEPCA_DATA));
716 outw(CSR1,DEPCA_ADDR);
717 printk("%4.4x\n",inw(DEPCA_DATA));
718 outw(CSR3,DEPCA_ADDR);
719 printk("CSR3: 0x%4.4x\n",inw(DEPCA_DATA));
720 }
721
722 /*
723 ** Enable DEPCA board interrupts
724 */
725 nicsr = ((nicsr & ~IM & ~LED)|SHE|IEN);
726 PUT_NICSR(nicsr, DEPCA_NICSR);
727 outw(CSR0,DEPCA_ADDR);
728
729 dev->tbusy = 0;
730 dev->interrupt = 0;
731 dev->start = 1;
732
733 InitRestartDepca(dev); /* ignore the return status */
734
735 if (depca_debug > 1){
736 printk("CSR0: 0x%4.4x\n",inw(DEPCA_DATA));
737 GET_NICSR(nicsr, DEPCA_NICSR);
738 printk("nicsr: 0x%4.4x\n",nicsr);
739 }
740
741 return 0; /* Always succeed */
742 }
743
744 /* Initialize the lance Rx and Tx descriptor rings. */
745 static void
746 depca_init_ring(struct device *dev)
/* */
747 {
748 struct depca_private *lp = (struct depca_private *)dev->priv;
749 unsigned long i;
750
751 lp->init_block.mode = DTX | DRX; /* Disable Rx and Tx. */
752 lp->cur_rx = lp->cur_tx = 0;
753 lp->dirty_rx = lp->dirty_tx = 0;
754
755 /* Initialize the base addresses and length of each buffer in the ring */
756 for (i = 0; i < lp->ringSize; i++) {
757 lp->rx_ring[i].base = (lp->dma_buffs + i*PKT_BUF_SZ) | R_OWN;
758 lp->rx_ring[i].buf_length = -PKT_BUF_SZ;
759 lp->tx_ring[i].base = (lp->dma_buffs + (i+lp->ringSize) * PKT_BUF_SZ) &
760 (unsigned long)(0x00ffffff);
761 }
762
763 /* Set up the initialization block */
764 for (i = 0; i < ETH_ALEN; i++) {
765 lp->init_block.phys_addr[i] = dev->dev_addr[i];
766 }
767 for (i = 0; i < 4; i++) {
768 lp->init_block.filter[i] = 0x0000;
769 }
770 lp->init_block.rx_ring = (unsigned long)lp->rx_ring | lp->rlen;
771 lp->init_block.tx_ring = (unsigned long)lp->tx_ring | lp->rlen;
772
773 lp->init_block.mode = 0x0000; /* Enable the Tx and Rx */
774 }
775
776 /*
777 ** Writes a socket buffer to TX descriptor ring and starts transmission
778 */
779 static int
780 depca_start_xmit(struct sk_buff *skb, struct device *dev)
/* */
781 {
782 struct depca_private *lp = (struct depca_private *)dev->priv;
783 int ioaddr = dev->base_addr;
784 int status = 0;
785
786 /* Transmitter timeout, serious problems. */
787 if (dev->tbusy) {
788 int tickssofar = jiffies - dev->trans_start;
789 if (tickssofar < 10) {
790 status = -1;
791 } else {
792 STOP_DEPCA;
793 printk("%s: transmit timed out, status %4.4x, resetting.\n",
794 dev->name, inw(DEPCA_DATA));
795
796 depca_init_ring(dev);
797 LoadCSRs(dev);
798 InitRestartDepca(dev);
799 dev->tbusy=0;
800 dev->trans_start = jiffies;
801 }
802 return status;
803 }
804
805 if (skb == NULL) {
806 dev_tint(dev);
807 return 0;
808 }
809
810 if (skb->len <= 0) {
811 return 0;
812 }
813
814 if (depca_debug > 3) {
815 outw(CSR0, DEPCA_ADDR);
816 printk("%s: depca_start_xmit() called, csr0 %4.4x.\n", dev->name,
817 inw(DEPCA_DATA));
818 }
819
820 /* Block a timer-based transmit from overlapping. This could better be
821 done with atomic_swap(1, dev->tbusy), but set_bit() works as well. */
822 if (set_bit(0, (void*)&dev->tbusy) != 0)
823 printk("%s: Transmitter access conflict.\n", dev->name);
824
825 /*
826 ** The TX buffer, skb, has to be copied into the local network RAM
827 ** for the LANCE to access it. The skb may be at > 16MB for large
828 ** (memory) systems.
829 */
830 { /* Fill in a Tx ring entry */
831 unsigned char *buf;
832 int entry = lp->cur_tx++;
833 int len;
834 long skbL = skb->len;
835 char *p = (char *) skb->data;
836
837 entry &= lp->rmask; /* Ring around buffer number. */
838 buf = (unsigned char *)(lp->tx_ring[entry].base & 0x00ffffff);
839
840 /* Wait for a full ring to free up */
841 while (lp->tx_ring[entry].base < 0);
842
843 /*
844 ** Caution: the write order is important here... don't set up the
845 ** ownership rights until all the other information is in place.
846 */
847 len = ((skbL > PKT_SZ) ? PKT_SZ : skbL); /* skb too long */
848 if (len < ETH_ZLEN) len = ETH_ZLEN; /* len too short */
849 skbL -= len;
850 lp->tx_ring[entry].length = -len;
851
852 /* Clears various error flags */
853 lp->tx_ring[entry].misc = 0x0000;
854
855 /* copy the data from the socket buffer to the net memory */
856 memcpy((unsigned char *)(buf), skb->data, len);
857
858 /* Hand over buffer ownership to the LANCE */
859 if (skbL <= 0) lp->tx_ring[entry].base |= (T_ENP);
860 lp->tx_ring[entry].base |= (T_OWN|T_STP);
861
862 /* Trigger an immediate send demand. */
863 outw(CSR0, DEPCA_ADDR);
864 outw(INEA | TDMD, DEPCA_DATA);
865
866 dev->trans_start = jiffies;
867
868 for (p += len; skbL > 0; p += len) {
869
870 /* Get new buffer pointer */
871 entry = lp->cur_tx++;
872 entry &= lp->rmask; /* Ring around buffer number. */
873 buf = (unsigned char *)(lp->tx_ring[entry].base & 0x00ffffff);
874
875 /* Wait for a full ring to free up */
876 while (lp->tx_ring[entry].base < 0);
877 dev->tbusy=0;
878
879 /* Copy ethernet header to the new buffer */
880 memcpy((unsigned char *)buf, skb->data, PKT_HDR_LEN);
881
882 /* Determine length of data buffer */
883 len = ((skbL > DAT_SZ) ? DAT_SZ : skbL); /* skbL too long */
884 if (len < ETH_ZLEN) len = ETH_ZLEN; /* len too short */
885 skbL -= len;
886 lp->tx_ring[entry].length = -len;
887
888 /* Clears various error flags */
889 lp->tx_ring[entry].misc = 0x0000;
890
891 /* copy the data from the socket buffer to the net memory */
892 memcpy((unsigned char *)(buf + PKT_HDR_LEN), (unsigned char *)p, len);
893
894 /* Hand over buffer ownership to the LANCE */
895 if (skbL <= 0) lp->tx_ring[entry].base |= T_ENP;
896 lp->tx_ring[entry].base |= T_OWN;
897 }
898
899 if (depca_debug > 4) {
900 unsigned char *pkt =
901 (unsigned char *)(lp->tx_ring[entry].base & 0x00ffffff);
902
903 printk("%s: tx ring[%d], %#lx, sk_buf %#lx len %d.\n",
904 dev->name, entry, (unsigned long) &lp->tx_ring[entry],
905 lp->tx_ring[entry].base, -lp->tx_ring[entry].length);
906 printk("%s: Tx %2.2x %2.2x %2.2x ... %2.2x %2.2x %2.2x %2.2x...%2.2x len %2.2x %2.2x %2.2x %2.2x.\n",
907 dev->name, pkt[0], pkt[1], pkt[2], pkt[5], pkt[6],
908 pkt[7], pkt[8], pkt[11], pkt[12], pkt[13],
909 pkt[14], pkt[15]);
910 }
911
912 /* Check if the TX ring is full or not - 'tbusy' cleared if not full. */
913 if (lp->tx_ring[(entry+1) & lp->rmask].base >= 0) {
914 dev->tbusy=0;
915 }
916
917 dev_kfree_skb (skb, FREE_WRITE);
918 }
919
920 return 0;
921 }
922
923 /*
924 ** The DEPCA interrupt handler.
925 */
926 static void
927 depca_interrupt(int reg_ptr)
/* */
928 {
929 int irq = -(((struct pt_regs *)reg_ptr)->orig_eax+2);
930 struct device *dev = (struct device *)(irq2dev_map[irq]);
931 struct depca_private *lp;
932 int csr0, ioaddr, nicsr;
933
934 if (dev == NULL) {
935 printk ("depca_interrupt(): irq %d for unknown device.\n", irq);
936 return;
937 } else {
938 lp = (struct depca_private *)dev->priv;
939 ioaddr = dev->base_addr;
940 depca_na = lp->depca_na;
941 }
942
943 if (dev->interrupt)
944 printk("%s: Re-entering the interrupt handler.\n", dev->name);
945
946 dev->interrupt = MASK_INTERRUPTS;
947
948 /* mask the DEPCA board interrupts and turn on the LED */
949 GET_NICSR(nicsr, DEPCA_NICSR);
950 nicsr |= (IM|LED);
951 PUT_NICSR(nicsr, DEPCA_NICSR);
952
953 outw(CSR0, DEPCA_ADDR);
954 csr0 = inw(DEPCA_DATA);
955
956 /* Acknowledge all of the current interrupt sources ASAP. */
957 outw(csr0 & ~(INEA|TDMD|STOP|STRT|INIT), DEPCA_DATA);
958
959 if (depca_debug > 5)
960 printk("%s: interrupt csr0=%#2.2x new csr=%#2.2x.\n",
961 dev->name, csr0, inw(DEPCA_DATA));
962
963 if (csr0 & RINT) /* Rx interrupt (packet arrived) */
964 depca_rx(dev);
965
966 if (csr0 & TINT) /* Tx interrupt (packet sent) */
967 depca_tx(dev);
968
969 /* Clear the interrupts we've handled. */
970 outw(CSR0, DEPCA_ADDR);
971 outw(BABL|CERR|MISS|MERR|RINT|TINT|IDON|INEA, DEPCA_DATA);
972
973 if (depca_debug > 4) {
974 printk("%s: exiting interrupt, csr%d=%#4.4x.\n",
975 dev->name, inw(DEPCA_ADDR),
976 inw(DEPCA_DATA));
977 }
978
979 /* Unmask the DEPCA board interrupts and turn off the LED */
980 nicsr = (nicsr & ~IM & ~LED);
981 PUT_NICSR(nicsr, DEPCA_NICSR);
982
983 dev->interrupt = UNMASK_INTERRUPTS;
984 return;
985 }
986
987 static int
988 depca_rx(struct device *dev)
/* */
989 {
990 struct depca_private *lp = (struct depca_private *)dev->priv;
991 int entry = lp->cur_rx & lp->rmask;
992
993 /* If we own the next entry, it's a new packet. Send it up. */
994 for (; lp->rx_ring[entry].base >= 0; entry = (++lp->cur_rx) & lp->rmask) {
995 int status = lp->rx_ring[entry].base >> 16 ;
996 int chained;
997
998 /*
999 ** There is a tricky error noted by John Murphy, <murf@perftech.com>
1000 ** to Russ Nelson: even with full-sized buffers, it's possible for a
1001 ** jabber packet to use two buffers, with only the last one correctly
1002 ** noting the error.
1003 */
1004
1005 /* Check for a chaining buffer */
1006 chained = 0;
1007 if (status == R_STP) {
1008 chained = 1;
1009
1010 /*
1011 ** Wait for next buffer to complete to check for errors. This
1012 ** is slow but infrequent and allows for correct hardware buffer
1013 ** chaining (whilst defeating the chaining's purpose).
1014 */
1015 while ((status=(lp->rx_ring[(entry+1)&lp->rmask].base >> 16)) < 0);
1016
1017 /* NB: 'status' now comes from the buffer following 'entry'. */
1018 }
1019
1020 if (status & R_ERR) { /* There was an error. */
1021 lp->stats.rx_errors++; /* Update the error stats. */
1022 if (status & R_FRAM) lp->stats.rx_frame_errors++;
1023 if (status & R_OFLO) lp->stats.rx_over_errors++;
1024 if (status & R_CRC) lp->stats.rx_crc_errors++;
1025 if (status & R_BUFF) lp->stats.rx_fifo_errors++;
1026 } else { /* Malloc up new buffer, compatible with net-2e. */
1027 short pkt_len = lp->rx_ring[entry].msg_length;
1028 struct sk_buff *skb;
1029
1030 skb = alloc_skb(pkt_len, GFP_ATOMIC);
1031 if (skb == NULL) {
1032 printk("%s: Memory squeeze, deferring packet.\n", dev->name);
1033 lp->stats.rx_dropped++; /* Really, deferred. */
1034 break;
1035 }
1036 skb->len = pkt_len;
1037 skb->dev = dev;
1038 memcpy(skb->data,
1039 (unsigned char *)(lp->rx_ring[entry].base & 0x00ffffff),
1040 pkt_len);
1041 /*
1042 ** Notify the upper protocol layers that there is another
1043 ** packet to handle
1044 */
1045 netif_rx(skb);
1046 lp->stats.rx_packets++;
1047 }
1048
1049 /* turn over ownership of the current entry back to the LANCE */
1050 lp->rx_ring[entry].base |= R_OWN;
1051 if (chained && (status & R_ERR)) { /* next entry also bad */
1052 entry = (++lp->cur_rx) & lp->rmask;
1053 lp->rx_ring[entry].base |= R_OWN;
1054 }
1055 }
1056
1057 /*
1058 ** We should check that at least two ring entries are free. If not,
1059 ** we should free one and mark stats->rx_dropped++.
1060 */
1061
1062 return 0;
1063 }
1064
1065 /*
1066 ** Buffer sent - check for buffer errors.
1067 */
1068 static int
1069 depca_tx(struct device *dev)
/* */
1070 {
1071 struct depca_private *lp = (struct depca_private *)dev->priv;
1072 int dirty_tx = lp->dirty_tx & lp->rmask;
1073
1074 if (depca_debug > 5)
1075 printk("%s: Cleaning tx ring, dirty %d clean %d.\n",
1076 dev->name, dirty_tx, (lp->cur_tx & lp->rmask));
1077
1078 /*
1079 ** While the dirty entry is not the current one AND
1080 ** the LANCE doesn't own it...
1081 */
1082 for (; dirty_tx!=(lp->cur_tx & lp->rmask) && lp->tx_ring[dirty_tx].base>0;
1083 dirty_tx = ++lp->dirty_tx & lp->rmask) {
1084 unsigned long *tmdp = (unsigned long *)(&lp->tx_ring[dirty_tx]);
1085 int status = lp->tx_ring[dirty_tx].base >> 16;
1086
1087 if (status < 0) { /* Packet not yet sent! */
1088 printk("interrupt for packet not yet sent!\n");
1089 break;
1090 }
1091 if (status & T_ERR) { /* There was an major error, log it. */
1092 int err_status = lp->tx_ring[dirty_tx].misc;
1093
1094 lp->stats.tx_errors++;
1095 if (err_status & TMD3_RTRY) lp->stats.tx_aborted_errors++;
1096 if (err_status & TMD3_LCAR) lp->stats.tx_carrier_errors++;
1097 if (err_status & TMD3_LCOL) lp->stats.tx_window_errors++;
1098 if (err_status & TMD3_UFLO) lp->stats.tx_fifo_errors++;
1099 /* We should re-init() after the FIFO error. */
1100 } else if (status & (T_MORE | T_ONE)) {
1101 lp->stats.collisions++;
1102 } else {
1103 lp->stats.tx_packets++;
1104 }
1105
1106 if (depca_debug > 5)
1107 printk("%s: Tx done entry %d, %4.4lx %4.4lx %4.4lx %4.4lx.\n",
1108 dev->name, dirty_tx,
1109 tmdp[0], tmdp[1], tmdp[2], tmdp[3]);
1110 }
1111 /*mark_bh(INET_BH);*/
1112 return 0;
1113 }
1114
1115 static int
1116 depca_close(struct device *dev)
/* */
1117 {
1118 int ioaddr = dev->base_addr;
1119
1120 dev->start = 0;
1121 dev->tbusy = 1;
1122
1123 outw(CSR0, DEPCA_ADDR);
1124
1125 if (depca_debug > 1) {
1126 printk("%s: Shutting down ethercard, status was %2.2x.\n",
1127 dev->name, inw(DEPCA_DATA));
1128 }
1129
1130 /*
1131 ** We stop the DEPCA here -- it occasionally polls
1132 ** memory if we don't.
1133 */
1134 outw(STOP, DEPCA_DATA);
1135
1136 free_irq(dev->irq);
1137
1138 irq2dev_map[dev->irq] = 0;
1139
1140 return 0;
1141 }
1142
1143 static void LoadCSRs(struct device *dev)
/* */
1144 {
1145 struct depca_private *lp = (struct depca_private *)dev->priv;
1146 int ioaddr = dev->base_addr;
1147
1148 outw(CSR1, DEPCA_ADDR); /* initialisation block address LSW */
1149 outw((unsigned short)(unsigned long)&lp->init_block, DEPCA_DATA);
1150 outw(CSR2, DEPCA_ADDR); /* initialisation block address MSW */
1151 outw((unsigned short)((unsigned long)&lp->init_block >> 16), DEPCA_DATA);
1152 outw(CSR3, DEPCA_ADDR); /* ALE control */
1153 outw(ACON, DEPCA_DATA);
1154 outw(CSR0, DEPCA_ADDR); /* point back to CSR0 */
1155 }
1156
1157 static int InitRestartDepca(struct device *dev)
/* */
1158 {
1159 struct depca_private *lp = (struct depca_private *)dev->priv;
1160 int ioaddr = dev->base_addr;
1161 int i, status=0;
1162
1163 outw(CSR0, DEPCA_ADDR); /* point back to CSR0 */
1164 outw(INIT, DEPCA_DATA); /* initialize DEPCA */
1165
1166 /* wait for lance to complete initialisation */
1167 for (i=0;(i<100) && !(inw(DEPCA_DATA) & IDON); i++);
1168
1169 if (i!=100) {
1170 /* clear IDON by writing a "1", enable interrupts and start lance */
1171 outw(IDON | INEA | STRT, DEPCA_DATA);
1172 if (depca_debug > 2) {
1173 printk("%s: DEPCA open after %d ticks, init block %#lx csr0 %4.4x.\n",
1174 dev->name, i, (long) &lp->init_block, inw(DEPCA_DATA));
1175 }
1176 } else {
1177 status = -1;
1178 printk("%s: DEPCA unopened after %d ticks, init block %#lx csr0 %4.4x.\n",
1179 dev->name, i, (long) &lp->init_block, inw(DEPCA_DATA));
1180 }
1181
1182 return status;
1183 }
1184
1185 static struct enet_statistics *
1186 depca_get_stats(struct device *dev)
/* */
1187 {
1188 struct depca_private *lp = (struct depca_private *)dev->priv;
1189
1190 /* Null body since there is no framing error counter */
1191
1192 return &lp->stats;
1193 }
1194
1195 #ifdef HAVE_MULTICAST
1196 /*
1197 ** Set or clear the multicast filter for this adaptor.
1198 ** num_addrs == -1 Promiscuous mode, receive all packets
1199 ** num_addrs == 0 Normal mode, clear multicast list
1200 ** num_addrs > 0 Multicast mode, receive normal and MC packets, and do
1201 ** best-effort filtering.
1202 */
1203 static void
1204 set_multicast_list(struct device *dev, int num_addrs, void *addrs)
/* */
1205 {
1206 short ioaddr = dev->base_addr;
1207 struct depca_private *lp = (struct depca_private *)dev->priv;
1208
1209 /* We take the simple way out and always enable promiscuous mode. */
1210 STOP_DEPCA; /* Temporarily stop the depca. */
1211
1212 lp->init_block.mode = PROM; /* Set promiscuous mode */
1213 if (num_addrs >= 0) {
1214 short multicast_table[4];
1215 int i;
1216
1217 SetMulticastFilter(num_addrs, (char *)addrs, (char *)multicast_table);
1218
1219 /* We don't use the multicast table, but rely on upper-layer filtering. */
1220 memset(multicast_table, (num_addrs==0) ? 0 : -1, sizeof(multicast_table));
1221
1222 for (i = 0; i < 4; i++) {
1223 lp->init_block.filter[i] = multicast_table[i];
1224 }
1225 lp->init_block.mode &= ~PROM; /* Unset promiscuous mode */
1226 } else {
1227 lp->init_block.mode |= PROM; /* Set promiscuous mode */
1228 }
1229
1230 outw(CSR0, DEPCA_ADDR);
1231 outw(IDON|INEA|STRT, DEPCA_DATA); /* Resume normal operation. */
1232 }
1233
1234 /*
1235 ** Calculate the hash code and update the logical address filter
1236 ** from a list of ethernet multicast addresses.
1237 ** Derived from a 'C' program in the AMD data book:
1238 ** "Am79C90 CMOS Local Area Network Controller for Ethernet (C-LANCE)",
1239 ** Pub #17781, Rev. A, May 1993
1240 */
1241 static void SetMulticastFilter(int num_addrs, char *addrs, char *multicast_table)
/* */
1242 {
1243 char j, ctrl, bit, octet, hashcode;
1244 short int i;
1245 long int CRC, poly = (long int) CRC_POLYNOMIAL;
1246
1247 for (i=0;i<num_addrs;i++) { /* for each address in the list */
1248 if (((char) *(addrs+ETH_ALEN*i) & 0x01) == 1) {/* is multicast address? */
1249 CRC = (long int) 0xffffffff; /* init CRC for each address */
1250 for (octet=0;octet<ETH_ALEN;octet++) { /* for each address octet */
1251 for(j=0;j<8;j++) { /* process each address bit */
1252 bit = (((char)* (addrs+ETH_ALEN*i+octet)) >> j) & 0x01;
1253 ctrl = ((CRC < 0) ? 1 : 0); /* shift the control bit */
1254 CRC <<= 1; /* shift the CRC */
1255 if (bit ^ ctrl) { /* (bit) XOR (control bit) */
1256 CRC ^= poly; /* (CRC) XOR (polynomial) */
1257 }
1258 }
1259 }
1260 hashcode = (CRC & 0x00000001); /* hashcode is 6 LSb of CRC ... */
1261 for (j=0;j<5;j++) { /* ... in reverse order. */
1262 hashcode <<= 1;
1263 CRC >>= 1;
1264 hashcode |= (CRC & 0x00000001);
1265 }
1266 octet = hashcode >> 3; /* bit[3-5] -> octet in filter */
1267 /* bit[0-2] -> bit in octet */
1268 multicast_table[octet] |= (1 << (hashcode & 0x07));
1269 }
1270 }
1271 return;
1272 }
1273
1274 #endif /* HAVE_MULTICAST */
1275
1276 /*
1277 ** Look for a particular board name in the on-board Remote Diagnostics
1278 ** and Boot (RDB) ROM. This will also give us a clue to the network RAM
1279 ** base address.
1280 */
1281 static char *DepcaSignature(unsigned long mem_addr)
/* */
1282 {
1283 unsigned long i,j,k;
1284 static char signatures[][DEPCA_NAME_LENGTH] = DEPCA_SIGNATURE;
1285 static char thisName[DEPCA_NAME_LENGTH];
1286 char tmpstr[17];
1287
1288 for (i=0;i<16;i++) { /* copy the first 16 bytes of ROM to */
1289 tmpstr[i] = *(unsigned char *)(mem_addr+0xc000+i); /* a temporary string */
1290 }
1291 tmpstr[i]=(char)NULL;
1292
1293 strcpy(thisName,"");
1294 for (i=0;*signatures[i]!=(char)NULL && *thisName==(char)NULL;i++) {
1295 for (j=0,k=0;j<16 && k<strlen(signatures[i]);j++) {
1296 if (signatures[i][k] == tmpstr[j]) { /* track signature */
1297 k++;
1298 } else { /* lost signature; begin search again */
1299 k=0;
1300 }
1301 }
1302 if (k == strlen(signatures[i])) {
1303 strcpy(thisName,signatures[i]);
1304 }
1305 }
1306
1307 return thisName; /* return the device name string */
1308 }
1309
1310 /*
1311 ** Look for a special sequence in the Ethernet station address PROM that
1312 ** is common across all DEPCA products. Note that the original DEPCA needs
1313 ** its ROM address counter to be initialized and enabled. Only enable
1314 ** if the first address octet is a 0x08 - this minimises the chances of
1315 ** messing around with some other hardware, but it assumes that this DEPCA
1316 ** card initialized itself correctly. It also assumes that all past and
1317 ** future DEPCA/EtherWORKS cards will have ethernet addresses beginning with
1318 ** a 0x08. The choice of byte or word addressing is made here based on whether
1319 ** word read of the NICSR returns two identical lower and upper bytes: if so
1320 ** the register is 8 bits wide.
1321 */
1322
1323 static int DevicePresent(short ioaddr)
/* */
1324 {
1325 static short fp=1,sigLength=0;
1326 static char devSig[] = PROBE_SEQUENCE;
1327 char data;
1328 unsigned char LSB,MSB;
1329 int i, j, nicsr, status = 0;
1330 static char asc2hex(char value);
1331
1332 /*
1333 ** Initialize the counter on a DEPCA card. Two reads to ensure DEPCA ethernet
1334 ** address counter is a) cleared and b) the correct data read.
1335 */
1336 data = inb(DEPCA_PROM); /* clear counter */
1337 data = inb(DEPCA_PROM); /* read data */
1338
1339 /*
1340 ** Determine whether a byte or word access should be made on the NICSR.
1341 ** Since the I/O 'functions' are actually in-line code, the choice not to use
1342 ** pointers to functions vs. just set a conditional, is made for us. This code
1343 ** assumes that the NICSR has an asymmetric bit pattern already in it.
1344 */
1345 nicsr = inw(DEPCA_NICSR);
1346 LSB = nicsr & 0xff;
1347 MSB = (((unsigned) nicsr) >> 8) & 0xff;
1348 if (MSB == LSB) {
1349 depca_na = 0; /* byte accesses */
1350 } else {
1351 depca_na = 1; /* word accesses */
1352 }
1353
1354 /*
1355 ** Enable counter
1356 */
1357 if (data == 0x08) {
1358 nicsr |= AAC;
1359 PUT_NICSR(nicsr, DEPCA_NICSR);
1360 }
1361
1362 /*
1363 ** Convert the ascii signature to a hex equivalent & pack in place
1364 */
1365 if (fp) { /* only do this once!... */
1366 for (i=0,j=0;devSig[i]!=(char)NULL && !status;i+=2,j++) {
1367 if ((devSig[i]=asc2hex(devSig[i]))>=0) {
1368 devSig[i]<<=4;
1369 if((devSig[i+1]=asc2hex(devSig[i+1]))>=0){
1370 devSig[j]=devSig[i]+devSig[i+1];
1371 } else {
1372 status= -1;
1373 }
1374 } else {
1375 status= -1;
1376 }
1377 }
1378 sigLength=j;
1379 fp = 0;
1380 }
1381
1382 /*
1383 ** Search the Ethernet address ROM for the signature. Since the ROM address
1384 ** counter can start at an arbitrary point, the search must include the entire
1385 ** probe sequence length plus the length of the (signature - 1).
1386 ** Stop the search IMMEDIATELY after the signature is found so that the
1387 ** PROM address counter is correctly positioned at the start of the
1388 ** ethernet address for later read out.
1389 */
1390 if (!status) {
1391 for (i=0,j=0;j<sigLength && i<PROBE_LENGTH+sigLength-1;i++) {
1392 data = inb(DEPCA_PROM);
1393 if (devSig[j] == data) { /* track signature */
1394 j++;
1395 } else { /* lost signature; begin search again */
1396 j=0;
1397 }
1398 }
1399
1400 if (j!=sigLength) {
1401 status = -ENODEV; /* search failed */
1402 }
1403 }
1404
1405 return status;
1406 }
1407
1408 static char asc2hex(char value)
/* ![[last]](../icons/n_last.png)
*/
1409 {
1410 value -= 0x30; /* normalise to 0..9 range */
1411 if (value >= 0) {
1412 if (value > 9) { /* but may not be 10..15 */
1413 value &= 0x1f; /* make A..F & a..f be the same */
1414 value -= 0x07; /* normalise to 10..15 range */
1415 if ((value < 0x0a) || (value > 0x0f)) { /* if outside range then... */
1416 value = -1; /* ...signal error */
1417 }
1418 }
1419 } else { /* outside 0..9 range... */
1420 value = -1; /* ...signal error */
1421 }
1422 return value; /* return hex char or error */
1423 }
1424
1425
1426 /*
1427 * Local variables:
1428 * compile-command: "gcc -D__KERNEL__ -I/usr/src/linux/net/inet -Wall -Wstrict-prototypes -O6 -m486 -c depca.c"
1429 * End:
1430 */
1431
1432
1433
![[bottom]](../icons/n_bottom.png){kind=icon}
*/