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*/
1 /* depca.c: A DIGITAL DEPCA & EtherWORKS ethernet driver for linux.
2
3 Written 1994 by David C. Davies.
4
5
6 Copyright 1994 David C. Davies
7 and
8 United States Government
9 (as represented by the Director, National Security Agency).
10
11
12 This software may be used and distributed according to the terms of
13 the GNU Public License, incorporated herein by reference.
14
15 This driver is written for the Digital Equipment Corporation series
16 of DEPCA and EtherWORKS ethernet cards:
17
18 DEPCA (the original)
19 DE100
20 DE200 Turbo
21 DE201 Turbo
22 DE202 Turbo (TP BNC)
23 DE210
24 DE422 (EISA)
25
26 The driver has been tested on DE100, DE200 and DE202 cards in a
27 relatively busy network. The DE422 has been tested a little.
28
29 This driver will NOT work for the DE203, DE204 and DE205 series of
30 cards, since they have a new custom ASIC in place of the AMD LANCE
31 chip.
32
33 The author may be reached as davies@wanton.lkg.dec.com or
34 Digital Equipment Corporation, 550 King Street, Littleton MA 01460.
35
36 =========================================================================
37 The driver was based on the 'lance.c' driver from Donald Becker which is
38 included with the standard driver distribution for linux. Modifications
39 were made to most routines and the hardware recognition routines were
40 written from scratch. Primary references used were:
41
42 1) Lance.c code in /linux/drivers/net/
43 2) "Ethernet/IEEE 802.3 Family. 1992 World Network Data Book/Handbook",
44 AMD, 1992 [(800) 222-9323].
45 3) "Am79C90 CMOS Local Area Network Controller for Ethernet (C-LANCE)",
46 AMD, Pub. #17881, May 1993.
47 4) "Am79C960 PCnet-ISA(tm), Single-Chip Ethernet Controller for ISA",
48 AMD, Pub. #16907, May 1992
49 5) "DEC EtherWORKS LC Ethernet Controller Owners Manual",
50 Digital Equipment corporation, 1990, Pub. #EK-DE100-OM.003
51 6) "DEC EtherWORKS Turbo Ethernet Controller Owners Manual",
52 Digital Equipment corporation, 1990, Pub. #EK-DE200-OM.003
53 7) "DEPCA Hardware Reference Manual", Pub. #EK-DEPCA-PR
54 Digital Equipment Corporation, 1989
55 8) "DEC EtherWORKS Turbo_(TP BNC) Ethernet Controller Owners Manual",
56 Digital Equipment corporation, 1991, Pub. #EK-DE202-OM.001
57
58 Peter Bauer's depca.c (V0.5) was referred to when debugging this driver.
59 The hash filter code was derived from Reference 3 and has been tested
60 only to the extent that the Table A-1, page A-7, was confirmed to fill
61 the filter bit positions correctly. Hash filtering is not yet
62 implemented in the current driver set.
63
64 The original DEPCA card requires that the ethernet ROM address counter
65 be enabled to count and has an 8 bit NICSR. The ROM counter enabling is
66 only done when a 0x08 is read as the first address octet (to minimise
67 the chances of writing over some other hardware's I/O register). The
68 NICSR accesses have been changed to byte accesses for all the cards
69 supported by this driver, since there is only one useful bit in the MSB
70 (remote boot timeout) and it is not used. Also, there is a maximum of
71 only 48kB network RAM for this card. My thanks to Torbjorn Lindh for
72 help debugging all this (and holding my feet to the fire until I got it
73 right).
74
75 The DE200 series boards have on-board 64kB RAM for use as a shared
76 memory network buffer. Only the DE100 cards make use of a 2kB buffer
77 mode which has not been implemented in this driver (only the 32kB and
78 64kB modes are supported [16kB/48kB for the original DEPCA]).
79
80 At the most only 2 DEPCA cards can be supported on the ISA bus because
81 there is only provision for two I/O base addresses on each card (0x300
82 and 0x200). The I/O address is detected by searching for a byte sequence
83 in the Ethernet station address PROM at the expected I/O address for the
84 Ethernet PROM. The shared memory base address is 'autoprobed' by
85 looking for the self test PROM and detecting the card name. When a
86 second DEPCA is detected, information is placed in the base_addr
87 variable of the next device structure (which is created if necessary),
88 thus enabling ethif_probe initialization for the device. More than 2
89 EISA cards can be supported, but care will be needed assigning the
90 shared memory to ensure that each slot has the correct IRQ, I/O address
91 and shared memory address assigned.
92
93 ************************************************************************
94
95 NOTE: If you are using two ISA DEPCAs, it is important that you assign
96 the base memory addresses correctly. The driver autoprobes I/O 0x300
97 then 0x200. The base memory address for the first device must be less
98 than that of the second so that the auto probe will correctly assign the
99 I/O and memory addresses on the same card. I can't think of a way to do
100 this unambiguously at the moment, since there is nothing on the cards to
101 tie I/O and memory information together.
102
103 I am unable to test 2 cards together for now, so this code is
104 unchecked. All reports, good or bad, are welcome.
105
106 ************************************************************************
107
108 The board IRQ setting must be at an unused IRQ which is auto-probed
109 using Donald Becker's autoprobe routines. DEPCA and DE100 board IRQs are
110 {2,3,4,5,7}, whereas the DE200 is at {5,9,10,11,15}. Note that IRQ2 is
111 really IRQ9 in machines with 16 IRQ lines.
112
113 No 16MB memory limitation should exist with this driver as DMA is not
114 used and the common memory area is in low memory on the network card (my
115 current system has 20MB and I've not had problems yet).
116
117 The ability to load this driver as a loadable module has been added. To
118 utilise this ability, you have to do <8 things:
119
120 1) copy depca.c from the /linux/drivers/net directory to your favourite
121 temporary directory.
122 2) edit the source code near line 1530 to reflect the I/O address and
123 IRQ you're using.
124 3) compile depca.c, but include -DMODULE in the command line to ensure
125 that the correct bits are compiled (see end of source code).
126 4) if you are wanting to add a new card, goto 5. Otherwise, recompile a
127 kernel with the depca configuration turned off and reboot.
128 5) insmod depca.o
129 6) run the net startup bits for your eth?? interface manually
130 (usually /etc/rc.inet[12] at boot time).
131 7) enjoy!
132
133 Note that autoprobing is not allowed in loadable modules - the system is
134 already up and running and you're messing with interrupts. Also, there
135 is no way to check on the number of depcas installed at the moment.
136
137 To unload a module, turn off the associated interface
138 'ifconfig eth?? down' then 'rmmod depca'.
139
140 TO DO:
141 ------
142
143 1. Implement the 2k buffer mode - does anyone need it??
144
145 Revision History
146 ----------------
147
148 Version Date Description
149
150 0.1 25-jan-94 Initial writing.
151 0.2 27-jan-94 Added LANCE TX hardware buffer chaining.
152 0.3 1-feb-94 Added multiple DEPCA support.
153 0.31 4-feb-94 Added DE202 recognition.
154 0.32 19-feb-94 Tidy up. Improve multi-DEPCA support.
155 0.33 25-feb-94 Fix DEPCA ethernet ROM counter enable.
156 Add jabber packet fix from murf@perftech.com
157 and becker@super.org
158 0.34 7-mar-94 Fix DEPCA max network memory RAM & NICSR access.
159 0.35 8-mar-94 Added DE201 recognition. Tidied up.
160 0.351 30-apr-94 Added EISA support. Added DE422 recognition.
161 0.36 16-may-94 DE422 fix released.
162 0.37 22-jul-94 Added MODULE support
163 0.38 15-aug-94 Added DBR ROM switch in depca_close().
164 Multi DEPCA bug fix.
165
166 =========================================================================
167 */
168
169 static char *version = "depca.c:v0.38 8/15/94 davies@wanton.lkg.dec.com\n";
170
171 #include <stdarg.h>
172 #include <linux/config.h>
173 #include <linux/kernel.h>
174 #include <linux/sched.h>
175 #include <linux/string.h>
176 #include <linux/ptrace.h>
177 #include <linux/errno.h>
178 #include <linux/ioport.h>
179 #include <linux/malloc.h>
180 #include <linux/interrupt.h>
181 #include <asm/bitops.h>
182 #include <asm/io.h>
183 #include <asm/dma.h>
184
185 #include <linux/netdevice.h>
186 #include <linux/etherdevice.h>
187 #include <linux/skbuff.h>
188
189 #ifdef MODULE
190 #include <linux/module.h>
191 #include "/linux/tools/version.h"
192 #endif /* MODULE */
193
194 #include "depca.h"
195
196 #ifdef DEPCA_DEBUG
197 static int depca_debug = DEPCA_DEBUG;
198 #else
199 static int depca_debug = 1;
200 #endif
201
202 #ifndef PROBE_LENGTH
203 #define PROBE_LENGTH 32
204 #endif
205
206 #ifndef PROBE_SEQUENCE
207 #define PROBE_SEQUENCE "FF0055AAFF0055AA"
208 #endif
209
210 #ifndef DEPCA_SIGNATURE
211 #define DEPCA_SIGNATURE {"DEPCA","DE100",\
212 "DE200","DE201","DE202","DE210",\
213 "DE422",\
214 ""}
215 #define DEPCA_NAME_LENGTH 8
216 #endif
217
218 #ifndef DEPCA_RAM_BASE_ADDRESSES
219 #define DEPCA_RAM_BASE_ADDRESSES {0xc0000,0xd0000,0xe0000,0x00000}
220 #endif
221 static short mem_chkd = 0; /* holds which base addrs have been */
222 /* checked, for multi-DEPCA case */
223
224 #ifndef DEPCA_IO_PORTS
225 #define DEPCA_IO_PORTS {0x300, 0x200, 0}
226 #endif
227
228 #ifndef DEPCA_TOTAL_SIZE
229 #define DEPCA_TOTAL_SIZE 0x10
230 #endif
231
232 #ifndef MAX_NUM_DEPCAS
233 #define MAX_NUM_DEPCAS 2
234 #endif
235
236 #ifndef DEPCA_EISA_IO_PORTS
237 #define DEPCA_EISA_IO_PORTS 0x0c00 /* I/O port base address, slot 0 */
238 #endif
239
240 #ifndef MAX_EISA_SLOTS
241 #define MAX_EISA_SLOTS 8
242 #endif
243
244 /*
245 ** Set the number of Tx and Rx buffers.
246 */
247 #ifndef DEPCA_BUFFER_LOG_SZ
248 #define RING_SIZE 16 /* 16 buffers */
249 #else
250 #define RING_SIZE (1 << (DEPCA_BUFFERS_LOG_SZ))
251 #endif /* DEPCA_BUFFER_LOG_SZ */
252
253 #define PKT_BUF_SZ 1544 /* Buffer size for each Tx/Rx buffer */
254 #define PKT_SZ 1514 /* Maximum ethernet packet length */
255 #define DAT_SZ 1500 /* Maximum ethernet data length */
256 #define PKT_HDR_LEN 14 /* Addresses and data length info */
257
258 #ifdef HAVE_MULTICAST
259 #ifndef CRC_POLYNOMIAL
260 #define CRC_POLYNOMIAL 0x04c11db7 /* Ethernet CRC polynomial */
261 #endif /* CRC_POLYNOMIAL */
262 #endif /* HAVE_MULTICAST */
263
264 /*
265 ** The DEPCA Rx and Tx ring descriptors.
266 */
267 struct depca_rx_head {
268 long base;
269 short buf_length; /* This length is negative 2's complement! */
270 short msg_length; /* This length is "normal". */
271 };
272
273 struct depca_tx_head {
274 long base;
275 short length; /* This length is negative 2's complement! */
276 short misc; /* Errors and TDR info */
277 };
278
279 #define LA_MASK 0x0000ffff /* LANCE address mask for mapping network RAM
280 to LANCE memory address space */
281
282 /*
283 ** The Lance initialization block, described in databook, in common memory.
284 */
285 struct depca_init {
286 unsigned short mode; /* Mode register */
287 unsigned char phys_addr[ETH_ALEN]; /* Physical ethernet address */
288 unsigned short filter[4]; /* Multicast filter. */
289 unsigned long rx_ring; /* Rx ring base pointer & ring length */
290 unsigned long tx_ring; /* Tx ring base pointer & ring length */
291 };
292
293 struct depca_private {
294 char devname[8]; /* Device Product String */
295 struct depca_rx_head *rx_ring; /* Pointer to start of RX descriptor ring */
296 struct depca_tx_head *tx_ring; /* Pointer to start of TX descriptor ring */
297 struct depca_init init_block;/* Initialization block */
298 long bus_offset; /* (E)ISA bus address offset vs LANCE */
299 long dma_buffs; /* Start address of Rx and Tx buffers. */
300 int cur_rx, cur_tx; /* The next free ring entry */
301 int dirty_rx, dirty_tx; /* The ring entries to be free()ed. */
302 int dma;
303 struct enet_statistics stats;
304 char depca_na; /* NICSR access width: 0=>byte, 1=>word */
305 short ringSize; /* ring size based on available memory */
306 short rmask; /* modulus mask based on ring size */
307 long rlen; /* log2(ringSize) for the descriptors */
308 };
309
310 /*
311 ** Public Functions
312 */
313 static int depca_open(struct device *dev);
314 static int depca_start_xmit(struct sk_buff *skb, struct device *dev);
315 static void depca_interrupt(int reg_ptr);
316 static int depca_close(struct device *dev);
317 static struct enet_statistics *depca_get_stats(struct device *dev);
318 #ifdef HAVE_MULTICAST
319 static void set_multicast_list(struct device *dev, int num_addrs, void *addrs);
320 #endif
321
322 /*
323 ** Private functions
324 */
325 static int depca_probe1(struct device *dev, short ioaddr);
326 static void depca_init_ring(struct device *dev);
327 static int depca_rx(struct device *dev);
328 static int depca_tx(struct device *dev);
329
330 static void LoadCSRs(struct device *dev);
331 static int InitRestartDepca(struct device *dev);
332 static char *DepcaSignature(unsigned long mem_addr);
333 static int DevicePresent(short ioaddr);
334 #ifdef HAVE_MULTICAST
335 static void SetMulticastFilter(int num_addrs, char *addrs, char *multicast_table);
336 #endif
337
338 #ifndef MODULE
339 static struct device *isa_probe(struct device *dev);
340 static struct device *eisa_probe(struct device *dev);
341 static struct device *alloc_device(struct device *dev, int ioaddr);
342
343 static int num_depcas = 0, num_eth = 0, autoprobed = 0;
344
345 #else
346 int init_module(void);
347 void cleanup_module(void);
348
349 #endif /* MODULE */
350
351 /*
352 ** Miscellaneous defines...
353 */
354 #define STOP_DEPCA \
355 outw(CSR0, DEPCA_ADDR);\
356 outw(STOP, DEPCA_DATA)
357
358
359
360
361 int depca_probe(struct device *dev)
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*/
362 {
363 short base_addr = dev->base_addr;
364 int status = -ENODEV;
365 #ifndef MODULE
366 struct device *eth0;
367 #endif
368
369 if (base_addr > 0x1ff) { /* Check a single specified location. */
370 if (DevicePresent(base_addr) == 0) { /* Is DEPCA really here? */
371 status = depca_probe1(dev, base_addr);
372 }
373 } else if (base_addr > 0) { /* Don't probe at all. */
374 status = -ENXIO;
375
376 #ifdef MODULE
377 } else {
378 printk("Autoprobing is not supported when loading a module based driver.\n");
379 status = -EIO;
380 #else
381 } else if (!autoprobed) { /* First probe for the DEPCA test */
382 /* pattern in ROM */
383 eth0=isa_probe(dev);
384 eth0=eisa_probe(eth0);
385 if (dev->priv) status=0;
386 autoprobed = 1;
387 } else {
388 status = -ENXIO;
389 #endif /* MODULE */
390
391 }
392
393 if (status) dev->base_addr = base_addr;
394
395 return status; /* ENODEV would be more accurate. */
396 }
397
398 static int
399 depca_probe1(struct device *dev, short ioaddr)
/* ![[previous]](../icons/left.png)
*/
400 {
401 struct depca_private *lp;
402 int i,j, status=0;
403 unsigned long mem_start, mem_base[] = DEPCA_RAM_BASE_ADDRESSES;
404 char *name = NULL;
405 unsigned int nicsr, offset, netRAM;
406
407
408 /*
409 ** Stop the DEPCA. Enable the DBR ROM. Disable interrupts and remote boot.
410 */
411 STOP_DEPCA;
412
413 nicsr = inb(DEPCA_NICSR);
414 nicsr = ((nicsr & ~SHE & ~RBE & ~IEN) | IM);
415 outb(nicsr, DEPCA_NICSR);
416
417 if (inw(DEPCA_DATA) == STOP) {
418
419 /* Now find out what kind of DEPCA we have. The DE100 uses a different
420 ** addressing scheme for some registers compared to the DE2xx series.
421 ** Note that a base address location is marked as checked if no DEPCA is
422 ** there or one is found (when the search is immediately terminated). This
423 ** shortens the search time a little for multiple DEPCAs.
424 */
425
426 for (j = 0, i = 0; mem_base[i] && (j == 0);i++) {
427 if (((mem_chkd >> i) & 0x01) == 0) { /* has the memory been checked? */
428 name = DepcaSignature(mem_base[i]);/* check for a DEPCA here */
429 mem_chkd |= (0x01 << i); /* mark location checked */
430 if (*name != '\0') { /* one found? */
431 j = 1; /* set exit flag */
432 --i;
433 }
434 }
435 }
436
437 if (*name != '\0') { /* found a DEPCA device */
438 mem_start = mem_base[i];
439 dev->base_addr = ioaddr;
440
441 if ((ioaddr&0x0fff)==DEPCA_EISA_IO_PORTS) {/* EISA slot address */
442 printk("%s: %s at %#3x (EISA slot %d)",
443 dev->name, name, ioaddr, ((ioaddr>>12)&0x0f));
444 } else { /* ISA port address */
445 printk("%s: %s at %#3x", dev->name, name, ioaddr);
446 }
447
448 /* There is a 32 byte station address PROM at DEPCA_PROM address.
449 The first six bytes are the station address. They can be read
450 directly since the signature search set up the ROM address
451 counter correctly just before this function.
452
453 For the DE100 we have to be careful about which port is used to
454 read the ROM info.
455 */
456
457 if (strstr(name,"DE100")!= NULL) {
458 j = 1;
459 } else {
460 j = 0;
461 }
462
463 printk(", h/w address ");
464 for (i = 0; i < ETH_ALEN - 1; i++) { /* get the ethernet address */
465 printk("%2.2x:", dev->dev_addr[i] = inb(DEPCA_PROM + j));
466 }
467 printk("%2.2x", dev->dev_addr[i] = inb(DEPCA_PROM + j));
468
469 for (;i<32;i++) { /* leave ROM counter in known state */
470 j=inb(DEPCA_PROM);
471 }
472
473 #ifdef HAVE_PORTRESERVE
474 snarf_region(ioaddr, DEPCA_TOTAL_SIZE);
475 #endif
476
477 /*
478 ** Set up the maximum amount of network RAM(kB)
479 */
480 if (strstr(name,"DEPCA")== NULL) {
481 netRAM=64;
482 } else {
483 netRAM=48;
484 }
485
486 /*
487 ** Determine the base address for the DEPCA RAM from the NI-CSR
488 ** and make up a DEPCA-specific-data structure.
489 */
490
491 if (nicsr & BUF) {
492 offset = 0x8000; /* 32kbyte RAM offset*/
493 nicsr &= ~BS; /* DEPCA RAM in top 32k */
494 printk(",\n has %dkB RAM", netRAM - 32);
495 } else if ((nicsr & _128KB) && (netRAM!=48)) {
496 offset = 0x0000;
497 printk(",\n has 128kB RAM");
498 } else {
499 offset = 0x0000; /* 64k/48k bytes RAM */
500 printk(",\n has %dkB RAM", netRAM);
501 }
502
503 mem_start += offset; /* (E)ISA start address */
504 printk(" at 0x%.5lx", mem_start);
505
506 /*
507 ** Enable the shadow RAM.
508 */
509 if (strstr(name,"DEPCA") == NULL) {
510 nicsr |= SHE;
511 outb(nicsr, DEPCA_NICSR);
512 }
513
514 /*
515 ** Calculate the ring size based on the available RAM
516 ** found above. Allocate an equal number of buffers, each
517 ** of size PKT_BUF_SZ (1544 bytes) to the Tx and Rx, allowing one
518 ** descriptor entry (8 bytes) for each buffer. Make sure
519 ** that this ring size is <= RING_SIZE. The ring size must be
520 ** a power of 2.
521 */
522
523 j = (((netRAM << 10) - offset - sizeof(struct depca_private)) /
524 (PKT_BUF_SZ + 8)) >> 1;
525 for (i=0;j>1;i++) {
526 j >>= 1;
527 }
528
529 /* Hold the ring size information here before the depca
530 ** private structure is allocated. Need this for the memory
531 ** space calculations.
532 */
533 j = 1 << i;
534
535 /*
536 ** Set up memory information in the device structure.
537 ** Align the descriptor rings on an 8 byte (quadword) boundary.
538 **
539 ** depca_private area
540 ** rx ring descriptors
541 ** tx ring descriptors
542 ** rx buffers
543 ** tx buffers
544 **
545 */
546
547 /* private area & initialise */
548 dev->priv = (void *)((mem_start + 0x07) & ~0x07);
549 lp = (struct depca_private *)dev->priv;
550 memset(dev->priv, 0, sizeof(struct depca_private));
551 strcpy(lp->devname,name);
552
553 /* Tx & Rx descriptors (aligned to a quadword boundary) */
554 mem_start = ((((unsigned long)dev->priv +
555 sizeof(struct depca_private)) +
556 (unsigned long)0x07) & (unsigned long)~0x07);
557 lp->rx_ring = (struct depca_rx_head *)mem_start;
558
559 mem_start += (sizeof(struct depca_rx_head) * j);
560 lp->tx_ring = (struct depca_tx_head *)mem_start;
561
562 mem_start += (sizeof(struct depca_tx_head) * j);
563 lp->bus_offset = mem_start & 0x00ff0000;
564 mem_start &= LA_MASK; /* LANCE re-mapped start address */
565
566 lp->dma_buffs = mem_start;
567
568 mem_start += (PKT_BUF_SZ * j);
569 /* (mem_start now points to the start of the Tx buffers) */
570
571 /* Initialise the data structures wrt CPU */
572 memset(lp->rx_ring, 0, sizeof(struct depca_rx_head)*j);
573 memset(lp->tx_ring, 0, sizeof(struct depca_tx_head)*j);
574
575 /* This should never happen. */
576 if ((int)(lp->rx_ring) & 0x07) {
577 printk("\n **ERROR** DEPCA Rx and Tx descriptor rings not on a quadword boundary.\n");
578 return -ENXIO;
579 }
580
581 /*
582 ** Finish initialising the ring information.
583 */
584 lp->ringSize = j;
585 if (lp->ringSize > RING_SIZE) lp->ringSize = RING_SIZE;
586 lp->rmask = lp->ringSize - 1;
587
588 /*
589 ** calculate the real RLEN size for the descriptors. It is
590 ** log2(ringSize).
591 */
592 for (i=0, j = lp->ringSize; j>1; i++) {
593 j >>= 1;
594 }
595 lp->rlen = (unsigned long)(i << 29);
596
597 /*
598 ** load the initialisation block
599 */
600 depca_init_ring(dev);
601
602 /*
603 ** Initialise the control and status registers
604 */
605 LoadCSRs(dev);
606
607 /*
608 ** Enable DEPCA board interrupts for autoprobing
609 */
610 nicsr = ((nicsr & ~IM)|IEN);
611 outb(nicsr, DEPCA_NICSR);
612
613 /* The DMA channel may be passed in on this parameter. */
614 dev->dma = 0;
615
616 /* To auto-IRQ we enable the initialization-done and DMA err,
617 interrupts. For now we will always get a DMA error. */
618 if (dev->irq < 2) {
619 #ifndef MODULE
620 autoirq_setup(0);
621
622 /* Trigger an initialization just for the interrupt. */
623 outw(INEA | INIT, DEPCA_DATA);
624
625 dev->irq = autoirq_report(1);
626 if (dev->irq) {
627 printk(" and uses IRQ%d.\n", dev->irq);
628 } else {
629 printk(" and failed to detect IRQ line.\n");
630 status = -EAGAIN;
631 }
632 #endif /* MODULE */
633 } else {
634 printk(" and assigned IRQ%d.\n", dev->irq);
635 }
636 } else {
637 status = -ENXIO;
638 }
639 if (!status) {
640 if (depca_debug > 0) {
641 printk(version);
642 }
643
644 /* The DEPCA-specific entries in the device structure. */
645 dev->open = &depca_open;
646 dev->hard_start_xmit = &depca_start_xmit;
647 dev->stop = &depca_close;
648 dev->get_stats = &depca_get_stats;
649 #ifdef HAVE_MULTICAST
650 dev->set_multicast_list = &set_multicast_list;
651 #endif
652
653 dev->mem_start = 0;
654
655 /* Fill in the generic field of the device structure. */
656 ether_setup(dev);
657 }
658 } else {
659 status = -ENXIO;
660 }
661
662 return status;
663 }
664
665
666 static int
667 depca_open(struct device *dev)
/* */
668 {
669 struct depca_private *lp = (struct depca_private *)dev->priv;
670 int i,nicsr,ioaddr = dev->base_addr;
671
672 if (request_irq(dev->irq, &depca_interrupt, 0, "depca")) {
673 printk("depca_open(): Requested IRQ%d is busy\n",dev->irq);
674 return -EAGAIN;
675 }
676
677 irq2dev_map[dev->irq] = dev;
678
679 /*
680 ** Stop the DEPCA & get the board status information.
681 */
682 STOP_DEPCA;
683 nicsr = inb(DEPCA_NICSR);
684
685 /*
686 ** Make sure the shadow RAM is enabled
687 */
688 if (strstr(lp->devname,"DEPCA") == NULL) {
689 nicsr |= SHE;
690 outb(nicsr, DEPCA_NICSR);
691 }
692
693 /*
694 ** Re-initialize the DEPCA...
695 */
696 depca_init_ring(dev); /* initialize the descriptor rings */
697 LoadCSRs(dev);
698
699 if (depca_debug > 1){
700 printk("%s: depca open with irq %d\n",dev->name,dev->irq);
701 printk("Descriptor head addresses:\n");
702 printk("\t0x%8.8lx 0x%8.8lx\n",(long)lp->rx_ring,(long)lp->tx_ring);
703 printk("Descriptor addresses:\n");
704 for (i=0;i<lp->ringSize;i++){
705 printk("\t0x%8.8lx 0x%8.8lx\n",(long)&lp->rx_ring[i].base,
706 (long)&lp->tx_ring[i].base);
707 }
708 printk("Buffer addresses:\n");
709 for (i=0;i<lp->ringSize;i++){
710 printk("\t0x%8.8lx 0x%8.8lx\n",(long)lp->rx_ring[i].base,
711 (long)lp->tx_ring[i].base);
712 }
713 printk("Initialisation block at 0x%8.8lx\n",(long)&lp->init_block);
714 printk("\tmode: 0x%4.4x\n",lp->init_block.mode);
715 printk("\tphysical address: ");
716 for (i=0;i<6;i++){
717 printk("%2.2x:",(short)lp->init_block.phys_addr[i]);
718 }
719 printk("\n\tlogical address filter: 0x");
720 for (i=0;i<4;i++){
721 printk("%2.2x",(short)lp->init_block.filter[i]);
722 }
723 printk("\n\trx_ring at: 0x%8.8lx\n",(long)lp->init_block.rx_ring);
724 printk("\ttx_ring at: 0x%8.8lx\n",(long)lp->init_block.tx_ring);
725 printk("dma_buffs: 0x%8.8lx\n",(long)lp->dma_buffs);
726 printk("Ring size: %d\nMask: 0x%2.2x\nLog2(ringSize): 0x%8.8lx\n",
727 (short)lp->ringSize,
728 (char)lp->rmask,
729 (long)lp->rlen);
730 outw(CSR2,DEPCA_ADDR);
731 printk("CSR2&1: 0x%4.4x",inw(DEPCA_DATA));
732 outw(CSR1,DEPCA_ADDR);
733 printk("%4.4x\n",inw(DEPCA_DATA));
734 outw(CSR3,DEPCA_ADDR);
735 printk("CSR3: 0x%4.4x\n",inw(DEPCA_DATA));
736 }
737
738 /*
739 ** Enable DEPCA board interrupts and turn off LED
740 */
741 nicsr = ((nicsr & ~IM & ~LED)|IEN);
742 outb(nicsr, DEPCA_NICSR);
743 outw(CSR0,DEPCA_ADDR);
744
745 dev->tbusy = 0;
746 dev->interrupt = 0;
747 dev->start = 1;
748
749 InitRestartDepca(dev); /* ignore the return status */
750
751 if (depca_debug > 1){
752 printk("CSR0: 0x%4.4x\n",inw(DEPCA_DATA));
753 printk("nicsr: 0x%02x\n",inb(DEPCA_NICSR));
754 }
755
756 #ifdef MODULE
757 MOD_INC_USE_COUNT;
758 #endif
759
760 return 0; /* Always succeed */
761 }
762
763 /* Initialize the lance Rx and Tx descriptor rings. */
764 static void
765 depca_init_ring(struct device *dev)
/* */
766 {
767 struct depca_private *lp = (struct depca_private *)dev->priv;
768 unsigned long i;
769
770 lp->init_block.mode = DTX | DRX; /* Disable Rx and Tx. */
771 lp->cur_rx = lp->cur_tx = 0;
772 lp->dirty_rx = lp->dirty_tx = 0;
773
774 /* Initialize the base addresses and length of each buffer in the ring */
775 for (i = 0; i < lp->ringSize; i++) {
776 lp->rx_ring[i].base = (lp->dma_buffs + i*PKT_BUF_SZ) | R_OWN;
777 lp->rx_ring[i].buf_length = -PKT_BUF_SZ;
778 lp->tx_ring[i].base = (lp->dma_buffs + (i+lp->ringSize) * PKT_BUF_SZ) &
779 (unsigned long)(0x00ffffff);
780 }
781
782 /* Set up the initialization block */
783 for (i = 0; i < ETH_ALEN; i++) {
784 lp->init_block.phys_addr[i] = dev->dev_addr[i];
785 }
786 for (i = 0; i < 4; i++) {
787 lp->init_block.filter[i] = 0x0000;
788 }
789 lp->init_block.rx_ring = ((unsigned long)lp->rx_ring & LA_MASK) | lp->rlen;
790 lp->init_block.tx_ring = ((unsigned long)lp->tx_ring & LA_MASK) | lp->rlen;
791
792 lp->init_block.mode = 0x0000; /* Enable the Tx and Rx */
793 }
794
795 /*
796 ** Writes a socket buffer to TX descriptor ring and starts transmission
797 */
798 static int
799 depca_start_xmit(struct sk_buff *skb, struct device *dev)
/* */
800 {
801 struct depca_private *lp = (struct depca_private *)dev->priv;
802 int ioaddr = dev->base_addr;
803 int status = 0;
804
805 /* Transmitter timeout, serious problems. */
806 if (dev->tbusy) {
807 int tickssofar = jiffies - dev->trans_start;
808 if (tickssofar < 10) {
809 status = -1;
810 } else {
811 printk("%s: transmit timed out, status %04x, resetting.\n",
812 dev->name, inw(DEPCA_DATA));
813
814 STOP_DEPCA;
815 depca_init_ring(dev);
816 LoadCSRs(dev);
817 InitRestartDepca(dev);
818 dev->tbusy=0;
819 dev->trans_start = jiffies;
820 }
821 return status;
822 }
823
824 if (skb == NULL) {
825 dev_tint(dev);
826 return 0;
827 }
828
829 if (skb->len <= 0) {
830 return 0;
831 }
832
833 if (depca_debug > 3) {
834 outw(CSR0, DEPCA_ADDR);
835 printk("%s: depca_start_xmit() called, csr0 %4.4x.\n", dev->name,
836 inw(DEPCA_DATA));
837 }
838
839 /* Block a timer-based transmit from overlapping. This could better be
840 done with atomic_swap(1, dev->tbusy), but set_bit() works as well. */
841 if (set_bit(0, (void*)&dev->tbusy) != 0)
842 printk("%s: Transmitter access conflict.\n", dev->name);
843
844 /*
845 ** The TX buffer, skb, has to be copied into the local network RAM
846 ** for the LANCE to access it. The skb may be at > 16MB for large
847 ** (memory) systems.
848 */
849 { /* Fill in a Tx ring entry */
850 unsigned char *buf;
851 int entry = lp->cur_tx++;
852 int len;
853 long skbL = skb->len;
854 char *p = (char *) skb->data;
855
856 entry &= lp->rmask; /* Ring around buffer number. */
857 buf = (unsigned char *)((lp->tx_ring[entry].base+lp->bus_offset) &
858 0x00ffffff);
859
860 /* Wait for a full ring to free up */
861 while (lp->tx_ring[entry].base < 0);
862
863 /*
864 ** Caution: the write order is important here... don't set up the
865 ** ownership rights until all the other information is in place.
866 */
867 len = ((skbL > PKT_SZ) ? PKT_SZ : skbL); /* skb too long */
868 if (len < ETH_ZLEN) len = ETH_ZLEN; /* len too short */
869 skbL -= len;
870 lp->tx_ring[entry].length = -len;
871
872 /* Clears various error flags */
873 lp->tx_ring[entry].misc = 0x0000;
874
875 /* copy the data from the socket buffer to the net memory */
876 memcpy((unsigned char *)(buf), skb->data, len);
877
878 /* Hand over buffer ownership to the LANCE */
879 if (skbL <= 0) lp->tx_ring[entry].base |= (T_ENP);
880 lp->tx_ring[entry].base |= (T_OWN|T_STP);
881
882 /* Trigger an immediate send demand. */
883 outw(CSR0, DEPCA_ADDR);
884 outw(INEA | TDMD, DEPCA_DATA);
885
886 dev->trans_start = jiffies;
887
888 for (p += len; skbL > 0; p += len) {
889
890 /* Get new buffer pointer */
891 entry = lp->cur_tx++;
892 entry &= lp->rmask; /* Ring around buffer number. */
893 buf = (unsigned char *)((lp->tx_ring[entry].base+lp->bus_offset) &
894 0x00ffffff);
895
896 /* Wait for a full ring to free up */
897 while (lp->tx_ring[entry].base < 0);
898 dev->tbusy=0;
899
900 /* Copy ethernet header to the new buffer */
901 memcpy((unsigned char *)buf, skb->data, PKT_HDR_LEN);
902
903 /* Determine length of data buffer */
904 len = ((skbL > DAT_SZ) ? DAT_SZ : skbL); /* skbL too long */
905 if (len < ETH_ZLEN) len = ETH_ZLEN; /* len too short */
906 skbL -= len;
907 lp->tx_ring[entry].length = -len;
908
909 /* Clears various error flags */
910 lp->tx_ring[entry].misc = 0x0000;
911
912 /* copy the data from the socket buffer to the net memory */
913 memcpy((unsigned char *)(buf + PKT_HDR_LEN), (unsigned char *)p, len);
914
915 /* Hand over buffer ownership to the LANCE */
916 if (skbL <= 0) lp->tx_ring[entry].base |= T_ENP;
917 lp->tx_ring[entry].base |= T_OWN;
918 }
919
920 if (depca_debug > 4) {
921 unsigned char *pkt =
922 (unsigned char *)((lp->tx_ring[entry].base+lp->bus_offset) &
923 0x00ffffff);
924
925 printk("%s: tx ring[%d], %#lx, sk_buf %#lx len %d.\n",
926 dev->name, entry, (unsigned long) &lp->tx_ring[entry],
927 lp->tx_ring[entry].base, -lp->tx_ring[entry].length);
928 printk("%s: Tx %2.2x %2.2x %2.2x ... %2.2x %2.2x %2.2x %2.2x...%2.2x len %2.2x %2.2x %2.2x %2.2x.\n",
929 dev->name, pkt[0], pkt[1], pkt[2], pkt[5], pkt[6],
930 pkt[7], pkt[8], pkt[11], pkt[12], pkt[13],
931 pkt[14], pkt[15]);
932 }
933
934 /* Check if the TX ring is full or not - 'tbusy' cleared if not full. */
935 if (lp->tx_ring[(entry+1) & lp->rmask].base >= 0) {
936 dev->tbusy=0;
937 }
938
939 dev_kfree_skb (skb, FREE_WRITE);
940 }
941
942 return 0;
943 }
944
945 /*
946 ** The DEPCA interrupt handler.
947 */
948 static void
949 depca_interrupt(int reg_ptr)
/* */
950 {
951 int irq = -(((struct pt_regs *)reg_ptr)->orig_eax+2);
952 struct device *dev = (struct device *)(irq2dev_map[irq]);
953 struct depca_private *lp;
954 int csr0, ioaddr, nicsr;
955
956 if (dev == NULL) {
957 printk ("depca_interrupt(): irq %d for unknown device.\n", irq);
958 } else {
959 lp = (struct depca_private *)dev->priv;
960 ioaddr = dev->base_addr;
961
962 if (dev->interrupt)
963 printk("%s: Re-entering the interrupt handler.\n", dev->name);
964
965 dev->interrupt = MASK_INTERRUPTS;
966
967 /* mask the DEPCA board interrupts and turn on the LED */
968 nicsr = inb(DEPCA_NICSR);
969 nicsr |= (IM|LED);
970 outb(nicsr, DEPCA_NICSR);
971
972 outw(CSR0, DEPCA_ADDR);
973 csr0 = inw(DEPCA_DATA);
974
975 /* Acknowledge all of the current interrupt sources ASAP. */
976 outw(csr0 & ~(INEA|TDMD|STOP|STRT|INIT), DEPCA_DATA);
977
978 if (depca_debug > 5)
979 printk("%s: interrupt csr0=%#2.2x new csr=%#2.2x.\n",
980 dev->name, csr0, inw(DEPCA_DATA));
981
982 if (csr0 & RINT) /* Rx interrupt (packet arrived) */
983 depca_rx(dev);
984
985 if (csr0 & TINT) /* Tx interrupt (packet sent) */
986 depca_tx(dev);
987
988 /* Clear the interrupts we've handled. */
989 outw(CSR0, DEPCA_ADDR);
990 outw(BABL|CERR|MISS|MERR|RINT|TINT|IDON|INEA, DEPCA_DATA);
991
992 if (depca_debug > 4) {
993 printk("%s: exiting interrupt, csr%d=%#4.4x.\n",
994 dev->name, inw(DEPCA_ADDR),
995 inw(DEPCA_DATA));
996 }
997
998 /* Unmask the DEPCA board interrupts and turn off the LED */
999 nicsr = (nicsr & ~IM & ~LED);
1000 outb(nicsr, DEPCA_NICSR);
1001 dev->interrupt = UNMASK_INTERRUPTS;
1002 }
1003
1004 return;
1005 }
1006
1007 static int
1008 depca_rx(struct device *dev)
/* */
1009 {
1010 struct depca_private *lp = (struct depca_private *)dev->priv;
1011 int entry = lp->cur_rx & lp->rmask;
1012
1013 /* If we own the next entry, it's a new packet. Send it up. */
1014 for (; lp->rx_ring[entry].base >= 0; entry = (++lp->cur_rx) & lp->rmask) {
1015 int status = lp->rx_ring[entry].base >> 16 ;
1016 int chained;
1017
1018 /*
1019 ** There is a tricky error noted by John Murphy, <murf@perftech.com>
1020 ** to Russ Nelson: even with full-sized buffers, it's possible for a
1021 ** jabber packet to use two buffers, with only the last one correctly
1022 ** noting the error.
1023 */
1024
1025 /* Check for a chaining buffer */
1026 chained = 0;
1027 if (status == R_STP) {
1028 chained = 1;
1029
1030 /*
1031 ** Wait for next buffer to complete to check for errors. This
1032 ** is slow but infrequent and allows for correct hardware buffer
1033 ** chaining (whilst defeating the chaining's purpose).
1034 */
1035 while ((status=(lp->rx_ring[(entry+1)&lp->rmask].base >> 16)) < 0);
1036
1037 /* NB: 'status' now comes from the buffer following 'entry'. */
1038 }
1039
1040 if (status & R_ERR) { /* There was an error. */
1041 lp->stats.rx_errors++; /* Update the error stats. */
1042 if (status & R_FRAM) lp->stats.rx_frame_errors++;
1043 if (status & R_OFLO) lp->stats.rx_over_errors++;
1044 if (status & R_CRC) lp->stats.rx_crc_errors++;
1045 if (status & R_BUFF) lp->stats.rx_fifo_errors++;
1046 } else { /* Malloc up new buffer, compatible with net-2e. */
1047 short pkt_len = lp->rx_ring[entry].msg_length;
1048 struct sk_buff *skb;
1049
1050 skb = alloc_skb(pkt_len, GFP_ATOMIC);
1051 if (skb == NULL) {
1052 printk("%s: Memory squeeze, deferring packet.\n", dev->name);
1053 lp->stats.rx_dropped++; /* Really, deferred. */
1054 break;
1055 }
1056 skb->len = pkt_len;
1057 skb->dev = dev;
1058 memcpy(skb->data,
1059 (unsigned char *)((lp->rx_ring[entry].base+lp->bus_offset) &
1060 0x00ffffff),
1061 pkt_len);
1062 /*
1063 ** Notify the upper protocol layers that there is another
1064 ** packet to handle
1065 */
1066 netif_rx(skb);
1067 lp->stats.rx_packets++;
1068 }
1069
1070 /* turn over ownership of the current entry back to the LANCE */
1071 lp->rx_ring[entry].base |= R_OWN;
1072 if (chained && (status & R_ERR)) { /* next entry also bad */
1073 entry = (++lp->cur_rx) & lp->rmask;
1074 lp->rx_ring[entry].base |= R_OWN;
1075 }
1076 }
1077
1078 /*
1079 ** We should check that at least two ring entries are free. If not,
1080 ** we should free one and mark stats->rx_dropped++.
1081 */
1082
1083 return 0;
1084 }
1085
1086 /*
1087 ** Buffer sent - check for buffer errors.
1088 */
1089 static int
1090 depca_tx(struct device *dev)
/* */
1091 {
1092 struct depca_private *lp = (struct depca_private *)dev->priv;
1093 int dirty_tx = lp->dirty_tx & lp->rmask;
1094
1095 if (depca_debug > 5)
1096 printk("%s: Cleaning tx ring, dirty %d clean %d.\n",
1097 dev->name, dirty_tx, (lp->cur_tx & lp->rmask));
1098
1099 /*
1100 ** While the dirty entry is not the current one AND
1101 ** the LANCE doesn't own it...
1102 */
1103 for (; dirty_tx!=(lp->cur_tx & lp->rmask) && lp->tx_ring[dirty_tx].base>0;
1104 dirty_tx = ++lp->dirty_tx & lp->rmask) {
1105 unsigned long *tmdp = (unsigned long *)(&lp->tx_ring[dirty_tx]);
1106 int status = lp->tx_ring[dirty_tx].base >> 16;
1107
1108 if (status < 0) { /* Packet not yet sent! */
1109 printk("interrupt for packet not yet sent!\n");
1110 break;
1111 }
1112 if (status & T_ERR) { /* There was an major error, log it. */
1113 int err_status = lp->tx_ring[dirty_tx].misc;
1114
1115 lp->stats.tx_errors++;
1116 if (err_status & TMD3_RTRY) lp->stats.tx_aborted_errors++;
1117 if (err_status & TMD3_LCAR) lp->stats.tx_carrier_errors++;
1118 if (err_status & TMD3_LCOL) lp->stats.tx_window_errors++;
1119 if (err_status & TMD3_UFLO) lp->stats.tx_fifo_errors++;
1120 /* We should re-init() after the FIFO error. */
1121 } else if (status & (T_MORE | T_ONE)) {
1122 lp->stats.collisions++;
1123 } else {
1124 lp->stats.tx_packets++;
1125 }
1126
1127 if (depca_debug > 5)
1128 printk("%s: Tx done entry %d, %4.4lx %4.4lx %4.4lx %4.4lx.\n",
1129 dev->name, dirty_tx,
1130 tmdp[0], tmdp[1], tmdp[2], tmdp[3]);
1131 }
1132 /*mark_bh(INET_BH);*/
1133 return 0;
1134 }
1135
1136 static int
1137 depca_close(struct device *dev)
/* */
1138 {
1139 struct depca_private *lp = (struct depca_private *)dev->priv;
1140 int nicsr, ioaddr = dev->base_addr;
1141
1142 dev->start = 0;
1143 dev->tbusy = 1;
1144
1145 outw(CSR0, DEPCA_ADDR);
1146
1147 if (depca_debug > 1) {
1148 printk("%s: Shutting down ethercard, status was %2.2x.\n",
1149 dev->name, inw(DEPCA_DATA));
1150 }
1151
1152 /*
1153 ** We stop the DEPCA here -- it occasionally polls
1154 ** memory if we don't.
1155 */
1156 outw(STOP, DEPCA_DATA);
1157
1158 /*
1159 ** Give back the ROM in case the user wants to go to DOS
1160 */
1161 if (strstr(lp->devname,"DEPCA") == NULL) {
1162 nicsr = inb(DEPCA_NICSR);
1163 nicsr &= ~SHE;
1164 outb(nicsr, DEPCA_NICSR);
1165 }
1166
1167 free_irq(dev->irq);
1168
1169 irq2dev_map[dev->irq] = 0;
1170
1171 #ifdef MODULE
1172 MOD_DEC_USE_COUNT;
1173 #endif
1174
1175 return 0;
1176 }
1177
1178 static void LoadCSRs(struct device *dev)
/* */
1179 {
1180 struct depca_private *lp = (struct depca_private *)dev->priv;
1181 int ioaddr = dev->base_addr;
1182
1183 outw(CSR1, DEPCA_ADDR); /* initialisation block address LSW */
1184 outw((unsigned short)((unsigned long)(&lp->init_block) & LA_MASK),
1185 DEPCA_DATA);
1186 outw(CSR2, DEPCA_ADDR); /* initialisation block address MSW */
1187 outw((unsigned short)(((unsigned long)(&lp->init_block) & LA_MASK) >> 16),
1188 DEPCA_DATA);
1189 outw(CSR3, DEPCA_ADDR); /* ALE control */
1190 outw(ACON, DEPCA_DATA);
1191 outw(CSR0, DEPCA_ADDR); /* point back to CSR0 */
1192 }
1193
1194 static int InitRestartDepca(struct device *dev)
/* */
1195 {
1196 struct depca_private *lp = (struct depca_private *)dev->priv;
1197 int ioaddr = dev->base_addr;
1198 int i, status=0;
1199
1200 outw(CSR0, DEPCA_ADDR); /* point back to CSR0 */
1201 outw(INIT, DEPCA_DATA); /* initialize DEPCA */
1202
1203 /* wait for lance to complete initialisation */
1204 for (i=0;(i<100) && !(inw(DEPCA_DATA) & IDON); i++);
1205
1206 if (i!=100) {
1207 /* clear IDON by writing a "1", enable interrupts and start lance */
1208 outw(IDON | INEA | STRT, DEPCA_DATA);
1209 if (depca_debug > 2) {
1210 printk("%s: DEPCA open after %d ticks, init block %#lx csr0 %4.4x.\n",
1211 dev->name, i, (long) &lp->init_block, inw(DEPCA_DATA));
1212 }
1213 } else {
1214 status = -1;
1215 printk("%s: DEPCA unopened after %d ticks, init block %#lx csr0 %4.4x.\n",
1216 dev->name, i, (long) &lp->init_block, inw(DEPCA_DATA));
1217 }
1218
1219 return status;
1220 }
1221
1222 static struct enet_statistics *
1223 depca_get_stats(struct device *dev)
/* */
1224 {
1225 struct depca_private *lp = (struct depca_private *)dev->priv;
1226
1227 /* Null body since there is no framing error counter */
1228
1229 return &lp->stats;
1230 }
1231
1232 #ifdef HAVE_MULTICAST
1233 /*
1234 ** Set or clear the multicast filter for this adaptor.
1235 ** num_addrs == -1 Promiscuous mode, receive all packets
1236 ** num_addrs == 0 Normal mode, clear multicast list
1237 ** num_addrs > 0 Multicast mode, receive normal and MC packets, and do
1238 ** best-effort filtering.
1239 */
1240 static void
1241 set_multicast_list(struct device *dev, int num_addrs, void *addrs)
/* */
1242 {
1243 short ioaddr = dev->base_addr;
1244 struct depca_private *lp = (struct depca_private *)dev->priv;
1245
1246 /* We take the simple way out and always enable promiscuous mode. */
1247 STOP_DEPCA; /* Temporarily stop the depca. */
1248
1249 lp->init_block.mode = PROM; /* Set promiscuous mode */
1250 if (num_addrs >= 0) {
1251 short multicast_table[4];
1252 int i;
1253
1254 SetMulticastFilter(num_addrs, (char *)addrs, (char *)multicast_table);
1255
1256 /* We don't use the multicast table, but rely on upper-layer filtering. */
1257 memset(multicast_table, (num_addrs==0) ? 0 : -1, sizeof(multicast_table));
1258
1259 for (i = 0; i < 4; i++) {
1260 lp->init_block.filter[i] = multicast_table[i];
1261 }
1262 lp->init_block.mode &= ~PROM; /* Unset promiscuous mode */
1263 } else {
1264 lp->init_block.mode |= PROM; /* Set promiscuous mode */
1265 }
1266
1267 outw(CSR0, DEPCA_ADDR);
1268 outw(IDON|INEA|STRT, DEPCA_DATA); /* Resume normal operation. */
1269 }
1270
1271 /*
1272 ** Calculate the hash code and update the logical address filter
1273 ** from a list of ethernet multicast addresses.
1274 ** Derived from a 'C' program in the AMD data book:
1275 ** "Am79C90 CMOS Local Area Network Controller for Ethernet (C-LANCE)",
1276 ** Pub #17781, Rev. A, May 1993
1277 */
1278 static void SetMulticastFilter(int num_addrs, char *addrs, char *multicast_table)
/* */
1279 {
1280 char j, ctrl, bit, octet, hashcode;
1281 short int i;
1282 long int CRC, poly = (long int) CRC_POLYNOMIAL;
1283
1284 for (i=0;i<num_addrs;i++) { /* for each address in the list */
1285 if (((char) *(addrs+ETH_ALEN*i) & 0x01) == 1) {/* is multicast address? */
1286 CRC = (long int) 0xffffffff; /* init CRC for each address */
1287 for (octet=0;octet<ETH_ALEN;octet++) { /* for each address octet */
1288 for(j=0;j<8;j++) { /* process each address bit */
1289 bit = (((char)* (addrs+ETH_ALEN*i+octet)) >> j) & 0x01;
1290 ctrl = ((CRC < 0) ? 1 : 0); /* shift the control bit */
1291 CRC <<= 1; /* shift the CRC */
1292 if (bit ^ ctrl) { /* (bit) XOR (control bit) */
1293 CRC ^= poly; /* (CRC) XOR (polynomial) */
1294 }
1295 }
1296 }
1297 hashcode = (CRC & 0x00000001); /* hashcode is 6 LSb of CRC ... */
1298 for (j=0;j<5;j++) { /* ... in reverse order. */
1299 hashcode <<= 1;
1300 CRC >>= 1;
1301 hashcode |= (CRC & 0x00000001);
1302 }
1303 octet = hashcode >> 3; /* bit[3-5] -> octet in filter */
1304 /* bit[0-2] -> bit in octet */
1305 multicast_table[octet] |= (1 << (hashcode & 0x07));
1306 }
1307 }
1308 return;
1309 }
1310
1311 #endif /* HAVE_MULTICAST */
1312
1313 #ifndef MODULE
1314 /*
1315 ** ISA bus I/O device probe
1316 */
1317 static struct device *isa_probe(struct device *dev)
/* */
1318 {
1319 int *port, ports[] = DEPCA_IO_PORTS;
1320 int status;
1321
1322 for (status = -ENODEV, port = &ports[0];
1323 *port && (num_depcas < MAX_NUM_DEPCAS); port++) {
1324 int ioaddr = *port;
1325
1326 if (DevicePresent(ioaddr) == 0) {
1327 if (num_depcas > 0) { /* only gets here in autoprobe */
1328 dev = alloc_device(dev, ioaddr);
1329 } else {
1330 if ((status = depca_probe1(dev, ioaddr)) == 0) {
1331 num_depcas++;
1332 }
1333 }
1334 num_eth++;
1335 }
1336 }
1337 return dev;
1338 }
1339
1340 /*
1341 ** EISA bus I/O device probe. Probe from slot 1 since slot 0 is usually
1342 ** the motherboard.
1343 */
1344 static struct device *eisa_probe(struct device *dev)
/* */
1345 {
1346 int i, ioaddr = DEPCA_EISA_IO_PORTS;
1347 int status;
1348
1349 ioaddr+=0x1000; /* get the first slot address */
1350 for (status = -ENODEV, i=1; i<MAX_EISA_SLOTS; i++, ioaddr+=0x1000) {
1351
1352 if (DevicePresent(ioaddr) == 0) {
1353 if (num_depcas > 0) { /* only gets here in autoprobe */
1354 dev = alloc_device(dev, ioaddr);
1355 } else {
1356 if ((status = depca_probe1(dev, ioaddr)) == 0) {
1357 num_depcas++;
1358 }
1359 }
1360 num_eth++;
1361 }
1362 }
1363 return dev;
1364 }
1365
1366 /*
1367 ** Allocate the device by pointing to the next available space in the
1368 ** device structure. Should one not be available, it is created.
1369 */
1370 static struct device *alloc_device(struct device *dev, int ioaddr)
/* */
1371 {
1372 /*
1373 ** Check the device structures for an end of list or unused device
1374 */
1375 while (dev->next != NULL) {
1376 if (dev->next->base_addr == 0xffe0) break;
1377 dev = dev->next; /* walk through eth device list */
1378 num_eth++; /* increment eth device number */
1379 }
1380
1381 /*
1382 ** If no more device structures, malloc one up. If memory could
1383 ** not be allocated, print an error message.
1384 */
1385 if (dev->next == NULL) {
1386 dev->next = (struct device *)kmalloc(sizeof(struct device) + 8,
1387 GFP_KERNEL);
1388 if (dev->next == NULL) {
1389 printk("eth%d: Device not initialised, insufficient memory\n",
1390 num_eth);
1391 }
1392 }
1393
1394 /*
1395 ** If the memory was allocated, point to the new memory area
1396 ** and initialize it (name, I/O address, next device (NULL) and
1397 ** initialisation probe routine).
1398 */
1399 if ((dev->next != NULL) &&
1400 (num_eth > 0) && (num_eth < 9999)) {
1401 dev = dev->next; /* point to the new device */
1402 dev->name = (char *)(dev + 1);
1403 sprintf(dev->name,"eth%d", num_eth);/* New device name */
1404 dev->base_addr = ioaddr; /* assign the io address */
1405 dev->next = NULL; /* mark the end of list */
1406 dev->init = &depca_probe; /* initialisation routine */
1407 num_depcas++;
1408 }
1409
1410 return dev;
1411 }
1412 #endif /* MODULE */
1413
1414 /*
1415 ** Look for a particular board name in the on-board Remote Diagnostics
1416 ** and Boot (RDB) ROM. This will also give us a clue to the network RAM
1417 ** base address.
1418 */
1419 static char *DepcaSignature(unsigned long mem_addr)
/* */
1420 {
1421 unsigned long i,j,k;
1422 static char signatures[][DEPCA_NAME_LENGTH] = DEPCA_SIGNATURE;
1423 static char thisName[DEPCA_NAME_LENGTH];
1424 char tmpstr[17];
1425
1426 for (i=0;i<16;i++) { /* copy the first 16 bytes of ROM to */
1427 tmpstr[i] = *(unsigned char *)(mem_addr+0xc000+i); /* a temporary string */
1428 }
1429 tmpstr[i]='\0';
1430
1431 strcpy(thisName,"");
1432 for (i=0;*signatures[i]!='\0' && *thisName=='\0';i++) {
1433 for (j=0,k=0;j<16 && k<strlen(signatures[i]);j++) {
1434 if (signatures[i][k] == tmpstr[j]) { /* track signature */
1435 k++;
1436 } else { /* lost signature; begin search again */
1437 k=0;
1438 }
1439 }
1440 if (k == strlen(signatures[i])) {
1441 strcpy(thisName,signatures[i]);
1442 }
1443 }
1444
1445 return thisName; /* return the device name string */
1446 }
1447
1448 /*
1449 ** Look for a special sequence in the Ethernet station address PROM that
1450 ** is common across all DEPCA products. Note that the original DEPCA needs
1451 ** its ROM address counter to be initialized and enabled. Only enable
1452 ** if the first address octet is a 0x08 - this minimises the chances of
1453 ** messing around with some other hardware, but it assumes that this DEPCA
1454 ** card initialized itself correctly. It also assumes that all past and
1455 ** future DEPCA/EtherWORKS cards will have ethernet addresses beginning with
1456 ** a 0x08.
1457 */
1458
1459 static int DevicePresent(short ioaddr)
/* */
1460 {
1461 static short fp=1,sigLength=0;
1462 static char devSig[] = PROBE_SEQUENCE;
1463 char data;
1464 int i, j, nicsr, status = 0;
1465 static char asc2hex(char value);
1466
1467 /*
1468 ** Initialize the counter on a DEPCA card. Two reads to ensure DEPCA ethernet
1469 ** address counter is a) cleared and b) the correct data read.
1470 */
1471 data = inb(DEPCA_PROM); /* clear counter */
1472 data = inb(DEPCA_PROM); /* read data */
1473
1474 /*
1475 ** Enable counter
1476 */
1477 if (data == 0x08) {
1478 nicsr = inb(DEPCA_NICSR);
1479 nicsr |= AAC;
1480 outb(nicsr, DEPCA_NICSR);
1481 }
1482
1483 /*
1484 ** Convert the ascii signature to a hex equivalent & pack in place
1485 */
1486 if (fp) { /* only do this once!... */
1487 for (i=0,j=0;devSig[i] != '\0' && !status;i+=2,j++) {
1488 if ((devSig[i]=asc2hex(devSig[i]))>=0) {
1489 devSig[i]<<=4;
1490 if((devSig[i+1]=asc2hex(devSig[i+1]))>=0){
1491 devSig[j]=devSig[i]+devSig[i+1];
1492 } else {
1493 status= -1;
1494 }
1495 } else {
1496 status= -1;
1497 }
1498 }
1499 sigLength=j;
1500 fp = 0;
1501 }
1502
1503 /*
1504 ** Search the Ethernet address ROM for the signature. Since the ROM address
1505 ** counter can start at an arbitrary point, the search must include the entire
1506 ** probe sequence length plus the (length_of_the_signature - 1).
1507 ** Stop the search IMMEDIATELY after the signature is found so that the
1508 ** PROM address counter is correctly positioned at the start of the
1509 ** ethernet address for later read out.
1510 */
1511 if (!status) {
1512 for (i=0,j=0;j<sigLength && i<PROBE_LENGTH+sigLength-1;i++) {
1513 data = inb(DEPCA_PROM);
1514 if (devSig[j] == data) { /* track signature */
1515 j++;
1516 } else { /* lost signature; begin search again */
1517 j=0;
1518 }
1519 }
1520
1521 if (j!=sigLength) {
1522 status = -ENODEV; /* search failed */
1523 }
1524 }
1525
1526 return status;
1527 }
1528
1529 static char asc2hex(char value)
/* */
1530 {
1531 value -= 0x30; /* normalise to 0..9 range */
1532 if (value >= 0) {
1533 if (value > 9) { /* but may not be 10..15 */
1534 value &= 0x1f; /* make A..F & a..f be the same */
1535 value -= 0x07; /* normalise to 10..15 range */
1536 if ((value < 0x0a) || (value > 0x0f)) { /* if outside range then... */
1537 value = -1; /* ...signal error */
1538 }
1539 }
1540 } else { /* outside 0..9 range... */
1541 value = -1; /* ...signal error */
1542 }
1543 return value; /* return hex char or error */
1544 }
1545
1546 #ifdef MODULE
1547 char kernel_version[] = UTS_RELEASE;
1548 static struct device thisDepca = {
1549 " ", /* device name inserted by /linux/drivers/net/net_init.c */
1550 0, 0, 0, 0,
1551 0x200, 7, /* I/O address, IRQ <--- EDIT THIS LINE FOR YOUR CONFIGURATION */
1552 0, 0, 0, NULL, depca_probe };
1553
1554 int
1555 init_module(void)
/* */
1556 {
1557 if (register_netdev(&thisDepca) != 0)
1558 return -EIO;
1559 return 0;
1560 }
1561
1562 void
1563 cleanup_module(void)
/* ![[last]](../icons/n_last.png)
*/
1564 {
1565 if (MOD_IN_USE) {
1566 printk("%s: device busy, remove delayed\n",thisDepca.name);
1567 } else {
1568 unregister_netdev(&thisDepca);
1569 }
1570 }
1571 #endif /* MODULE */
1572
1573
1574 /*
1575 * Local variables:
1576 * kernel-compile-command: "gcc -D__KERNEL__ -I/usr/src/linux/net/inet -Wall -Wstrict-prototypes -O2 -m486 -c depca.c"
1577 *
1578 * module-compile-command: "gcc -D__KERNEL__ -DMODULE -I/usr/src/linux/net/inet -Wall -Wstrict-prototypes -O2 -m486 -c depca.c"
1579 * End:
1580 */
![[bottom]](../icons/n_bottom.png){kind=icon}
*/