root/include/asm-sparc/processor.h

/* */

INCLUDED FROM

DEFINITIONS

1. start_bh_atomic
2. end_bh_atomic

   1 /* include/asm-sparc/processor.h
   2  *
   3  * Copyright (C) 1994 David S. Miller (davem@caip.rutgers.edu)
   4  */
   5 
   6 #ifndef __ASM_SPARC_PROCESSOR_H
   7 #define __ASM_SPARC_PROCESSOR_H
   8 
   9 /*
  10  * Bus types
  11  */
  12 extern int EISA_bus;
  13 #define MCA_bus 0
  14 
  15 /*
  16  * User space process size: 3GB. This is hardcoded into a few places,
  17  * so don't change it unless you know what you are doing.
  18  *
  19  * "this is gonna have to change to 1gig for the sparc" - David S. Miller
  20  */
  21 #define TASK_SIZE       (0xc0000000UL)
  22 
  23 /*
  24  * Size of io_bitmap in longwords: 32 is ports 0-0x3ff.
  25  */
  26 #define IO_BITMAP_SIZE  32
  27 
  28 struct thread_struct {
  29         unsigned long ksp;          /* kernel stack pointer */
  30         unsigned long usp;          /* user's sp, throw reg windows here */
  31         unsigned long cr3;          /* why changed from ptbr? */
  32         unsigned int pcc;
  33         unsigned int asn;
  34         unsigned long unique;
  35         unsigned long flags;
  36         unsigned long res1, res2;
  37         unsigned long psr;          /* save for condition codes */
  38         unsigned long pc;           /* program counter */
  39         unsigned long npc;          /* next program counter */
  40 
  41 /* 8 local registers + 8 in registers * 24 register windows.
  42  * Most sparc's I know of only have 8 windows implemented,
  43  * we determine how many at boot time and store that value
  44  * in nwindows.
  45  */
  46         unsigned long globl_regs[8];  /* global regs need to be saved too */
  47         unsigned long reg_window[16*24];
  48         unsigned long yreg;
  49         unsigned long uwindows;       /* how many user windows are in the set */
  50         unsigned long float_regs[64]; /* V8 and below have 32, V9 has 64 */
  51 };
  52 
  53 #define INIT_TSS  { \
  54         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  55         0, 0, 0, 0, 0, 0, 0, 0, \
  56         { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  57         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  58         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  59         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  60         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  61         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  62         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  63         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  64         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  65         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  66         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  67         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  68         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  69         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  70         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  71         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  72         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  73         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  74         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  75         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  76         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  77         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  78         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  79         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, \
  80         0, 0, \
  81         { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  82         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  83         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  84         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, \
  85 }
  86 
  87 /*
  88  * These are the "cli()" and "sti()" for software interrupts
  89  * They work by increasing/decreasing the "intr_count" value, 
  90  * and as such can be nested arbitrarily.
  91  */
  92 extern inline void start_bh_atomic(void)
     /*  */
  93 {
  94         unsigned long dummy, psr;
  95         __asm__ __volatile__("rd %%psr, %2\n\t"
  96                              "wr %2, 0x20, %%psr\n\t"  /* disable traps */
  97                              "ld %1,%0\n\t"
  98                              "add %0,1,%0\n\t"
  99                              "st %0,%1\n\t"
 100                              "wr %2, 0x0, %%psr\n\t"   /* enable traps */
 101                              : "=r" (dummy), "=m" (intr_count)
 102                              : "0" (0), "r" (psr=0));
 103 }
 104 
 105 extern inline void end_bh_atomic(void)
     /*  */
 106 {
 107         unsigned long dummy, psr;
 108         __asm__ __volatile__("rd %%psr, %2\n\t"
 109                              "wr %2, 0x20, %%psr\n\t"
 110                              "ld %1,%0\n\t"
 111                              "sub %0,1,%0\n\t"
 112                              "st %0,%1\n\t"
 113                              "wr %2, 0x0, %2\n\t"
 114                              : "=r" (dummy), "=m" (intr_count)
 115                              : "0" (0), "r" (psr=0));
 116 }
 117 
 118 #endif /* __ASM_SPARC_PROCESSOR_H */
 119 

/* */