1 /* mc146818rtc.h - register definitions for the Real-Time-Clock / CMOS RAM 2 * Copyright Torsten Duwe <duwe@informatik.uni-erlangen.de> 1993 3 * derived from Data Sheet, Copyright Motorola 1984 (!). 4 * It was written to be part of the Linux operating system. 5 */ 6 /* permission is hereby granted to copy, modify and redistribute this code 7 * in terms of the GNU Library General Public License, Version 2 or later, 8 * at your option. 9 */ 10 11 #ifndef _MC146818RTC_H 12 #define _MC146818RTC_H 13 #include <asm/io.h> 14 15 #define RTC_PORT(x) (0x70 + (x)) 16 #define RTC_ADDR(x) (0x80 | (x)) 17 #define RTC_ALWAYS_BCD 1 18 19 /* 20 * The Alpha Jensen hardware for some rather strange reason puts 21 * the RTC clock at 0x170 instead of 0x70. Probably due to some 22 * misguided idea about using 0x70 for NMI stuff. 23 */ 24 #ifdef __alpha__ 25 #undef RTC_PORT 26 #undef RTC_ADDR 27 #undef RTC_ALWAYS_BCD 28 #define RTC_PORT(x) (0x170+(x)) 29 #define RTC_ADDR(x) (x) 30 #define RTC_ALWAYS_BCD 0 31 #endif 32 33 #define CMOS_READ(addr) ({ \ 34 outb_p(RTC_ADDR(addr),RTC_PORT(0)); \ 35 inb_p(RTC_PORT(1)); \ 36 }) 37 #define CMOS_WRITE(val, addr) ({ \ 38 outb_p(RTC_ADDR(addr),RTC_PORT(0)); \ 39 outb_p(val,RTC_PORT(1)); \ 40 }) 41 42 /********************************************************************** 43 * register summary 44 **********************************************************************/ 45 #define RTC_SECONDS 0 46 #define RTC_SECONDS_ALARM 1 47 #define RTC_MINUTES 2 48 #define RTC_MINUTES_ALARM 3 49 #define RTC_HOURS 4 50 #define RTC_HOURS_ALARM 5 51 /* RTC_*_alarm is always true if 2 MSBs are set */ 52 # define RTC_ALARM_DONT_CARE 0xC0 53 54 #define RTC_DAY_OF_WEEK 6 55 #define RTC_DAY_OF_MONTH 7 56 #define RTC_MONTH 8 57 #define RTC_YEAR 9 58 59 /* control registers - Moto names 60 */ 61 #define RTC_REG_A 10 62 #define RTC_REG_B 11 63 #define RTC_REG_C 12 64 #define RTC_REG_D 13 65 66 /********************************************************************** 67 * register details 68 **********************************************************************/ 69 #define RTC_FREQ_SELECT RTC_REG_A 70 71 /* update-in-progress - set to "1" 244 microsecs before RTC goes off the bus, 72 * reset after update (may take 1.984ms @ 32768Hz RefClock) is complete, 73 * totalling to a max high interval of 2.228 ms. 74 */ 75 # define RTC_UIP 0x80 76 # define RTC_DIV_CTL 0x70 77 /* divider control: refclock values 4.194 / 1.049 MHz / 32.768 kHz */ 78 # define RTC_REF_CLCK_4MHZ 0x00 79 # define RTC_REF_CLCK_1MHZ 0x10 80 # define RTC_REF_CLCK_32KHZ 0x20 81 /* 2 values for divider stage reset, others for "testing purposes only" */ 82 # define RTC_DIV_RESET1 0x60 83 # define RTC_DIV_RESET2 0x70 84 /* Periodic intr. / Square wave rate select. 0=none, 1=32.8kHz,... 15=2Hz */ 85 # define RTC_RATE_SELECT 0x0F 86 87 /**********************************************************************/ 88 #define RTC_CONTROL RTC_REG_B 89 # define RTC_SET 0x80 /* disable updates for clock setting */ 90 # define RTC_PIE 0x40 /* periodic interrupt enable */ 91 # define RTC_AIE 0x20 /* alarm interrupt enable */ 92 # define RTC_UIE 0x10 /* update-finished interrupt enable */ 93 # define RTC_SQWE 0x08 /* enable square-wave output */ 94 # define RTC_DM_BINARY 0x04 /* all time/date values are BCD if clear */ 95 # define RTC_24H 0x02 /* 24 hour mode - else hours bit 7 means pm */ 96 # define RTC_DST_EN 0x01 /* auto switch DST - works f. USA only */ 97 98 /**********************************************************************/ 99 #define RTC_INTR_FLAGS RTC_REG_C 100 /* caution - cleared by read */ 101 # define RTC_IRQF 0x80 /* any of the following 3 is active */ 102 # define RTC_PF 0x40 103 # define RTC_AF 0x20 104 # define RTC_UF 0x10 105 106 /**********************************************************************/ 107 #define RTC_VALID RTC_REG_D 108 # define RTC_VRT 0x80 /* valid RAM and time */ 109 /**********************************************************************/ 110 111 /* example: !(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) 112 * determines if the following two #defines are needed 113 */ 114 #ifndef BCD_TO_BIN 115 #define BCD_TO_BIN(val) ((val)=((val)&15) + ((val)>>4)*10) 116 #endif 117 118 #ifndef BIN_TO_BCD 119 #define BIN_TO_BCD(val) ((val)=(((val)/10)<<4) + (val)%10) 120 #endif 121 122 #endif /* _MC146818RTC_H */