include/asm-alpha/lca.h

/* */
This source file includes following definitions.
inb
inw
inl
outb
outw
outl
readb
readw
readl
writeb
writew
writel
   1 #ifndef __ALPHA_LCA__H
   2 #define __ALPHA_LCA__H
   3 
   4 /*
   5  * Low Cost Alpha (LCA) definitions (these apply to 21066 and 21068,
   6  * for example).
   7  *
   8  * This file is based on:
   9  *
  10  *      DECchip 21066 and DECchip 21068 Alpha AXP Microprocessors
  11  *      Hardware Reference Manual; Digital Equipment Corp.; May 1994;
  12  *      Maynard, MA; Order Number: EC-N2681-71.
  13  */
  14 
  15 /*
  16  * NOTE! Currently, this never uses the HAE register, so it works only
  17  * for the low 27 bits of the PCI sparse memory address space.  Dense
  18  * memory space doesn't require the HAE, but is restricted to aligned
  19  * 32 and 64 bit accesses.  Special Cycle and Interrupt Acknowledge
  20  * cycles may also require the use of the HAE.  The LCA limits I/O
  21  * address space to the bottom 24 bits of address space, but this
  22  * easily covers the 16 bit ISA I/O address space.
  23  */
  24 
  25 /*
  26  * NOTE 2! The memory operations do not set any memory barriers, as
  27  * it's not needed for cases like a frame buffer that is essentially
  28  * memory-like.  You need to do them by hand if the operations depend
  29  * on ordering.
  30  *
  31  * Similarly, the port I/O operations do a "mb" only after a write
  32  * operation: if an mb is needed before (as in the case of doing
  33  * memory mapped I/O first, and then a port I/O operation to the same
  34  * device), it needs to be done by hand.
  35  *
  36  * After the above has bitten me 100 times, I'll give up and just do
  37  * the mb all the time, but right now I'm hoping this will work out.
  38  * Avoiding mb's may potentially be a noticeable speed improvement,
  39  * but I can't honestly say I've tested it.
  40  *
  41  * Handling interrupts that need to do mb's to synchronize to
  42  * non-interrupts is another fun race area.  Don't do it (because if
  43  * you do, I'll have to do *everything* with interrupts disabled,
  44  * ugh).
  45  */
  46 
  47 /*
  48  * Virtual -> physical identity mapping starts at this offset.
  49  */
  50 #define IDENT_ADDR      (0xfffffc0000000000UL)
  51 
  52 /*
  53  * I/O Controller registers:
  54  */
  55 #define LCA_IOC_HAE             (IDENT_ADDR + 0x180000000UL)
  56 #define LCA_IOC_CONF            (IDENT_ADDR + 0x180000020UL)
  57 #define LCA_IOC_STAT0           (IDENT_ADDR + 0x180000040UL)
  58 #define LCA_IOC_STAT1           (IDENT_ADDR + 0x180000060UL)
  59 #define LCA_IOC_TBIA            (IDENT_ADDR + 0x180000080UL)
  60 #define LCA_IOC_TB_ENA          (IDENT_ADDR + 0x1800000a0UL)
  61 #define LCA_IOC_SFT_RST         (IDENT_ADDR + 0x1800000c0UL)
  62 #define LCA_IOC_PAR_DIS         (IDENT_ADDR + 0x1800000e0UL)
  63 #define LCA_IOC_W_BASE0         (IDENT_ADDR + 0x180000100UL)
  64 #define LCA_IOC_W_BASE1         (IDENT_ADDR + 0x180000120UL)
  65 #define LCA_IOC_W_MASK0         (IDENT_ADDR + 0x180000140UL)
  66 #define LCA_IOC_W_MASK1         (IDENT_ADDR + 0x180000160UL)
  67 #define LCA_IOC_T_BASE0         (IDENT_ADDR + 0x180000180UL)
  68 #define LCA_IOC_T_BASE1         (IDENT_ADDR + 0x1800001a0UL)
  69 #define LCA_IOC_TB_TAG0         (IDENT_ADDR + 0x188000000UL)
  70 #define LCA_IOC_TB_TAG1         (IDENT_ADDR + 0x188000020UL)
  71 #define LCA_IOC_TB_TAG2         (IDENT_ADDR + 0x188000040UL)
  72 #define LCA_IOC_TB_TAG3         (IDENT_ADDR + 0x188000060UL)
  73 #define LCA_IOC_TB_TAG4         (IDENT_ADDR + 0x188000070UL)
  74 #define LCA_IOC_TB_TAG5         (IDENT_ADDR + 0x1880000a0UL)
  75 #define LCA_IOC_TB_TAG6         (IDENT_ADDR + 0x1880000c0UL)
  76 #define LCA_IOC_TB_TAG7         (IDENT_ADDR + 0x1880000e0UL)
  77 
  78 /*
  79  * Memory spaces:
  80  */
  81 #define LCA_IACK_SC             (IDENT_ADDR + 0x1a0000000UL)
  82 #define LCA_CONF                (IDENT_ADDR + 0x1e0000000UL)
  83 #define LCA_IO                  (IDENT_ADDR + 0x1c0000000UL)
  84 #define LCA_SPARSE_MEM          (IDENT_ADDR + 0x200000000UL)
  85 #define LCA_DENSE_MEM           (IDENT_ADDR + 0x300000000UL)
  86 
  87 /*
  88  * Bit definitions for I/O Controller status register 0:
  89  */
  90 #define LCA_IOC_STAT0_CMD               0xf
  91 #define LCA_IOC_STAT0_ERR               (1<<4)
  92 #define LCA_IOC_STAT0_LOST              (1<<5)
  93 #define LCA_IOC_STAT0_THIT              (1<<6)
  94 #define LCA_IOC_STAT0_TREF              (1<<7)
  95 #define LCA_IOC_STAT0_CODE_SHIFT        8
  96 #define LCA_IOC_STAT0_CODE_MASK         0x7
  97 #define LCA_IOC_STAT0_P_NBR_SHIFT       13
  98 #define LCA_IOC_STAT0_P_NBR_MASK        0x7ffff
  99 
 100 /*
 101  * I/O functions:
 102  *
 103  * Unlike Jensen, the Noname machines have no concept of local
 104  * I/O---everything goes over the PCI bus.
 105  *
 106  * There is plenty room for optimization here.  In particular,
 107  * the Alpha's insb/insw/extb/extw should be useful in moving
 108  * data to/from the right byte-lanes.
 109  */
 110 
 111 extern inline unsigned int
 112 inb(unsigned long addr)
     /*  */
 113 {
 114     long result = *(volatile int *) ((addr << 5) + LCA_IO + 0x00);
 115     result >>= (addr & 3) * 8;
 116     return 0xffUL & result;
 117 }
 118 
 119 extern inline unsigned int
 120 inw(unsigned long addr)
     /*  */
 121 {
 122     long result = *(volatile int *) ((addr << 5) + LCA_IO + 0x08);
 123     result >>= (addr & 3) * 8;
 124     return 0xffffUL & result;
 125 }
 126 
 127 extern inline unsigned int
 128 inl(unsigned long addr)
     /*  */
 129 {
 130     return *(volatile unsigned int *) ((addr << 5) + LCA_IO + 0x18);
 131 }
 132 
 133 extern inline void
 134 outb(unsigned char b, unsigned long addr)
     /*  */
 135 {
 136     *(volatile unsigned int *) ((addr << 5) + LCA_IO + 0x00) = b * 0x01010101;
 137     mb();
 138 }
 139 
 140 extern inline void
 141 outw(unsigned char b, unsigned long addr)
     /*  */
 142 {
 143     *(volatile unsigned int *) ((addr << 5) + LCA_IO + 0x08) = b * 0x00010001;
 144     mb();
 145 }
 146 
 147 extern inline void
 148 outl(unsigned char b, unsigned long addr)
     /*  */
 149 {
 150     *(volatile unsigned int *) ((addr << 5) + LCA_IO + 0x18) = b;
 151     mb();
 152 }
 153 
 154 
 155 /*
 156  * Memory functions.  64-bit and 32-bit accesses are done through
 157  * dense memory space, everything else through sparse space.
 158  */
 159 
 160 extern inline unsigned long
 161 readb(unsigned long addr)
     /*  */
 162 {
 163     long result = *(volatile int *) ((addr << 5) + LCA_SPARSE_MEM + 0x00);
 164     result >>= (addr & 3) * 8;
 165     return 0xffUL & result;
 166 }
 167 
 168 extern inline unsigned long
 169 readw(unsigned long addr)
     /*  */
 170 {
 171     long result = *(volatile int *) ((addr << 5) + LCA_SPARSE_MEM + 0x08);
 172     result >>= (addr & 3) * 8;
 173     return 0xffffUL & result;
 174 }
 175 
 176 extern inline unsigned long
 177 readl(unsigned long addr)
     /*  */
 178 {
 179     return *(volatile int *) (addr + LCA_DENSE_MEM);
 180 }
 181 
 182 extern inline void
 183 writeb(unsigned short b, unsigned long addr)
     /*  */
 184 {
 185     *(volatile unsigned int *) ((addr << 5) + LCA_SPARSE_MEM + 0x00) =
 186       b * 0x01010101;
 187 }
 188 
 189 extern inline void
 190 writew(unsigned short b, unsigned long addr)
     /*  */
 191 {
 192     *(volatile unsigned int *) ((addr << 5) + LCA_SPARSE_MEM + 0x08) =
 193       b * 0x00010001;
 194 }
 195 
 196 extern inline void
 197 writel(unsigned short b, unsigned long addr)
     /*  */
 198 {
 199     *(volatile unsigned int *) (addr + LCA_DENSE_MEM) = b;
 200 }
 201 
 202 #define inb_local inb
 203 #define outb_local outb
 204 #define inb_p inb
 205 #define outb_p outb
 206 
 207 #endif
/* */
root/include/asm-alpha/lca.h

INCLUDED FROM

DEFINITIONS
