This source file includes following definitions.
- busy_loop
- wavelan_splhi
- wavelan_splx
- hasr_read
- hacr_write
- hacr_write_slow
- set_chan_attn
- wavelan_reset
- wavelan_16_off
- wavelan_16_on
- wavelan_ints_off
- wavelan_ints_on
- psa_read
- obram_read
- obram_write
- mmc_read
- mmc_write
- wavelan_map_irq
- wavelan_mmc_init
- wavelan_ack
- wavelan_synchronous_cmd
- wavelan_hardware_reset
- wavelan_struct_check
- wavelan_probe
- wavelan_probe1
- wavelan_ru_start
- wavelan_cu_start
- wavelan_open
- hardware_send_packet
- wavelan_send_packet
- addrcmp
- wavelan_receive
- wavelan_complete
- wavelan_watchdog
- wavelan_interrupt
- wavelan_close
- wavelan_get_stats
- wavelan_set_multicast_list
- sprintf_stats
- wavelan_get_info
- init_module
- cleanup_module
- wavelan_cu_show_one
- wavelan_psa_show
- wavelan_mmc_show
- wavelan_scb_show
- wavelan_ru_show
- wavelan_cu_show
- wavelan_dev_show
- wavelan_local_show
1
2
3
4
5
6
7 #include <linux/config.h>
8
9 #if defined(CONFIG_WAVELAN)
10 #if defined(MODULE)
11 #include <linux/module.h>
12 #include <linux/version.h>
13 #endif
14
15 #include <linux/kernel.h>
16 #include <linux/sched.h>
17 #include <linux/types.h>
18 #include <linux/fcntl.h>
19 #include <linux/interrupt.h>
20 #include <linux/ptrace.h>
21 #include <linux/ioport.h>
22 #include <linux/in.h>
23 #include <linux/string.h>
24 #include <asm/system.h>
25 #include <asm/bitops.h>
26 #include <asm/io.h>
27 #include <asm/dma.h>
28 #include <errno.h>
29 #include <linux/netdevice.h>
30 #include <linux/etherdevice.h>
31 #include <linux/skbuff.h>
32 #include <linux/malloc.h>
33 #include <linux/timer.h>
34 #define STRUCT_CHECK 1
35 #include "i82586.h"
36 #include "wavelan.h"
37
38 #ifndef WAVELAN_DEBUG
39 #define WAVELAN_DEBUG 0
40 #endif
41
42 #define nels(a) (sizeof(a) / sizeof(a[0]))
43
44 #define WATCHDOG_JIFFIES 512
45
46 typedef struct device device;
47 typedef struct enet_statistics en_stats;
48 typedef struct net_local net_local;
49 typedef struct timer_list timer_list;
50
51 struct net_local
52 {
53 en_stats stats;
54 unsigned int tx_n_in_use;
55 unsigned char nwid[2];
56 unsigned short hacr;
57 unsigned short rx_head;
58 unsigned short rx_last;
59 unsigned short tx_first_free;
60 unsigned short tx_first_in_use;
61 unsigned int nresets;
62 unsigned int correct_nwid;
63 unsigned int wrong_nwid;
64 unsigned int promiscuous;
65 timer_list watchdog;
66 device *dev;
67 net_local *prev;
68 net_local *next;
69 };
70
71 extern int wavelan_probe(device *);
72
73 static char *version = "wavelan.c:v5 31/1/95\n";
74
75
76
77
78 static int wavelan_probe1(device *, unsigned short);
79 static int wavelan_open(device *);
80 static int wavelan_send_packet(struct sk_buff *, device *);
81 static void wavelan_interrupt(int, struct pt_regs *);
82 static int wavelan_close(device *);
83 static en_stats *wavelan_get_stats(device *);
84 static void wavelan_set_multicast_list(device *, int, void *);
85
86
87
88
89 static void wavelan_cu_show_one(device *, net_local *, int, unsigned short);
90 static void wavelan_cu_start(device *);
91 static void wavelan_ru_start(device *);
92 static void wavelan_watchdog(unsigned long);
93 #if 0
94 static void wavelan_psa_show(psa_t *);
95 static void wavelan_mmc_show(unsigned short);
96 #endif
97 static void wavelan_scb_show(unsigned short);
98 static void wavelan_ru_show(device *);
99 static void wavelan_cu_show(device *);
100 static void wavelan_dev_show(device *);
101 static void wavelan_local_show(device *);
102
103 static unsigned int wavelan_debug = WAVELAN_DEBUG;
104 static net_local *first_wavelan = (net_local *)0;
105
106 static
107 void
108 busy_loop(int i)
109 {
110 while (i-- > 0)
111 ;
112 }
113
114 static
115 unsigned long
116 wavelan_splhi(void)
117 {
118 unsigned long flags;
119
120 save_flags(flags);
121 cli();
122
123 return flags;
124 }
125
126 static
127 void
128 wavelan_splx(unsigned long flags)
129 {
130 restore_flags(flags);
131 }
132
133 static
134 unsigned short
135 hasr_read(unsigned short ioaddr)
136 {
137 return inw(HASR(ioaddr));
138 }
139
140 static
141 void
142 hacr_write(unsigned short ioaddr, int hacr)
143 {
144 outw(hacr, HACR(ioaddr));
145 }
146
147 static
148 void
149 hacr_write_slow(unsigned short ioaddr, int hacr)
150 {
151 hacr_write(ioaddr, hacr);
152
153 busy_loop(1000);
154 }
155
156
157
158
159 static
160 void
161 set_chan_attn(unsigned short ioaddr, unsigned short current_hacr)
162 {
163 hacr_write(ioaddr, current_hacr | HACR_CA);
164 }
165
166
167
168
169 static
170 void
171 wavelan_reset(unsigned short ioaddr)
172 {
173 hacr_write_slow(ioaddr, HACR_RESET);
174 hacr_write(ioaddr, HACR_DEFAULT);
175 }
176
177 static
178 void
179 wavelan_16_off(unsigned short ioaddr, unsigned short hacr)
180 {
181 hacr &= ~HACR_16BITS;
182
183 hacr_write(ioaddr, hacr);
184 }
185
186 static
187 void
188 wavelan_16_on(unsigned short ioaddr, unsigned short hacr)
189 {
190 hacr |= HACR_16BITS;
191
192 hacr_write(ioaddr, hacr);
193 }
194
195 static
196 void
197 wavelan_ints_off(device *dev)
198 {
199 unsigned short ioaddr;
200 net_local *lp;
201 unsigned long x;
202
203 ioaddr = dev->base_addr;
204 lp = (net_local *)dev->priv;
205
206 x = wavelan_splhi();
207
208 lp->hacr &= ~HACR_INTRON;
209 hacr_write(ioaddr, lp->hacr);
210
211 wavelan_splx(x);
212 }
213
214 static
215 void
216 wavelan_ints_on(device *dev)
217 {
218 unsigned short ioaddr;
219 net_local *lp;
220 unsigned long x;
221
222 ioaddr = dev->base_addr;
223 lp = (net_local *)dev->priv;
224
225 x = wavelan_splhi();
226
227 lp->hacr |= HACR_INTRON;
228 hacr_write(ioaddr, lp->hacr);
229
230 wavelan_splx(x);
231 }
232
233
234
235
236 static
237 void
238 psa_read(unsigned short ioaddr, unsigned short hacr, int o, unsigned char *b, int n)
239 {
240 wavelan_16_off(ioaddr, hacr);
241
242 while (n-- > 0)
243 {
244 outw(o, PIOR2(ioaddr));
245 o++;
246 *b++ = inb(PIOP2(ioaddr));
247 }
248
249 wavelan_16_on(ioaddr, hacr);
250 }
251
252
253
254
255 static
256 void
257 obram_read(unsigned short ioaddr, unsigned short o, unsigned char *b, int n)
258 {
259 n = (n + 1) / (sizeof(unsigned short) / sizeof(unsigned char));
260
261 outw(o, PIOR1(ioaddr));
262
263 insw(PIOP1(ioaddr), (unsigned short *)b, n);
264 }
265
266
267
268
269 static
270 void
271 obram_write(unsigned short ioaddr, unsigned short o, unsigned char *b, int n)
272 {
273 n = (n + 1) / (sizeof(unsigned short) / sizeof(unsigned char));
274
275 outw(o, PIOR1(ioaddr));
276
277 outsw(PIOP1(ioaddr), (unsigned short *)b, n);
278 }
279
280
281
282
283 static
284 void
285 mmc_read(unsigned short ioaddr, unsigned short o, unsigned char *b, int n)
286 {
287 while (n-- > 0)
288 {
289 while (inw(HASR(ioaddr)) & HASR_MMC_BUSY)
290 ;
291
292 outw(o << 1, MMCR(ioaddr));
293 o++;
294
295 while (inw(HASR(ioaddr)) & HASR_MMC_BUSY)
296 ;
297
298 *b++ = (unsigned char)(inw(MMCR(ioaddr)) >> 8);
299 }
300 }
301
302
303
304
305 static
306 void
307 mmc_write(unsigned short ioaddr, unsigned short o, unsigned char *b, int n)
308 {
309 while (n-- > 0)
310 {
311 while (inw(HASR(ioaddr)) & HASR_MMC_BUSY)
312 ;
313
314 outw((unsigned short)(((unsigned short)*b << 8) | (o << 1) | 1), MMCR(ioaddr));
315 b++;
316 o++;
317 }
318 }
319
320
321
322
323 static
324 int
325 wavelan_map_irq(unsigned short ioaddr, unsigned char irqval)
326 {
327 int irq;
328 static int irqvals[] =
329 {
330 0, 0, 0, 0x01,
331 0x02, 0x04, 0, 0x08,
332 0, 0, 0x10, 0x20,
333 0x40, 0, 0, 0x80,
334 };
335
336 for (irq = 0; irq < nels(irqvals); irq++)
337 {
338 if (irqvals[irq] == (int)irqval)
339 return irq;
340 }
341
342 return -1;
343 }
344
345
346
347
348 static
349 void
350 wavelan_mmc_init(device *dev, psa_t *psa)
351 {
352 unsigned short ioaddr;
353 net_local *lp;
354 mmw_t m;
355 int configured;
356
357 ioaddr = dev->base_addr;
358 lp = (net_local *)dev->priv;
359 memset(&m, 0x00, sizeof(m));
360
361
362
363
364
365
366
367
368
369 configured = 0;
370
371
372
373
374
375 m.mmw_jabber_enable = 0x01;
376 m.mmw_anten_sel = MMW_ANTEN_SEL_ALG_EN;
377 m.mmw_ifs = 0x20;
378 m.mmw_mod_delay = 0x04;
379 m.mmw_jam_time = 0x38;
380
381 m.mmw_encr_enable = 0;
382 m.mmw_des_io_invert = 0;
383 m.mmw_freeze = 0;
384 m.mmw_decay_prm = 0;
385 m.mmw_decay_updat_prm = 0;
386
387 if (configured)
388 {
389
390
391
392 if (psa->psa_undefined & 1)
393 m.mmw_loopt_sel = 0x00;
394 else
395 m.mmw_loopt_sel = MMW_LOOPT_SEL_UNDEFINED;
396
397 m.mmw_thr_pre_set = psa->psa_thr_pre_set & 0x3F;
398 m.mmw_quality_thr = psa->psa_quality_thr & 0x0F;
399 }
400 else
401 {
402 if (lp->promiscuous)
403 m.mmw_loopt_sel = MMW_LOOPT_SEL_UNDEFINED;
404 else
405 m.mmw_loopt_sel = 0x00;
406
407
408
409
410
411 if (psa->psa_comp_number & 1)
412 m.mmw_thr_pre_set = 0x01;
413 else
414 m.mmw_thr_pre_set = 0x04;
415
416 m.mmw_quality_thr = 0x03;
417 }
418
419 m.mmw_netw_id_l = lp->nwid[1];
420 m.mmw_netw_id_h = lp->nwid[0];
421
422 mmc_write(ioaddr, 0, (unsigned char *)&m, sizeof(m));
423 }
424
425 static
426 void
427 wavelan_ack(device *dev)
428 {
429 unsigned short ioaddr;
430 net_local *lp;
431 unsigned short scb_cs;
432 int i;
433
434 ioaddr = dev->base_addr;
435 lp = (net_local *)dev->priv;
436
437 obram_read(ioaddr, scboff(OFFSET_SCB, scb_status), (unsigned char *)&scb_cs, sizeof(scb_cs));
438 scb_cs &= SCB_ST_INT;
439
440 if (scb_cs == 0)
441 return;
442
443 obram_write(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&scb_cs, sizeof(scb_cs));
444
445 set_chan_attn(ioaddr, lp->hacr);
446
447 for (i = 1000000; i > 0; i--)
448 {
449 obram_read(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&scb_cs, sizeof(scb_cs));
450 if (scb_cs == 0)
451 break;
452 }
453
454 if (i <= 0)
455 printk("%s: wavelan_ack(): board not accepting command.\n", dev->name);
456 }
457
458
459
460
461
462 static
463 int
464 wavelan_synchronous_cmd(device *dev, char *str)
465 {
466 unsigned short ioaddr;
467 net_local *lp;
468 unsigned short scb_cmd;
469 ach_t cb;
470 int i;
471
472 ioaddr = dev->base_addr;
473 lp = (net_local *)dev->priv;
474
475 scb_cmd = SCB_CMD_CUC & SCB_CMD_CUC_GO;
476 obram_write(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&scb_cmd, sizeof(scb_cmd));
477
478 set_chan_attn(ioaddr, lp->hacr);
479
480 for (i = 64000; i > 0; i--)
481 {
482 obram_read(ioaddr, OFFSET_CU, (unsigned char *)&cb, sizeof(cb));
483 if (cb.ac_status & AC_SFLD_C)
484 break;
485 }
486
487 if (i <= 0 || !(cb.ac_status & AC_SFLD_OK))
488 {
489 printk("%s: %s failed; status = 0x%x\n", dev->name, str, cb.ac_status);
490 wavelan_scb_show(ioaddr);
491 return -1;
492 }
493
494 wavelan_ack(dev);
495
496 return 0;
497 }
498
499 static
500 int
501 wavelan_hardware_reset(device *dev)
502 {
503 unsigned short ioaddr;
504 psa_t psa;
505 net_local *lp;
506 scp_t scp;
507 iscp_t iscp;
508 scb_t scb;
509 ach_t cb;
510 int i;
511 ac_cfg_t cfg;
512 ac_ias_t ias;
513
514 ioaddr = dev->base_addr;
515 lp = (net_local *)dev->priv;
516
517 lp->nresets++;
518
519 wavelan_reset(ioaddr);
520 lp->hacr = HACR_DEFAULT;
521
522
523
524
525 {
526 unsigned char zeroes[512];
527
528 memset(&zeroes[0], 0x00, sizeof(zeroes));
529
530 for (i = 0; i < I82586_MEMZ; i += sizeof(zeroes))
531 obram_write(ioaddr, i, &zeroes[0], sizeof(zeroes));
532 }
533
534 psa_read(ioaddr, lp->hacr, 0, (unsigned char *)&psa, sizeof(psa));
535
536 wavelan_mmc_init(dev, &psa);
537
538
539
540
541
542 memset(&scp, 0x00, sizeof(scp));
543 scp.scp_sysbus = SCP_SY_16BBUS;
544 scp.scp_iscpl = OFFSET_ISCP;
545 obram_write(ioaddr, OFFSET_SCP, (unsigned char *)&scp, sizeof(scp));
546
547 memset(&iscp, 0x00, sizeof(iscp));
548 iscp.iscp_busy = 1;
549 iscp.iscp_offset = OFFSET_SCB;
550 obram_write(ioaddr, OFFSET_ISCP, (unsigned char *)&iscp, sizeof(iscp));
551
552 memset(&scb, 0x00, sizeof(scb));
553 scb.scb_command = SCB_CMD_RESET;
554 scb.scb_cbl_offset = OFFSET_CU;
555 scb.scb_rfa_offset = OFFSET_RU;
556 obram_write(ioaddr, OFFSET_SCB, (unsigned char *)&scb, sizeof(scb));
557
558 set_chan_attn(ioaddr, lp->hacr);
559
560 for (i = 1000000; i > 0; i--)
561 {
562 obram_read(ioaddr, OFFSET_ISCP, (unsigned char *)&iscp, sizeof(iscp));
563
564 if (iscp.iscp_busy == (unsigned short)0)
565 break;
566 }
567
568 if (i <= 0)
569 printk("%s: wavelan_hardware_reset(): iscp_busy timeout.\n", dev->name);
570
571 for (i = 15000; i > 0; i--)
572 {
573 obram_read(ioaddr, OFFSET_SCB, (unsigned char *)&scb, sizeof(scb));
574
575 if (scb.scb_status == (SCB_ST_CX | SCB_ST_CNA))
576 break;
577 }
578
579 if (i <= 0)
580 printk("%s: wavelan_hardware_reset(): status: expected 0x%02x, got 0x%02x.\n", dev->name, SCB_ST_CX | SCB_ST_CNA, scb.scb_status);
581
582 wavelan_ack(dev);
583
584 memset(&cb, 0x00, sizeof(cb));
585 cb.ac_command = AC_CFLD_EL | (AC_CFLD_CMD & acmd_diagnose);
586 cb.ac_link = OFFSET_CU;
587 obram_write(ioaddr, OFFSET_CU, (unsigned char *)&cb, sizeof(cb));
588
589 if (wavelan_synchronous_cmd(dev, "diag()") == -1)
590 return -1;
591
592 obram_read(ioaddr, OFFSET_CU, (unsigned char *)&cb, sizeof(cb));
593 if (cb.ac_status & AC_SFLD_FAIL)
594 {
595 printk("%s: wavelan_hardware_reset(): i82586 Self Test failed.\n", dev->name);
596 return -1;
597 }
598
599 memset(&cfg, 0x00, sizeof(cfg));
600
601 #if 0
602
603
604
605 cfg.fifolim_bytecnt = 0x080c;
606 cfg.addrlen_mode = 0x2600;
607 cfg.linprio_interframe = 0x7820;
608 cfg.slot_time = 0xf00c;
609 cfg.hardware = 0x0008;
610 cfg.min_frame_len = 0x0040;
611 #endif
612
613
614
615
616
617
618 cfg.cfg_byte_cnt = AC_CFG_BYTE_CNT(sizeof(ac_cfg_t) - sizeof(ach_t));
619 cfg.cfg_fifolim = AC_CFG_FIFOLIM(8);
620 cfg.cfg_byte8 = AC_CFG_SAV_BF(0) |
621 AC_CFG_SRDY(0);
622 cfg.cfg_byte9 = AC_CFG_ELPBCK(0) |
623 AC_CFG_ILPBCK(0) |
624 AC_CFG_PRELEN(AC_CFG_PLEN_2) |
625 AC_CFG_ALOC(1) |
626 AC_CFG_ADDRLEN(WAVELAN_ADDR_SIZE);
627 cfg.cfg_byte10 = AC_CFG_BOFMET(0) |
628 AC_CFG_ACR(0) |
629 AC_CFG_LINPRIO(0);
630 cfg.cfg_ifs = 32;
631 cfg.cfg_slotl = 0;
632 cfg.cfg_byte13 = AC_CFG_RETRYNUM(15) |
633 AC_CFG_SLTTMHI(2);
634 cfg.cfg_byte14 = AC_CFG_FLGPAD(0) |
635 AC_CFG_BTSTF(0) |
636 AC_CFG_CRC16(0) |
637 AC_CFG_NCRC(0) |
638 AC_CFG_TNCRS(1) |
639 AC_CFG_MANCH(0) |
640 AC_CFG_BCDIS(0) |
641 AC_CFG_PRM(lp->promiscuous);
642 cfg.cfg_byte15 = AC_CFG_ICDS(0) |
643 AC_CFG_CDTF(0) |
644 AC_CFG_ICSS(0) |
645 AC_CFG_CSTF(0);
646
647
648
649 cfg.cfg_min_frm_len = AC_CFG_MNFRM(8);
650
651 cfg.cfg_h.ac_command = AC_CFLD_EL | (AC_CFLD_CMD & acmd_configure);
652 cfg.cfg_h.ac_link = OFFSET_CU;
653 obram_write(ioaddr, OFFSET_CU, (unsigned char *)&cfg, sizeof(cfg));
654
655 if (wavelan_synchronous_cmd(dev, "reset()-configure") == -1)
656 return -1;
657
658 memset(&ias, 0x00, sizeof(ias));
659 ias.ias_h.ac_command = AC_CFLD_EL | (AC_CFLD_CMD & acmd_ia_setup);
660 ias.ias_h.ac_link = OFFSET_CU;
661 memcpy(&ias.ias_addr[0], (unsigned char *)&dev->dev_addr[0], sizeof(ias.ias_addr));
662 obram_write(ioaddr, OFFSET_CU, (unsigned char *)&ias, sizeof(ias));
663
664 if (wavelan_synchronous_cmd(dev, "reset()-address") == -1)
665 return -1;
666
667 wavelan_ints_on(dev);
668
669 if (wavelan_debug > 4)
670 {
671 wavelan_scb_show(ioaddr);
672 printk("%s: Initialized WaveLAN.\n", dev->name);
673 }
674
675 wavelan_ru_start(dev);
676 wavelan_cu_start(dev);
677
678 return 0;
679 }
680
681 #if STRUCT_CHECK == 1
682
683 static
684 char *
685 wavelan_struct_check(void)
686 {
687 #define SC(t,s,n) if (sizeof(t) != s) return n
688 SC(psa_t, PSA_SIZE, "psa_t");
689 SC(mmw_t, MMW_SIZE, "mmw_t");
690 SC(mmr_t, MMR_SIZE, "mmr_t");
691 SC(ha_t, HA_SIZE, "ha_t");
692 #undef SC
693
694 return (char *)0;
695 }
696
697 #endif
698
699
700
701
702
703
704
705
706 int
707 wavelan_probe(device *dev)
708 {
709 int i;
710 short base_addr;
711 static unsigned short iobase[] =
712 {
713 #if 0
714 Leave out 0x3C0 for now -- seems to clash
715 with some video controllers.
716 Leave out the others too -- we will always
717 use 0x390 and leave 0x300 for the Ethernet device.
718 0x300, 0x390, 0x3E0, 0x3C0,
719 #endif
720 0x390,
721 };
722
723 #if STRUCT_CHECK == 1
724 if (wavelan_struct_check() != (char *)0)
725 {
726 printk("%s: structure/compiler botch: \"%s\"\n", dev->name, wavelan_struct_check());
727 return ENODEV;
728 }
729 #endif
730
731 base_addr = dev->base_addr;
732
733 if (base_addr < 0)
734
735
736
737 return ENXIO;
738
739 if (base_addr > 0x100)
740
741
742
743 return wavelan_probe1(dev, base_addr);
744
745 for (i = 0; i < nels(iobase); i++)
746 {
747 if (check_region(iobase[i], sizeof(ha_t)))
748 continue;
749
750 if (wavelan_probe1(dev, iobase[i]) == 0)
751 return 0;
752 }
753
754 return ENODEV;
755 }
756
757 static
758 int
759 wavelan_probe1(device *dev, unsigned short ioaddr)
760 {
761 psa_t psa;
762 int irq;
763 int i;
764 net_local *lp;
765
766 wavelan_reset(ioaddr);
767
768 psa_read(ioaddr, HACR_DEFAULT, 0, (unsigned char *)&psa, sizeof(psa));
769
770
771
772
773
774 if
775 (
776 psa.psa_univ_mac_addr[0] != SA_ADDR0
777 ||
778 psa.psa_univ_mac_addr[1] != SA_ADDR1
779 ||
780 psa.psa_univ_mac_addr[2] != SA_ADDR2
781 )
782 return ENODEV;
783
784 printk("%s: WaveLAN at %#x,", dev->name, ioaddr);
785
786 if ((irq = wavelan_map_irq(ioaddr, psa.psa_int_req_no)) == -1)
787 {
788 printk(" could not wavelan_map_irq(0x%x, %d).\n", ioaddr, psa.psa_int_req_no);
789 return EAGAIN;
790 }
791
792 dev->irq = irq;
793
794 request_region(ioaddr, sizeof(ha_t), "wavelan");
795 dev->base_addr = ioaddr;
796
797
798
799
800
801
802 if (dev->mem_start != 0)
803 {
804 psa.psa_nwid[0] = (dev->mem_start >> 8) & 0xFF;
805 psa.psa_nwid[1] = (dev->mem_start >> 0) & 0xFF;
806 }
807
808 dev->mem_start = 0x0000;
809 dev->mem_end = 0x0000;
810 dev->if_port = 0;
811
812 memcpy(&dev->dev_addr[0], &psa.psa_univ_mac_addr[0], WAVELAN_ADDR_SIZE);
813
814 for (i = 0; i < WAVELAN_ADDR_SIZE; i++)
815 printk("%s%02x", (i == 0) ? " " : ":", dev->dev_addr[i]);
816
817 printk(", IRQ %d", dev->irq);
818 printk(", nwid 0x%02x%02x", psa.psa_nwid[0], psa.psa_nwid[1]);
819
820 printk(", PC");
821 switch (psa.psa_comp_number)
822 {
823 case PSA_COMP_PC_AT_915:
824 case PSA_COMP_PC_AT_2400:
825 printk("-AT");
826 break;
827
828 case PSA_COMP_PC_MC_915:
829 case PSA_COMP_PC_MC_2400:
830 printk("-MC");
831 break;
832
833 case PSA_COMP_PCMCIA_915:
834 printk("MCIA");
835 break;
836
837 default:
838 printk("???");
839 break;
840 }
841
842 printk(", ");
843 switch (psa.psa_subband)
844 {
845 case PSA_SUBBAND_915:
846 printk("915");
847 break;
848
849 case PSA_SUBBAND_2425:
850 printk("2425");
851 break;
852
853 case PSA_SUBBAND_2460:
854 printk("2460");
855 break;
856
857 case PSA_SUBBAND_2484:
858 printk("2484");
859 break;
860
861 case PSA_SUBBAND_2430_5:
862 printk("2430.5");
863 break;
864
865 default:
866 printk("???");
867 break;
868 }
869 printk(" MHz");
870
871 printk("\n");
872
873 if (wavelan_debug)
874 printk(version);
875
876 dev->priv = kmalloc(sizeof(net_local), GFP_KERNEL);
877 memset(dev->priv, 0x00, sizeof(net_local));
878 lp = (net_local *)dev->priv;
879
880 if (first_wavelan == (net_local *)0)
881 {
882 first_wavelan = lp;
883 lp->prev = lp;
884 lp->next = lp;
885 }
886 else
887 {
888 lp->prev = first_wavelan->prev;
889 lp->next = first_wavelan;
890 first_wavelan->prev->next = lp;
891 first_wavelan->prev = lp;
892 }
893 lp->dev = dev;
894
895 lp->hacr = HACR_DEFAULT;
896
897 lp->nwid[0] = psa.psa_nwid[0];
898 lp->nwid[1] = psa.psa_nwid[1];
899
900 lp->watchdog.function = wavelan_watchdog;
901 lp->watchdog.data = (unsigned long)dev;
902
903 dev->open = wavelan_open;
904 dev->stop = wavelan_close;
905 dev->hard_start_xmit = wavelan_send_packet;
906 dev->get_stats = wavelan_get_stats;
907 dev->set_multicast_list = &wavelan_set_multicast_list;
908
909
910
911
912
913 ether_setup(dev);
914
915 dev->mtu = WAVELAN_MTU;
916
917 return 0;
918 }
919
920
921
922
923
924 static
925 void
926 wavelan_ru_start(device *dev)
927 {
928 unsigned short ioaddr;
929 net_local *lp;
930 unsigned short scb_cs;
931 fd_t fd;
932 rbd_t rbd;
933 unsigned short rx;
934 unsigned short rx_next;
935 int i;
936
937 ioaddr = dev->base_addr;
938 lp = (net_local *)dev->priv;
939
940 obram_read(ioaddr, scboff(OFFSET_SCB, scb_status), (unsigned char *)&scb_cs, sizeof(scb_cs));
941 if ((scb_cs & SCB_ST_RUS) == SCB_ST_RUS_RDY)
942 return;
943
944 lp->rx_head = OFFSET_RU;
945
946 for (i = 0, rx = lp->rx_head; i < NRXBLOCKS; i++, rx = rx_next)
947 {
948 rx_next = (i == NRXBLOCKS - 1) ? lp->rx_head : rx + RXBLOCKZ;
949
950 fd.fd_status = 0;
951 fd.fd_command = (i == NRXBLOCKS - 1) ? FD_COMMAND_EL : 0;
952 fd.fd_link_offset = rx_next;
953 fd.fd_rbd_offset = rx + sizeof(fd);
954 obram_write(ioaddr, rx, (unsigned char *)&fd, sizeof(fd));
955
956 rbd.rbd_status = 0;
957 rbd.rbd_next_rbd_offset = I82586NULL;
958 rbd.rbd_bufl = rx + sizeof(fd) + sizeof(rbd);
959 rbd.rbd_bufh = 0;
960 rbd.rbd_el_size = RBD_EL | (RBD_SIZE & MAXDATAZ);
961 obram_write(ioaddr, rx + sizeof(fd), (unsigned char *)&rbd, sizeof(rbd));
962
963 lp->rx_last = rx;
964 }
965
966 obram_write(ioaddr, scboff(OFFSET_SCB, scb_rfa_offset), (unsigned char *)&lp->rx_head, sizeof(lp->rx_head));
967
968 scb_cs = SCB_CMD_RUC_GO;
969 obram_write(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&scb_cs, sizeof(scb_cs));
970
971 set_chan_attn(ioaddr, lp->hacr);
972
973 for (i = 1000000; i > 0; i--)
974 {
975 obram_read(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&scb_cs, sizeof(scb_cs));
976 if (scb_cs == 0)
977 break;
978 }
979
980 if (i <= 0)
981 printk("%s: wavelan_ru_start(): board not accepting command.\n", dev->name);
982 }
983
984
985
986
987
988
989 static
990 void
991 wavelan_cu_start(device *dev)
992 {
993 unsigned short ioaddr;
994 net_local *lp;
995 int i;
996 unsigned short txblock;
997 unsigned short first_nop;
998 unsigned short scb_cs;
999
1000 ioaddr = dev->base_addr;
1001 lp = (net_local *)dev->priv;
1002
1003 lp->tx_first_free = OFFSET_CU;
1004 lp->tx_first_in_use = I82586NULL;
1005
1006 for
1007 (
1008 i = 0, txblock = OFFSET_CU;
1009 i < NTXBLOCKS;
1010 i++, txblock += TXBLOCKZ
1011 )
1012 {
1013 ac_tx_t tx;
1014 ac_nop_t nop;
1015 tbd_t tbd;
1016 unsigned short tx_addr;
1017 unsigned short nop_addr;
1018 unsigned short tbd_addr;
1019 unsigned short buf_addr;
1020
1021 tx_addr = txblock;
1022 nop_addr = tx_addr + sizeof(tx);
1023 tbd_addr = nop_addr + sizeof(nop);
1024 buf_addr = tbd_addr + sizeof(tbd);
1025
1026 tx.tx_h.ac_status = 0;
1027 tx.tx_h.ac_command = acmd_transmit | AC_CFLD_I;
1028 tx.tx_h.ac_link = nop_addr;
1029 tx.tx_tbd_offset = tbd_addr;
1030 obram_write(ioaddr, tx_addr, (unsigned char *)&tx, sizeof(tx));
1031
1032 nop.nop_h.ac_status = 0;
1033 nop.nop_h.ac_command = acmd_nop;
1034 nop.nop_h.ac_link = nop_addr;
1035 obram_write(ioaddr, nop_addr, (unsigned char *)&nop, sizeof(nop));
1036
1037 tbd.tbd_status = TBD_STATUS_EOF;
1038 tbd.tbd_next_bd_offset = I82586NULL;
1039 tbd.tbd_bufl = buf_addr;
1040 tbd.tbd_bufh = 0;
1041 obram_write(ioaddr, tbd_addr, (unsigned char *)&tbd, sizeof(tbd));
1042 }
1043
1044 first_nop = OFFSET_CU + (NTXBLOCKS - 1) * TXBLOCKZ + sizeof(ac_tx_t);
1045 obram_write(ioaddr, scboff(OFFSET_SCB, scb_cbl_offset), (unsigned char *)&first_nop, sizeof(first_nop));
1046
1047 scb_cs = SCB_CMD_CUC_GO;
1048 obram_write(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&scb_cs, sizeof(scb_cs));
1049
1050 set_chan_attn(ioaddr, lp->hacr);
1051
1052 for (i = 1000000; i > 0; i--)
1053 {
1054 obram_read(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&scb_cs, sizeof(scb_cs));
1055 if (scb_cs == 0)
1056 break;
1057 }
1058
1059 if (i <= 0)
1060 printk("%s: wavelan_cu_start(): board not accepting command.\n", dev->name);
1061
1062 lp->tx_n_in_use = 0;
1063 dev->tbusy = 0;
1064 }
1065
1066 static
1067 int
1068 wavelan_open(device *dev)
1069 {
1070 unsigned short ioaddr;
1071 net_local *lp;
1072
1073 ioaddr = dev->base_addr;
1074 lp = (net_local *)dev->priv;
1075
1076 if (dev->irq == 0)
1077 return -ENXIO;
1078
1079 if
1080 (
1081 irq2dev_map[dev->irq] != (device *)0
1082
1083 ||
1084 (irq2dev_map[dev->irq] = dev) == (device *)0
1085 ||
1086 request_irq(dev->irq, &wavelan_interrupt, 0, "WaveLAN") != 0
1087 )
1088 {
1089 irq2dev_map[dev->irq] = (device *)0;
1090 return -EAGAIN;
1091 }
1092
1093 if (wavelan_hardware_reset(dev) == -1)
1094 {
1095 free_irq(dev->irq);
1096 irq2dev_map[dev->irq] = (device *)0;
1097 return -EAGAIN;
1098 }
1099
1100 dev->interrupt = 0;
1101 dev->start = 1;
1102
1103 #if defined(MODULE)
1104 MOD_INC_USE_COUNT;
1105 #endif
1106
1107 return 0;
1108 }
1109
1110 static
1111 void
1112 hardware_send_packet(device *dev, void *buf, short length)
1113 {
1114 unsigned short ioaddr;
1115 net_local *lp;
1116 unsigned short txblock;
1117 unsigned short txpred;
1118 unsigned short tx_addr;
1119 unsigned short nop_addr;
1120 unsigned short tbd_addr;
1121 unsigned short buf_addr;
1122 ac_tx_t tx;
1123 ac_nop_t nop;
1124 tbd_t tbd;
1125 unsigned long x;
1126
1127 ioaddr = dev->base_addr;
1128 lp = (net_local *)dev->priv;
1129
1130 x = wavelan_splhi();
1131
1132 txblock = lp->tx_first_free;
1133 txpred = txblock - TXBLOCKZ;
1134 if (txpred < OFFSET_CU)
1135 txpred += NTXBLOCKS * TXBLOCKZ;
1136 lp->tx_first_free += TXBLOCKZ;
1137 if (lp->tx_first_free >= OFFSET_CU + NTXBLOCKS * TXBLOCKZ)
1138 lp->tx_first_free -= NTXBLOCKS * TXBLOCKZ;
1139
1140
1141
1142
1143
1144
1145 lp->tx_n_in_use++;
1146
1147 tx_addr = txblock;
1148 nop_addr = tx_addr + sizeof(tx);
1149 tbd_addr = nop_addr + sizeof(nop);
1150 buf_addr = tbd_addr + sizeof(tbd);
1151
1152
1153
1154
1155 tx.tx_h.ac_status = 0;
1156 obram_write(ioaddr, toff(ac_tx_t, tx_addr, tx_h.ac_status), (unsigned char *)&tx.tx_h.ac_status, sizeof(tx.tx_h.ac_status));
1157
1158
1159
1160
1161 nop.nop_h.ac_status = 0;
1162 obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_status), (unsigned char *)&nop.nop_h.ac_status, sizeof(nop.nop_h.ac_status));
1163 nop.nop_h.ac_link = nop_addr;
1164 obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_link), (unsigned char *)&nop.nop_h.ac_link, sizeof(nop.nop_h.ac_link));
1165
1166
1167
1168
1169 tbd.tbd_status = TBD_STATUS_EOF | (TBD_STATUS_ACNT & length);
1170 tbd.tbd_next_bd_offset = I82586NULL;
1171 tbd.tbd_bufl = buf_addr;
1172 tbd.tbd_bufh = 0;
1173 obram_write(ioaddr, tbd_addr, (unsigned char *)&tbd, sizeof(tbd));
1174
1175
1176
1177
1178 obram_write(ioaddr, buf_addr, buf, length);
1179
1180
1181
1182
1183
1184 nop_addr = txpred + sizeof(tx);
1185 nop.nop_h.ac_status = 0;
1186 obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_status), (unsigned char *)&nop.nop_h.ac_status, sizeof(nop.nop_h.ac_status));
1187 nop.nop_h.ac_link = txblock;
1188 obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_link), (unsigned char *)&nop.nop_h.ac_link, sizeof(nop.nop_h.ac_link));
1189
1190 if (lp->tx_first_in_use == I82586NULL)
1191 lp->tx_first_in_use = txblock;
1192
1193 if (lp->tx_n_in_use < NTXBLOCKS - 1)
1194 dev->tbusy = 0;
1195
1196 dev->trans_start = jiffies;
1197
1198 if (lp->watchdog.next == (timer_list *)0)
1199 wavelan_watchdog((unsigned long)dev);
1200
1201 wavelan_splx(x);
1202
1203 if (wavelan_debug > 4)
1204 {
1205 unsigned char *a;
1206
1207 a = (unsigned char *)buf;
1208
1209 printk
1210 (
1211 "%s: tx: dest %02x:%02x:%02x:%02x:%02x:%02x, length %d, tbd.tbd_bufl 0x%x.\n",
1212 dev->name,
1213 a[0], a[1], a[2], a[3], a[4], a[5],
1214 length,
1215 buf_addr
1216 );
1217 }
1218 }
1219
1220 static
1221 int
1222 wavelan_send_packet(struct sk_buff *skb, device *dev)
1223 {
1224 unsigned short ioaddr;
1225
1226 ioaddr = dev->base_addr;
1227
1228 if (dev->tbusy)
1229 {
1230
1231
1232
1233
1234 int tickssofar;
1235
1236 tickssofar = jiffies - dev->trans_start;
1237
1238
1239
1240
1241
1242
1243
1244
1245 return 1;
1246
1247 wavelan_scb_show(ioaddr);
1248 wavelan_ru_show(dev);
1249 wavelan_cu_show(dev);
1250 wavelan_dev_show(dev);
1251 wavelan_local_show(dev);
1252
1253 printk("%s: transmit timed out -- resetting board.\n", dev->name);
1254
1255 (void)wavelan_hardware_reset(dev);
1256 }
1257
1258
1259
1260
1261
1262
1263 if (skb == (struct sk_buff *)0)
1264 {
1265 dev_tint(dev);
1266 return 0;
1267 }
1268
1269
1270
1271
1272 if (set_bit(0, (void *)&dev->tbusy) == 0)
1273 {
1274 short length;
1275 unsigned char *buf;
1276
1277 length = (ETH_ZLEN < skb->len) ? skb->len : ETH_ZLEN;
1278 buf = skb->data;
1279
1280 hardware_send_packet(dev, buf, length);
1281 }
1282 else
1283 printk("%s: Transmitter access conflict.\n", dev->name);
1284
1285 dev_kfree_skb(skb, FREE_WRITE);
1286
1287 return 0;
1288 }
1289
1290 #if 0
1291 static
1292 int
1293 addrcmp(unsigned char *a0, unsigned char *a1)
1294 {
1295 int i;
1296
1297 for (i = 0; i < WAVELAN_ADDR_SIZE; i++)
1298 {
1299 if (a0[i] != a1[i])
1300 return a0[i] - a1[i];
1301 }
1302
1303 return 0;
1304 }
1305 #endif
1306
1307
1308
1309
1310
1311
1312 static
1313 void
1314 wavelan_receive(device *dev)
1315 {
1316 unsigned short ioaddr;
1317 net_local *lp;
1318 int nreaped;
1319
1320 ioaddr = dev->base_addr;
1321 lp = (net_local *)dev->priv;
1322 nreaped = 0;
1323
1324 for (;;)
1325 {
1326 fd_t fd;
1327 rbd_t rbd;
1328 ushort pkt_len;
1329 int sksize;
1330 struct sk_buff *skb;
1331
1332 obram_read(ioaddr, lp->rx_head, (unsigned char *)&fd, sizeof(fd));
1333
1334 if ((fd.fd_status & FD_STATUS_C) != FD_STATUS_C)
1335 break;
1336
1337 nreaped++;
1338
1339 if
1340 (
1341 (fd.fd_status & (FD_STATUS_B | FD_STATUS_OK))
1342 !=
1343 (FD_STATUS_B | FD_STATUS_OK)
1344 )
1345 {
1346
1347
1348
1349
1350
1351
1352
1353 if ((fd.fd_status & FD_STATUS_OK) != FD_STATUS_OK)
1354 printk("%s: frame not received successfully.\n", dev->name);
1355 }
1356
1357 if ((fd.fd_status & (FD_STATUS_S6 | FD_STATUS_S7 | FD_STATUS_S8 | FD_STATUS_S9 | FD_STATUS_S10 | FD_STATUS_S11)) != 0)
1358 {
1359 lp->stats.rx_errors++;
1360
1361 if ((fd.fd_status & FD_STATUS_S6) != 0)
1362 printk("%s: no EOF flag.\n", dev->name);
1363
1364 if ((fd.fd_status & FD_STATUS_S7) != 0)
1365 {
1366 lp->stats.rx_length_errors++;
1367 printk("%s: frame too short.\n", dev->name);
1368 }
1369
1370 if ((fd.fd_status & FD_STATUS_S8) != 0)
1371 {
1372 lp->stats.rx_over_errors++;
1373 printk("%s: rx DMA overrun.\n", dev->name);
1374 }
1375
1376 if ((fd.fd_status & FD_STATUS_S9) != 0)
1377 {
1378 lp->stats.rx_fifo_errors++;
1379 printk("%s: ran out of resources.\n", dev->name);
1380 }
1381
1382 if ((fd.fd_status & FD_STATUS_S10) != 0)
1383 {
1384 lp->stats.rx_frame_errors++;
1385 printk("%s: alignment error.\n", dev->name);
1386 }
1387
1388 if ((fd.fd_status & FD_STATUS_S11) != 0)
1389 {
1390 lp->stats.rx_crc_errors++;
1391 printk("%s: CRC error.\n", dev->name);
1392 }
1393 }
1394
1395 if (fd.fd_rbd_offset == I82586NULL)
1396 printk("%s: frame has no data.\n", dev->name);
1397 else
1398 {
1399 obram_read(ioaddr, fd.fd_rbd_offset, (unsigned char *)&rbd, sizeof(rbd));
1400
1401 if ((rbd.rbd_status & RBD_STATUS_EOF) != RBD_STATUS_EOF)
1402 printk("%s: missing EOF flag.\n", dev->name);
1403
1404 if ((rbd.rbd_status & RBD_STATUS_F) != RBD_STATUS_F)
1405 printk("%s: missing F flag.\n", dev->name);
1406
1407 pkt_len = rbd.rbd_status & RBD_STATUS_ACNT;
1408
1409 #if 0
1410 {
1411 unsigned char addr[WAVELAN_ADDR_SIZE];
1412 int i;
1413 static unsigned char toweraddr[WAVELAN_ADDR_SIZE] =
1414 {
1415 0x08, 0x00, 0x0e, 0x20, 0x3e, 0xd3,
1416 };
1417
1418 obram_read(ioaddr, rbd.rbd_bufl + sizeof(addr), &addr[0], sizeof(addr));
1419 if
1420 (
1421
1422
1423
1424
1425 addrcmp(&addr[0], toweraddr) != 0
1426 )
1427 {
1428 printk("%s: foreign MAC source addr=", dev->name);
1429 for (i = 0; i < WAVELAN_ADDR_SIZE; i++)
1430 printk("%s%02x", (i == 0) ? "" : ":", addr[i]);
1431 printk("\n");
1432 }
1433 }
1434 #endif
1435
1436 if (wavelan_debug > 0)
1437 {
1438 unsigned char addr[WAVELAN_ADDR_SIZE];
1439 unsigned short ltype;
1440 int i;
1441
1442 #if 0
1443 printk("%s: fd_dest=", dev->name);
1444 for (i = 0; i < WAVELAN_ADDR_SIZE; i++)
1445 printk("%s%02x", (i == 0) ? "" : ":", fd.fd_dest[i]);
1446 printk("\n");
1447
1448 printk("%s: fd_src=", dev->name);
1449 for (i = 0; i < WAVELAN_ADDR_SIZE; i++)
1450 printk("%s%02x", (i == 0) ? "" : ":", fd.fd_src[i]);
1451 printk("\n");
1452 printk("%s: fd_length=%d\n", dev->name, fd.fd_length);
1453 #endif
1454
1455 obram_read(ioaddr, rbd.rbd_bufl, &addr[0], sizeof(addr));
1456 printk("%s: dest=", dev->name);
1457 for (i = 0; i < WAVELAN_ADDR_SIZE; i++)
1458 printk("%s%02x", (i == 0) ? "" : ":", addr[i]);
1459 printk("\n");
1460
1461 obram_read(ioaddr, rbd.rbd_bufl + sizeof(addr), &addr[0], sizeof(addr));
1462 printk("%s: src=", dev->name);
1463 for (i = 0; i < WAVELAN_ADDR_SIZE; i++)
1464 printk("%s%02x", (i == 0) ? "" : ":", addr[i]);
1465 printk("\n");
1466
1467 obram_read(ioaddr, rbd.rbd_bufl + sizeof(addr) * 2, (unsigned char *)<ype, sizeof(ltype));
1468 printk("%s: ntohs(length/type)=0x%04x\n", dev->name, ntohs(ltype));
1469 }
1470
1471 sksize = pkt_len;
1472
1473 if ((skb = alloc_skb(sksize, GFP_ATOMIC)) == (struct sk_buff *)0)
1474 {
1475 printk("%s: could not alloc_skb(%d, GFP_ATOMIC).\n", dev->name, sksize);
1476 lp->stats.rx_dropped++;
1477 }
1478 else
1479 {
1480 skb->len = pkt_len;
1481 skb->dev = dev;
1482
1483 obram_read(ioaddr, rbd.rbd_bufl, skb->data, pkt_len);
1484
1485 if (wavelan_debug > 5)
1486 {
1487 int i;
1488 int maxi;
1489
1490 printk("%s: pkt_len=%d, data=\"", dev->name, pkt_len);
1491
1492 if ((maxi = pkt_len) > 16)
1493 maxi = 16;
1494
1495 for (i = 0; i < maxi; i++)
1496 {
1497 unsigned char c;
1498
1499 c = skb->data[i];
1500 if (c >= ' ' && c <= '~')
1501 printk(" %c", skb->data[i]);
1502 else
1503 printk("%02x", skb->data[i]);
1504 }
1505
1506 if (maxi < pkt_len)
1507 printk("..");
1508
1509 printk("\"\n\n");
1510 }
1511
1512 netif_rx(skb);
1513
1514 lp->stats.rx_packets++;
1515 }
1516 }
1517
1518 fd.fd_status = 0;
1519 obram_write(ioaddr, fdoff(lp->rx_head, fd_status), (unsigned char *)&fd.fd_status, sizeof(fd.fd_status));
1520
1521 fd.fd_command = FD_COMMAND_EL;
1522 obram_write(ioaddr, fdoff(lp->rx_head, fd_command), (unsigned char *)&fd.fd_command, sizeof(fd.fd_command));
1523
1524 fd.fd_command = 0;
1525 obram_write(ioaddr, fdoff(lp->rx_last, fd_command), (unsigned char *)&fd.fd_command, sizeof(fd.fd_command));
1526
1527 lp->rx_last = lp->rx_head;
1528 lp->rx_head = fd.fd_link_offset;
1529 }
1530
1531
1532
1533
1534
1535 }
1536
1537
1538
1539
1540
1541 static
1542 int
1543 wavelan_complete(device *dev, unsigned short ioaddr, net_local *lp)
1544 {
1545 int nreaped;
1546
1547 nreaped = 0;
1548
1549 for (;;)
1550 {
1551 unsigned short tx_status;
1552
1553 if (lp->tx_first_in_use == I82586NULL)
1554 break;
1555
1556 obram_read(ioaddr, acoff(lp->tx_first_in_use, ac_status), (unsigned char *)&tx_status, sizeof(tx_status));
1557
1558 if ((tx_status & AC_SFLD_C) == 0)
1559 break;
1560
1561 nreaped++;
1562
1563 --lp->tx_n_in_use;
1564
1565
1566
1567
1568
1569
1570 if (lp->tx_n_in_use <= 0)
1571 lp->tx_first_in_use = I82586NULL;
1572 else
1573 {
1574 lp->tx_first_in_use += TXBLOCKZ;
1575 if (lp->tx_first_in_use >= OFFSET_CU + NTXBLOCKS * TXBLOCKZ)
1576 lp->tx_first_in_use -= NTXBLOCKS * TXBLOCKZ;
1577 }
1578
1579 if (tx_status & AC_SFLD_OK)
1580 {
1581 int ncollisions;
1582
1583 lp->stats.tx_packets++;
1584 ncollisions = tx_status & AC_SFLD_MAXCOL;
1585 lp->stats.collisions += ncollisions;
1586
1587
1588
1589
1590 }
1591 else
1592 {
1593 lp->stats.tx_errors++;
1594 if (tx_status & AC_SFLD_S10)
1595 {
1596 lp->stats.tx_carrier_errors++;
1597 if (wavelan_debug > 0)
1598 printk("%s: tx error: no CS.\n", dev->name);
1599 }
1600 if (tx_status & AC_SFLD_S9)
1601 {
1602 lp->stats.tx_carrier_errors++;
1603 printk("%s: tx error: lost CTS.\n", dev->name);
1604 }
1605 if (tx_status & AC_SFLD_S8)
1606 {
1607 lp->stats.tx_fifo_errors++;
1608 printk("%s: tx error: slow DMA.\n", dev->name);
1609 }
1610 if (tx_status & AC_SFLD_S6)
1611 {
1612 lp->stats.tx_heartbeat_errors++;
1613 if (wavelan_debug > 0)
1614 printk("%s: tx error: heart beat.\n", dev->name);
1615 }
1616 if (tx_status & AC_SFLD_S5)
1617 {
1618 lp->stats.tx_aborted_errors++;
1619 if (wavelan_debug > 0)
1620 printk("%s: tx error: too many collisions.\n", dev->name);
1621 }
1622 }
1623
1624 if (wavelan_debug > 5)
1625 printk("%s: tx completed, tx_status 0x%04x.\n", dev->name, tx_status);
1626 }
1627
1628
1629
1630
1631
1632
1633
1634
1635
1636 if (lp->tx_n_in_use < NTXBLOCKS - 1)
1637 {
1638 dev->tbusy = 0;
1639 mark_bh(NET_BH);
1640 }
1641
1642 return nreaped;
1643 }
1644
1645 static
1646 void
1647 wavelan_watchdog(unsigned long a)
1648 {
1649 device *dev;
1650 net_local *lp;
1651 unsigned short ioaddr;
1652 unsigned long x;
1653 unsigned int nreaped;
1654
1655 x = wavelan_splhi();
1656
1657 dev = (device *)a;
1658 ioaddr = dev->base_addr;
1659 lp = (net_local *)dev->priv;
1660
1661 if (lp->tx_n_in_use <= 0)
1662 {
1663 wavelan_splx(x);
1664 return;
1665 }
1666
1667 lp->watchdog.expires = WATCHDOG_JIFFIES;
1668 add_timer(&lp->watchdog);
1669
1670 if (jiffies - dev->trans_start < WATCHDOG_JIFFIES)
1671 {
1672 wavelan_splx(x);
1673 return;
1674 }
1675
1676 nreaped = wavelan_complete(dev, ioaddr, lp);
1677
1678 printk("%s: warning: wavelan_watchdog(): %d reaped, %d remain.\n", dev->name, nreaped, lp->tx_n_in_use);
1679
1680
1681
1682
1683
1684
1685
1686
1687 wavelan_splx(x);
1688 }
1689
1690 static
1691 void
1692 wavelan_interrupt(int irq, struct pt_regs *regs)
1693 {
1694 device *dev;
1695 unsigned short ioaddr;
1696 net_local *lp;
1697 unsigned short hasr;
1698 unsigned short status;
1699 unsigned short ack_cmd;
1700
1701 if ((dev = (device *)(irq2dev_map[irq])) == (device *)0)
1702 {
1703 printk("wavelan_interrupt(): irq %d for unknown device.\n", irq);
1704 return;
1705 }
1706
1707 ioaddr = dev->base_addr;
1708 lp = (net_local *)dev->priv;
1709
1710 dev->interrupt = 1;
1711
1712 if ((hasr = hasr_read(ioaddr)) & HASR_MMC_INTR)
1713 {
1714 unsigned char dce_status;
1715
1716
1717
1718
1719
1720 mmc_read(ioaddr, mmroff(0, mmr_dce_status), &dce_status, sizeof(dce_status));
1721 if (wavelan_debug > 4)
1722 printk("%s: warning: wavelan_interrupt(): unexpected mmc interrupt: status 0x%04x.\n", dev->name, dce_status);
1723 }
1724
1725 if ((hasr & HASR_82586_INTR) == 0)
1726 {
1727 dev->interrupt = 0;
1728 if (wavelan_debug > 4)
1729 printk("%s: warning: wavelan_interrupt() but (hasr & HASR_82586_INTR) == 0.\n", dev->name);
1730 return;
1731 }
1732
1733 obram_read(ioaddr, scboff(OFFSET_SCB, scb_status), (unsigned char *)&status, sizeof(status));
1734
1735
1736
1737
1738 ack_cmd = status & SCB_ST_INT;
1739
1740 obram_write(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&ack_cmd, sizeof(ack_cmd));
1741
1742 set_chan_attn(ioaddr, lp->hacr);
1743
1744 if (wavelan_debug > 4)
1745 printk("%s: interrupt, status 0x%04x.\n", dev->name, status);
1746
1747 if ((status & SCB_ST_CX) == SCB_ST_CX)
1748 {
1749
1750
1751
1752 if (wavelan_debug > 5)
1753 printk("%s: command completed.\n", dev->name);
1754 (void)wavelan_complete(dev, ioaddr, lp);
1755 }
1756
1757 if ((status & SCB_ST_FR) == SCB_ST_FR)
1758 {
1759
1760
1761
1762 if (wavelan_debug > 5)
1763 printk("%s: received packet.\n", dev->name);
1764 wavelan_receive(dev);
1765 }
1766
1767 if
1768 (
1769 (status & SCB_ST_CNA) == SCB_ST_CNA
1770 ||
1771 (((status & SCB_ST_CUS) != SCB_ST_CUS_ACTV) && dev->start)
1772 )
1773 {
1774 printk("%s: warning: CU inactive -- restarting.\n", dev->name);
1775
1776 (void)wavelan_hardware_reset(dev);
1777 }
1778
1779 if
1780 (
1781 (status & SCB_ST_RNR) == SCB_ST_RNR
1782 ||
1783 (((status & SCB_ST_RUS) != SCB_ST_RUS_RDY) && dev->start)
1784 )
1785 {
1786 printk("%s: warning: RU not ready -- restarting.\n", dev->name);
1787
1788 (void)wavelan_hardware_reset(dev);
1789 }
1790
1791 dev->interrupt = 0;
1792 }
1793
1794 static
1795 int
1796 wavelan_close(device *dev)
1797 {
1798 unsigned short ioaddr;
1799 net_local *lp;
1800 unsigned short scb_cmd;
1801
1802 ioaddr = dev->base_addr;
1803 lp = (net_local *)dev->priv;
1804
1805 dev->tbusy = 1;
1806 dev->start = 0;
1807
1808
1809
1810
1811 scb_cmd = (SCB_CMD_CUC & SCB_CMD_CUC_SUS) | (SCB_CMD_RUC & SCB_CMD_RUC_SUS);
1812 obram_write(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&scb_cmd, sizeof(scb_cmd));
1813 set_chan_attn(ioaddr, lp->hacr);
1814
1815 wavelan_ints_off(dev);
1816
1817 free_irq(dev->irq);
1818 irq2dev_map[dev->irq] = (device *)0;
1819
1820
1821
1822
1823 release_region(ioaddr, sizeof(ha_t));
1824
1825 #if defined(MODULE)
1826 MOD_DEC_USE_COUNT;
1827 #endif
1828
1829 return 0;
1830 }
1831
1832
1833
1834
1835
1836 static
1837 en_stats *
1838 wavelan_get_stats(device *dev)
1839 {
1840 net_local *lp;
1841
1842 lp = (net_local *)dev->priv;
1843
1844 return &lp->stats;
1845 }
1846
1847 static
1848 void
1849 wavelan_set_multicast_list(device *dev, int num_addrs, void *addrs)
1850 {
1851 net_local *lp;
1852
1853 lp = (net_local *)dev->priv;
1854
1855 switch (num_addrs)
1856 {
1857 case -1:
1858
1859
1860
1861 lp->promiscuous = 1;
1862 (void)wavelan_hardware_reset(dev);
1863 break;
1864
1865 case 0:
1866
1867
1868
1869
1870 lp->promiscuous = 0;
1871 (void)wavelan_hardware_reset(dev);
1872 break;
1873
1874 default:
1875
1876
1877
1878
1879 break;
1880 }
1881 }
1882
1883
1884
1885
1886
1887 static
1888 int
1889 sprintf_stats(char *buffer, device *dev)
1890 {
1891 net_local *lp;
1892 unsigned char v;
1893 mmr_t m;
1894
1895 lp = (net_local *)dev->priv;
1896
1897 if (lp == (net_local *)0)
1898 return sprintf(buffer, "%6s: No statistics available.\n", dev->name);
1899
1900 v = (unsigned char)1;
1901 mmc_write(dev->base_addr, mmwoff(0, mmw_freeze), &v, sizeof(v));
1902
1903 mmc_read(dev->base_addr, mmroff(0, mmr_dce_status), &m.mmr_dce_status, sizeof(m.mmr_dce_status));
1904 mmc_read(dev->base_addr, mmroff(0, mmr_correct_nwid_h), &m.mmr_correct_nwid_h, sizeof(m.mmr_correct_nwid_h));
1905 mmc_read(dev->base_addr, mmroff(0, mmr_correct_nwid_l), &m.mmr_correct_nwid_l, sizeof(m.mmr_correct_nwid_l));
1906 mmc_read(dev->base_addr, mmroff(0, mmr_wrong_nwid_h), &m.mmr_wrong_nwid_h, sizeof(m.mmr_wrong_nwid_h));
1907 mmc_read(dev->base_addr, mmroff(0, mmr_wrong_nwid_l), &m.mmr_wrong_nwid_l, sizeof(m.mmr_wrong_nwid_l));
1908 mmc_read(dev->base_addr, mmroff(0, mmr_signal_lvl), &m.mmr_signal_lvl, sizeof(m.mmr_signal_lvl));
1909 mmc_read(dev->base_addr, mmroff(0, mmr_silence_lvl), &m.mmr_silence_lvl, sizeof(m.mmr_silence_lvl));
1910 mmc_read(dev->base_addr, mmroff(0, mmr_sgnl_qual), &m.mmr_sgnl_qual, sizeof(m.mmr_sgnl_qual));
1911
1912 v = (unsigned char)0;
1913 mmc_write(dev->base_addr, mmwoff(0, mmw_freeze), &v, sizeof(v));
1914
1915 lp->correct_nwid += (m.mmr_correct_nwid_h << 8) | m.mmr_correct_nwid_l;
1916 lp->wrong_nwid += (m.mmr_wrong_nwid_h << 8) | m.mmr_wrong_nwid_l;
1917
1918 return sprintf
1919 (
1920 buffer,
1921 "%6s: %02x %08x %08x %02x %02x %02x %02x %u\n",
1922 dev->name,
1923 m.mmr_dce_status,
1924 lp->correct_nwid,
1925 lp->wrong_nwid,
1926 m.mmr_signal_lvl,
1927 m.mmr_silence_lvl,
1928 m.mmr_sgnl_qual,
1929 lp->tx_n_in_use,
1930 lp->nresets
1931 );
1932 }
1933
1934 int
1935 wavelan_get_info(char *buffer, char **start, off_t offset, int length)
1936 {
1937 int len;
1938 off_t begin;
1939 off_t pos;
1940 int size;
1941 unsigned long x;
1942
1943 len = 0;
1944 begin = 0;
1945 pos = 0;
1946
1947 size = sprintf(buffer, "%s", "Iface | dce +nwid -nwid lvl slnc qual ntxq nrst\n");
1948
1949 pos += size;
1950 len += size;
1951
1952 x = wavelan_splhi();
1953
1954 if (first_wavelan != (net_local *)0)
1955 {
1956 net_local *lp;
1957
1958 lp = first_wavelan;
1959 do
1960 {
1961 size = sprintf_stats(buffer + len, lp->dev);
1962
1963 len += size;
1964 pos = begin + len;
1965
1966 if (pos < offset)
1967 {
1968 len = 0;
1969 begin = pos;
1970 }
1971
1972 if (pos > offset + length)
1973 break;
1974 }
1975 while ((lp = lp->next) != first_wavelan);
1976 }
1977
1978 wavelan_splx(x);
1979
1980 *start = buffer + (offset - begin);
1981 len -= (offset - begin);
1982 if (len > length)
1983 len = length;
1984
1985 return len;
1986 }
1987
1988 #if defined(MODULE)
1989 char kernel_version[] = UTS_RELEASE;
1990 static struct device dev_wavelan =
1991 {
1992 " " ,
1993 0, 0, 0, 0, 0, 0, 0, 0, 0, NULL, wavelan_probe
1994 };
1995
1996 int
1997 init_module(void)
1998 {
1999 if (register_netdev(&dev_wavelan) != 0)
2000 return -EIO;
2001 return 0;
2002 }
2003
2004 void
2005 cleanup_module(void)
2006 {
2007 if (MOD_IN_USE)
2008 printk("wavelan: device busy, remove delayed\n");
2009 else
2010 {
2011 unregister_netdev(&dev_wavelan);
2012 kfree_s(dev_wavelan.priv, sizeof(struct net_local));
2013 dev_wavelan.priv = NULL;
2014 }
2015 }
2016 #endif
2017
2018 static
2019 void
2020 wavelan_cu_show_one(device *dev, net_local *lp, int i, unsigned short p)
2021 {
2022 unsigned short ioaddr;
2023 ac_tx_t actx;
2024
2025 ioaddr = dev->base_addr;
2026
2027 printk("%d: 0x%x:", i, p);
2028
2029 obram_read(ioaddr, p, (unsigned char *)&actx, sizeof(actx));
2030 printk(" status=0x%x,", actx.tx_h.ac_status);
2031 printk(" command=0x%x,", actx.tx_h.ac_command);
2032
2033
2034
2035
2036
2037
2038
2039
2040
2041
2042 printk("|");
2043 }
2044
2045 #if 0
2046 static
2047 void
2048 wavelan_psa_show(psa_t *p)
2049 {
2050 printk("psa:");
2051
2052 printk("psa_io_base_addr_1: 0x%02x,", p->psa_io_base_addr_1);
2053 printk("psa_io_base_addr_2: 0x%02x,", p->psa_io_base_addr_2);
2054 printk("psa_io_base_addr_3: 0x%02x,", p->psa_io_base_addr_3);
2055 printk("psa_io_base_addr_4: 0x%02x,", p->psa_io_base_addr_4);
2056 printk("psa_rem_boot_addr_1: 0x%02x,", p->psa_rem_boot_addr_1);
2057 printk("psa_rem_boot_addr_2: 0x%02x,", p->psa_rem_boot_addr_2);
2058 printk("psa_rem_boot_addr_3: 0x%02x,", p->psa_rem_boot_addr_3);
2059 printk("psa_holi_params: 0x%02x,", p->psa_holi_params);
2060 printk("psa_int_req_no: %d,", p->psa_int_req_no);
2061 printk
2062 (
2063 "psa_univ_mac_addr[]: %02x:%02x:%02x:%02x:%02x:%02x,",
2064 p->psa_univ_mac_addr[0],
2065 p->psa_univ_mac_addr[1],
2066 p->psa_univ_mac_addr[2],
2067 p->psa_univ_mac_addr[3],
2068 p->psa_univ_mac_addr[4],
2069 p->psa_univ_mac_addr[5]
2070 );
2071 printk
2072 (
2073 "psa_local_mac_addr[]: %02x:%02x:%02x:%02x:%02x:%02x,",
2074 p->psa_local_mac_addr[0],
2075 p->psa_local_mac_addr[1],
2076 p->psa_local_mac_addr[2],
2077 p->psa_local_mac_addr[3],
2078 p->psa_local_mac_addr[4],
2079 p->psa_local_mac_addr[5]
2080 );
2081 printk("psa_univ_local_sel: %d,", p->psa_univ_local_sel);
2082 printk("psa_comp_number: %d,", p->psa_comp_number);
2083 printk("psa_thr_pre_set: 0x%02x,", p->psa_thr_pre_set);
2084 printk("psa_feature_select/decay_prm: 0x%02x,", p->psa_feature_select);
2085 printk("psa_subband/decay_update_prm: %d,", p->psa_subband);
2086 printk("psa_quality_thr: 0x%02x,", p->psa_quality_thr);
2087 printk("psa_mod_delay: 0x%02x,", p->psa_mod_delay);
2088 printk("psa_nwid: 0x%02x%02x,", p->psa_nwid[0], p->psa_nwid[1]);
2089 printk("psa_undefined: %d,", p->psa_undefined);
2090 printk("psa_encryption_select: %d,", p->psa_encryption_select);
2091 printk
2092 (
2093 "psa_encryption_key[]: %02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x,",
2094 p->psa_encryption_key[0],
2095 p->psa_encryption_key[1],
2096 p->psa_encryption_key[2],
2097 p->psa_encryption_key[3],
2098 p->psa_encryption_key[4],
2099 p->psa_encryption_key[5],
2100 p->psa_encryption_key[6],
2101 p->psa_encryption_key[7]
2102 );
2103 printk("psa_databus_width: %d,", p->psa_databus_width);
2104 printk("psa_call_code/auto_squelch: 0x%02x,", p->psa_call_code);
2105 printk("psa_no_of_retries: %d,", p->psa_no_of_retries);
2106 printk("psa_acr: %d,", p->psa_acr);
2107 printk("psa_dump_count: %d,", p->psa_dump_count);
2108 printk("psa_nwid_prefix: 0x%02x,", p->psa_nwid_prefix);
2109 printk("psa_conf_status: %d,", p->psa_conf_status);
2110 printk("psa_crc: 0x%02x%02x,", p->psa_crc[0], p->psa_crc[1]);
2111 printk("psa_crc_status: 0x%02x,", p->psa_crc_status);
2112
2113 printk("\n");
2114 }
2115
2116 static
2117 void
2118 wavelan_mmc_show(unsigned short ioaddr)
2119 {
2120 mmr_t m;
2121
2122 mmc_read(ioaddr, 0, (unsigned char *)&m, sizeof(m));
2123
2124 printk("mmr:");
2125 printk(" des_status: 0x%x", m.mmr_des_status);
2126 printk(" des_avail: 0x%x", m.mmr_des_avail);
2127 printk(" des_io_invert: 0x%x", m.mmr_des_io_invert);
2128 printk
2129 (
2130 " dce_status: 0x%x[%s%s%s%s]",
2131 m.mmr_dce_status & 0x0F,
2132 (m.mmr_dce_status & MMR_DCE_STATUS_ENERG_DET) ? "energy detected," : "",
2133 (m.mmr_dce_status & MMR_DCE_STATUS_LOOPT_IND) ? "loop test indicated," : "",
2134 (m.mmr_dce_status & MMR_DCE_STATUS_XMTITR_IND) ? "transmitter on," : "",
2135 (m.mmr_dce_status & MMR_DCE_STATUS_JBR_EXPIRED) ? "jabber timer expired," : ""
2136 );
2137 printk(" correct_nwid: %d", m.mmr_correct_nwid_h << 8 | m.mmr_correct_nwid_l);
2138 printk(" wrong_nwid: %d", (m.mmr_wrong_nwid_h << 8) | m.mmr_wrong_nwid_l);
2139 printk(" thr_pre_set: 0x%x", m.mmr_thr_pre_set);
2140 printk(" signal_lvl: %d", m.mmr_signal_lvl);
2141 printk(" silence_lvl: %d", m.mmr_silence_lvl);
2142 printk(" sgnl_qual: 0x%x", m.mmr_sgnl_qual);
2143 printk(" netw_id_l: %x", m.mmr_netw_id_l);
2144
2145 printk("\n");
2146 }
2147 #endif
2148
2149 static
2150 void
2151 wavelan_scb_show(unsigned short ioaddr)
2152 {
2153 scb_t scb;
2154
2155 obram_read(ioaddr, OFFSET_SCB, (unsigned char *)&scb, sizeof(scb));
2156
2157 printk("scb:");
2158
2159 printk(" status:");
2160 printk
2161 (
2162 " stat 0x%x[%s%s%s%s]",
2163 (scb.scb_status & (SCB_ST_CX | SCB_ST_FR | SCB_ST_CNA | SCB_ST_RNR)) >> 12,
2164 (scb.scb_status & SCB_ST_CX) ? "cmd completion interrupt," : "",
2165 (scb.scb_status & SCB_ST_FR) ? "frame received," : "",
2166 (scb.scb_status & SCB_ST_CNA) ? "cmd unit not active," : "",
2167 (scb.scb_status & SCB_ST_RNR) ? "rcv unit not ready," : ""
2168 );
2169 printk
2170 (
2171 " cus 0x%x[%s%s%s]",
2172 (scb.scb_status & SCB_ST_CUS) >> 8,
2173 ((scb.scb_status & SCB_ST_CUS) == SCB_ST_CUS_IDLE) ? "idle" : "",
2174 ((scb.scb_status & SCB_ST_CUS) == SCB_ST_CUS_SUSP) ? "suspended" : "",
2175 ((scb.scb_status & SCB_ST_CUS) == SCB_ST_CUS_ACTV) ? "active" : ""
2176 );
2177 printk
2178 (
2179 " rus 0x%x[%s%s%s%s]",
2180 (scb.scb_status & SCB_ST_RUS) >> 4,
2181 ((scb.scb_status & SCB_ST_RUS) == SCB_ST_RUS_IDLE) ? "idle" : "",
2182 ((scb.scb_status & SCB_ST_RUS) == SCB_ST_RUS_SUSP) ? "suspended" : "",
2183 ((scb.scb_status & SCB_ST_RUS) == SCB_ST_RUS_NRES) ? "no resources" : "",
2184 ((scb.scb_status & SCB_ST_RUS) == SCB_ST_RUS_RDY) ? "ready" : ""
2185 );
2186
2187 printk(" command:");
2188 printk
2189 (
2190 " ack 0x%x[%s%s%s%s]",
2191 (scb.scb_command & (SCB_CMD_ACK_CX | SCB_CMD_ACK_FR | SCB_CMD_ACK_CNA | SCB_CMD_ACK_RNR)) >> 12,
2192 (scb.scb_command & SCB_CMD_ACK_CX) ? "ack cmd completion," : "",
2193 (scb.scb_command & SCB_CMD_ACK_FR) ? "ack frame received," : "",
2194 (scb.scb_command & SCB_CMD_ACK_CNA) ? "ack CU not active," : "",
2195 (scb.scb_command & SCB_CMD_ACK_RNR) ? "ack RU not ready," : ""
2196 );
2197 printk
2198 (
2199 " cuc 0x%x[%s%s%s%s%s]",
2200 (scb.scb_command & SCB_CMD_CUC) >> 8,
2201 ((scb.scb_command & SCB_CMD_CUC) == SCB_CMD_CUC_NOP) ? "nop" : "",
2202 ((scb.scb_command & SCB_CMD_CUC) == SCB_CMD_CUC_GO) ? "start cbl_offset" : "",
2203 ((scb.scb_command & SCB_CMD_CUC) == SCB_CMD_CUC_RES) ? "resume execution" : "",
2204 ((scb.scb_command & SCB_CMD_CUC) == SCB_CMD_CUC_SUS) ? "suspend execution" : "",
2205 ((scb.scb_command & SCB_CMD_CUC) == SCB_CMD_CUC_ABT) ? "abort execution" : ""
2206 );
2207 printk
2208 (
2209 " ruc 0x%x[%s%s%s%s%s]",
2210 (scb.scb_command & SCB_CMD_RUC) >> 4,
2211 ((scb.scb_command & SCB_CMD_RUC) == SCB_CMD_RUC_NOP) ? "nop" : "",
2212 ((scb.scb_command & SCB_CMD_RUC) == SCB_CMD_RUC_GO) ? "start rfa_offset" : "",
2213 ((scb.scb_command & SCB_CMD_RUC) == SCB_CMD_RUC_RES) ? "resume reception" : "",
2214 ((scb.scb_command & SCB_CMD_RUC) == SCB_CMD_RUC_SUS) ? "suspend reception" : "",
2215 ((scb.scb_command & SCB_CMD_RUC) == SCB_CMD_RUC_ABT) ? "abort reception" : ""
2216 );
2217
2218 printk(" cbl_offset 0x%x", scb.scb_cbl_offset);
2219 printk(" rfa_offset 0x%x", scb.scb_rfa_offset);
2220
2221 printk(" crcerrs %d", scb.scb_crcerrs);
2222 printk(" alnerrs %d", scb.scb_alnerrs);
2223 printk(" rscerrs %d", scb.scb_rscerrs);
2224 printk(" ovrnerrs %d", scb.scb_ovrnerrs);
2225
2226 printk("\n");
2227 }
2228
2229 static
2230 void
2231 wavelan_ru_show(device *dev)
2232 {
2233 net_local *lp;
2234
2235 lp = (net_local *)dev->priv;
2236
2237 printk("ru:");
2238
2239
2240
2241 printk("\n");
2242 }
2243
2244 static
2245 void
2246 wavelan_cu_show(device *dev)
2247 {
2248 net_local *lp;
2249 unsigned int i;
2250 unsigned short p;
2251
2252 lp = (net_local *)dev->priv;
2253
2254 printk("cu:");
2255 printk("\n");
2256
2257 for (i = 0, p = lp->tx_first_in_use; i < NTXBLOCKS; i++)
2258 {
2259 wavelan_cu_show_one(dev, lp, i, p);
2260
2261 p += TXBLOCKZ;
2262 if (p >= OFFSET_CU + NTXBLOCKS * TXBLOCKZ)
2263 p -= NTXBLOCKS * TXBLOCKZ;
2264 }
2265 }
2266
2267 static
2268 void
2269 wavelan_dev_show(device *dev)
2270 {
2271 printk("dev:");
2272 printk(" start=%d,", dev->start);
2273 printk(" tbusy=%d,", dev->tbusy);
2274 printk(" interrupt=%d,", dev->interrupt);
2275 printk(" trans_start=%ld,", dev->trans_start);
2276 printk(" flags=0x%x,", dev->flags);
2277 printk("\n");
2278 }
2279
2280 static
2281 void
2282 wavelan_local_show(device *dev)
2283 {
2284 net_local *lp;
2285
2286 lp = (net_local *)dev->priv;
2287
2288 printk("local:");
2289 printk(" tx_n_in_use=%d,", lp->tx_n_in_use);
2290 printk(" hacr=0x%x,", lp->hacr);
2291 printk(" rx_head=0x%x,", lp->rx_head);
2292 printk(" rx_last=0x%x,", lp->rx_last);
2293 printk(" tx_first_free=0x%x,", lp->tx_first_free);
2294 printk(" tx_first_in_use=0x%x,", lp->tx_first_in_use);
2295 printk("\n");
2296 }
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2338 #endif