taglinefilesource code
iobase200drivers/net/3c509.cunsigned short iobase = id_read_eeprom(8);
iobase201drivers/net/3c509.cif_port = iobase >> 14;
iobase202drivers/net/3c509.cioaddr = 0x200 + ((iobase & 0x1f) << 4);
iobase333drivers/net/de4x5.cstatic int  de4x5_hw_init(struct device *dev, short iobase);
iobase344drivers/net/de4x5.cstatic void EISA_signature(char * name, short iobase);
iobase345drivers/net/de4x5.cstatic int  DevicePresent(short iobase);
iobase350drivers/net/de4x5.cstatic void eisa_probe(struct device *dev, short iobase);
iobase351drivers/net/de4x5.cstatic void pci_probe(struct device *dev, short iobase);
iobase352drivers/net/de4x5.cstatic struct device *alloc_device(struct device *dev, int iobase);
iobase392drivers/net/de4x5.cint tmp = num_de4x5s, iobase = dev->base_addr;
iobase395drivers/net/de4x5.cif ((iobase == 0) && loading_module){
iobase400drivers/net/de4x5.ceisa_probe(dev, iobase);
iobase401drivers/net/de4x5.cpci_probe(dev, iobase);
iobase403drivers/net/de4x5.cif ((tmp == num_de4x5s) && (iobase != 0)) {
iobase405drivers/net/de4x5.ciobase);
iobase415drivers/net/de4x5.cif (iobase == 0) autoprobed = 1;
iobase422drivers/net/de4x5.cde4x5_hw_init(struct device *dev, short iobase)
iobase446drivers/net/de4x5.cdev->base_addr = iobase;
iobase447drivers/net/de4x5.crequest_region(iobase, (lp->bus == PCI ? DE4X5_PCI_TOTAL_SIZE :
iobase452drivers/net/de4x5.cdev->name, name, (u_short)iobase, (((u_short)iobase>>12)&0x0f));
iobase454drivers/net/de4x5.cprintk("%s: %s at %#3x (PCI device %d)", dev->name, name, (u_short)iobase,lp->device);
iobase557drivers/net/de4x5.cif (status) release_region(iobase, (lp->bus == PCI ? 
iobase605drivers/net/de4x5.cshort iobase = dev->base_addr;
iobase712drivers/net/de4x5.cshort iobase = dev->base_addr;
iobase799drivers/net/de4x5.cint iobase = dev->base_addr;
iobase889drivers/net/de4x5.cint iobase;
iobase896drivers/net/de4x5.ciobase = dev->base_addr;
iobase1036drivers/net/de4x5.cint entry, iobase = dev->base_addr;
iobase1077drivers/net/de4x5.cint iobase = dev->base_addr;
iobase1110drivers/net/de4x5.cint iobase = dev->base_addr;
iobase1142drivers/net/de4x5.cint iobase = dev->base_addr;
iobase1229drivers/net/de4x5.cu_short iobase;
iobase1238drivers/net/de4x5.ciobase = EISA_SLOT_INC;              /* Get the first slot address */
iobase1242drivers/net/de4x5.ciobase = ioaddr;
iobase1247drivers/net/de4x5.cfor (status = -ENODEV; i<maxSlots && dev!=NULL; i++, iobase+=EISA_SLOT_INC) {
iobase1249drivers/net/de4x5.cif (check_region(iobase, DE4X5_EISA_TOTAL_SIZE) == 0) {
iobase1250drivers/net/de4x5.cif ((dev = alloc_device(dev, iobase)) != NULL) {
iobase1251drivers/net/de4x5.cif ((status = de4x5_hw_init(dev, iobase)) == 0) {
iobase1257drivers/net/de4x5.cprintk("%s: region already allocated at 0x%04x.\n", dev->name, iobase);
iobase1277drivers/net/de4x5.cu_long class, iobase;
iobase1308drivers/net/de4x5.cpcibios_read_config_dword(pb, PCI_DEVICE, PCI_BASE_ADDRESS_0, &iobase);
iobase1309drivers/net/de4x5.ciobase &= CBIO_MASK;
iobase1321drivers/net/de4x5.cif (check_region(iobase, DE4X5_PCI_TOTAL_SIZE) == 0) {
iobase1322drivers/net/de4x5.cif ((dev = alloc_device(dev, iobase)) != NULL) {
iobase1324drivers/net/de4x5.cif ((status = de4x5_hw_init(dev, iobase)) == 0) {
iobase1330drivers/net/de4x5.cprintk("%s: region already allocated at 0x%04x.\n", dev->name, (u_short)iobase);
iobase1345drivers/net/de4x5.cstatic struct device *alloc_device(struct device *dev, int iobase)
iobase1396drivers/net/de4x5.cdev->base_addr = iobase;           /* assign the io address */
iobase1460drivers/net/de4x5.cint media, entry, iobase = dev->base_addr;
iobase1658drivers/net/de4x5.cstatic void EISA_signature(char *name, short iobase)
iobase1669drivers/net/de4x5.cEisa.ID = inl(iobase);
iobase1745drivers/net/de4x5.cint iobase = dev->base_addr;
iobase1796drivers/net/de4x5.cint i, j, iobase = dev->base_addr, status = 0;
iobase16drivers/net/de4x5.h#define DE4X5_BMR    iobase+(0x000 << lp->bus)  /* Bus Mode Register */
iobase17drivers/net/de4x5.h#define DE4X5_TPD    iobase+(0x008 << lp->bus)  /* Transmit Poll Demand Reg */
iobase18drivers/net/de4x5.h#define DE4X5_RPD    iobase+(0x010 << lp->bus)  /* Receive Poll Demand Reg */
iobase19drivers/net/de4x5.h#define DE4X5_RRBA   iobase+(0x018 << lp->bus)  /* RX Ring Base Address Reg */
iobase20drivers/net/de4x5.h#define DE4X5_TRBA   iobase+(0x020 << lp->bus)  /* TX Ring Base Address Reg */
iobase21drivers/net/de4x5.h#define DE4X5_STS    iobase+(0x028 << lp->bus)  /* Status Register */
iobase22drivers/net/de4x5.h#define DE4X5_OMR    iobase+(0x030 << lp->bus)  /* Operation Mode Register */
iobase23drivers/net/de4x5.h#define DE4X5_IMR    iobase+(0x038 << lp->bus)  /* Interrupt Mask Register */
iobase24drivers/net/de4x5.h#define DE4X5_MFC    iobase+(0x040 << lp->bus)  /* Missed Frame Counter */
iobase25drivers/net/de4x5.h#define DE4X5_APROM  iobase+(0x048 << lp->bus)  /* Ethernet Address PROM */
iobase26drivers/net/de4x5.h#define DE4X5_DDR    iobase+(0x050 << lp->bus)  /* Data Diagnostic Register */
iobase27drivers/net/de4x5.h#define DE4X5_FDR    iobase+(0x058 << lp->bus)  /* Full Duplex Register */
iobase28drivers/net/de4x5.h#define DE4X5_SISR   iobase+(0x060 << lp->bus)  /* SIA Status Register */
iobase29drivers/net/de4x5.h#define DE4X5_SICR   iobase+(0x068 << lp->bus)  /* SIA Connectivity Register */
iobase30drivers/net/de4x5.h#define DE4X5_STRR   iobase+(0x070 << lp->bus)  /* SIA TX/RX Register */
iobase31drivers/net/de4x5.h#define DE4X5_SIGR   iobase+(0x078 << lp->bus)  /* SIA General Register */
iobase36drivers/net/de4x5.h#define EISA_ID      iobase+0x0c80   /* EISA ID Registers */ 
iobase37drivers/net/de4x5.h#define EISA_ID0     iobase+0x0c80   /* EISA ID Register 0 */ 
iobase38drivers/net/de4x5.h#define EISA_ID1     iobase+0x0c81   /* EISA ID Register 1 */ 
iobase39drivers/net/de4x5.h#define EISA_ID2     iobase+0x0c82   /* EISA ID Register 2 */ 
iobase40drivers/net/de4x5.h#define EISA_ID3     iobase+0x0c83   /* EISA ID Register 3 */ 
iobase41drivers/net/de4x5.h#define EISA_CR      iobase+0x0c84   /* EISA Control Register */
iobase42drivers/net/de4x5.h#define EISA_REG0    iobase+0x0c88   /* EISA Configuration Register 0 */
iobase43drivers/net/de4x5.h#define EISA_REG1    iobase+0x0c89   /* EISA Configuration Register 1 */
iobase44drivers/net/de4x5.h#define EISA_REG2    iobase+0x0c8a   /* EISA Configuration Register 2 */
iobase45drivers/net/de4x5.h#define EISA_REG3    iobase+0x0c8f   /* EISA Configuration Register 3 */
iobase46drivers/net/de4x5.h#define EISA_APROM   iobase+0x0c90   /* Ethernet Address PROM */
iobase51drivers/net/de4x5.h#define PCI_CFID     iobase+0x0008   /* PCI Configuration ID Register */
iobase52drivers/net/de4x5.h#define PCI_CFCS     iobase+0x000c   /* PCI Command/Status Register */
iobase53drivers/net/de4x5.h#define PCI_CFRV     iobase+0x0018   /* PCI Revision Register */
iobase54drivers/net/de4x5.h#define PCI_CFLT     iobase+0x001c   /* PCI Latency Timer Register */
iobase55drivers/net/de4x5.h#define PCI_CBIO     iobase+0x0028   /* PCI Base I/O Register */
iobase56drivers/net/de4x5.h#define PCI_CBMA     iobase+0x002c   /* PCI Base Memory Address Register */
iobase57drivers/net/de4x5.h#define PCI_CFIT     iobase+0x0038   /* PCI Configuration Interrupt Register */
iobase347drivers/net/depca.cstatic int  EISA_signature(short iobase);
iobase1512drivers/net/depca.cstatic int EISA_signature(short iobase)
iobase1524drivers/net/depca.cEisa.Id[i] = inb(iobase + i);
iobase302drivers/net/ewrk3.cstatic int  ewrk3_hw_init(struct device *dev, short iobase);
iobase308drivers/net/ewrk3.cstatic int  DevicePresent(short iobase);
iobase311drivers/net/ewrk3.cstatic int  Read_EEPROM(short iobase, unsigned char eaddr);
iobase312drivers/net/ewrk3.cstatic int  Write_EEPROM(short data, short iobase, unsigned char eaddr);
iobase318drivers/net/ewrk3.cstatic struct device *alloc_device(struct device *dev, int iobase);
iobase397drivers/net/ewrk3.cewrk3_hw_init(struct device *dev, short iobase)
iobase410drivers/net/ewrk3.cif (iobase > 0x400) eisa_cr = inb(EISA_CR);
iobase431drivers/net/ewrk3.ctmp.val = (short)Read_EEPROM(iobase, (i>>1));
iobase448drivers/net/ewrk3.cdev->base_addr = iobase;
iobase450drivers/net/ewrk3.cif (iobase > 0x400) {
iobase459drivers/net/ewrk3.cprintk("%s: %s at %#3x", dev->name, name, iobase);
iobase461drivers/net/ewrk3.c} else if ((iobase&0x0fff)==EWRK3_EISA_IO_PORTS) {
iobase464drivers/net/ewrk3.cdev->name, name, iobase, ((iobase>>12)&0x0f));
iobase466drivers/net/ewrk3.cprintk("%s: %s at %#3x", dev->name, name, iobase);
iobase480drivers/net/ewrk3.cDevicePresent(iobase);          /* needed after the EWRK3_INIT */
iobase651drivers/net/ewrk3.cint i, iobase = dev->base_addr;
iobase729drivers/net/ewrk3.cshort iobase = dev->base_addr;
iobase763drivers/net/ewrk3.cint iobase = dev->base_addr;
iobase913drivers/net/ewrk3.cint iobase;
iobase920drivers/net/ewrk3.ciobase = dev->base_addr;
iobase977drivers/net/ewrk3.cint i, iobase = dev->base_addr;
iobase1120drivers/net/ewrk3.cint iobase = dev->base_addr;
iobase1155drivers/net/ewrk3.cint iobase = dev->base_addr;
iobase1217drivers/net/ewrk3.cint iobase = dev->base_addr;
iobase1252drivers/net/ewrk3.cint i, iobase = dev->base_addr;
iobase1334drivers/net/ewrk3.cint i, iobase, status;
iobase1337drivers/net/ewrk3.cfor (status = -ENODEV, iobase = EWRK3_IO_BASE,i = 0; 
iobase1339drivers/net/ewrk3.ciobase += EWRK3_IOP_INC, i++) {
iobase1342drivers/net/ewrk3.cif (!check_region(iobase, EWRK3_TOTAL_SIZE)) {    
iobase1343drivers/net/ewrk3.cif (DevicePresent(iobase) == 0) {
iobase1348drivers/net/ewrk3.crequest_region(iobase, EWRK3_IOP_INC, "ewrk3");
iobase1350drivers/net/ewrk3.cdev = alloc_device(dev, iobase);
iobase1352drivers/net/ewrk3.cif ((status = ewrk3_hw_init(dev, iobase)) == 0) {
iobase1358drivers/net/ewrk3.cmem_chkd &= ~(0x01 << ((iobase - EWRK3_IO_BASE)/EWRK3_IOP_INC));
iobase1361drivers/net/ewrk3.cprintk("%s: ewrk3_probe(): Detected a device already registered at 0x%02x\n", dev->name, iobase);
iobase1362drivers/net/ewrk3.cmem_chkd &= ~(0x01 << ((iobase - EWRK3_IO_BASE)/EWRK3_IOP_INC));
iobase1377drivers/net/ewrk3.cint i, iobase = EWRK3_EISA_IO_PORTS;
iobase1380drivers/net/ewrk3.ciobase+=EISA_SLOT_INC;            /* get the first slot address */
iobase1381drivers/net/ewrk3.cfor (status = -ENODEV, i=1; i<MAX_EISA_SLOTS; i++, iobase+=EISA_SLOT_INC) {
iobase1384drivers/net/ewrk3.cif (!check_region(iobase, EWRK3_TOTAL_SIZE)) {
iobase1385drivers/net/ewrk3.cif (DevicePresent(iobase) == 0) {
iobase1391drivers/net/ewrk3.crequest_region(iobase, EWRK3_IOP_INC, "ewrk3");
iobase1393drivers/net/ewrk3.cdev = alloc_device(dev, iobase);
iobase1395drivers/net/ewrk3.cif ((status = ewrk3_hw_init(dev, iobase)) == 0) {
iobase1410drivers/net/ewrk3.cstatic struct device *alloc_device(struct device *dev, int iobase)
iobase1444drivers/net/ewrk3.cdev->base_addr = iobase;            /* assign the io address */
iobase1457drivers/net/ewrk3.cstatic int Read_EEPROM(short iobase, unsigned char eaddr)
iobase1471drivers/net/ewrk3.cstatic int Write_EEPROM(short data, short iobase, unsigned char eaddr)
iobase1520drivers/net/ewrk3.cstatic int DevicePresent(short iobase)
iobase1579drivers/net/ewrk3.cint iobase = dev->base_addr;
iobase1613drivers/net/ewrk3.cint i, j, iobase = dev->base_addr, status = 0;
iobase1754drivers/net/ewrk3.ctmp.val[i] = (short)Read_EEPROM(iobase, i);
iobase1772drivers/net/ewrk3.cWrite_EEPROM(tmp.val[i], iobase, i);
iobase18drivers/net/ewrk3.h#define EWRK3_CSR    iobase+0x00   /* Control and Status Register */
iobase19drivers/net/ewrk3.h#define EWRK3_CR     iobase+0x01   /* Control Register */
iobase20drivers/net/ewrk3.h#define EWRK3_ICR    iobase+0x02   /* Interrupt Control Register */
iobase21drivers/net/ewrk3.h#define EWRK3_TSR    iobase+0x03   /* Transmit Status Register */
iobase22drivers/net/ewrk3.h#define EWRK3_RSVD1  iobase+0x04   /* RESERVED */
iobase23drivers/net/ewrk3.h#define EWRK3_RSVD2  iobase+0x05   /* RESERVED */
iobase24drivers/net/ewrk3.h#define EWRK3_FMQ    iobase+0x06   /* Free Memory Queue */
iobase25drivers/net/ewrk3.h#define EWRK3_FMQC   iobase+0x07   /* Free Memory Queue Counter */
iobase26drivers/net/ewrk3.h#define EWRK3_RQ     iobase+0x08   /* Receive Queue */
iobase27drivers/net/ewrk3.h#define EWRK3_RQC    iobase+0x09   /* Receive Queue Counter */
iobase28drivers/net/ewrk3.h#define EWRK3_TQ     iobase+0x0a   /* Transmit Queue */
iobase29drivers/net/ewrk3.h#define EWRK3_TQC    iobase+0x0b   /* Transmit Queue Counter */
iobase30drivers/net/ewrk3.h#define EWRK3_TDQ    iobase+0x0c   /* Transmit Done Queue */
iobase31drivers/net/ewrk3.h#define EWRK3_TDQC   iobase+0x0d   /* Transmit Done Queue Counter */
iobase32drivers/net/ewrk3.h#define EWRK3_PIR1   iobase+0x0e   /* Page Index Register 1 */
iobase33drivers/net/ewrk3.h#define EWRK3_PIR2   iobase+0x0f   /* Page Index Register 2 */
iobase34drivers/net/ewrk3.h#define EWRK3_DATA   iobase+0x10   /* Data Register */
iobase35drivers/net/ewrk3.h#define EWRK3_IOPR   iobase+0x11   /* I/O Page Register */
iobase36drivers/net/ewrk3.h#define EWRK3_IOBR   iobase+0x12   /* I/O Base Register */
iobase37drivers/net/ewrk3.h#define EWRK3_MPR    iobase+0x13   /* Memory Page Register */
iobase38drivers/net/ewrk3.h#define EWRK3_MBR    iobase+0x14   /* Memory Base Register */
iobase39drivers/net/ewrk3.h#define EWRK3_APROM  iobase+0x15   /* Address PROM */
iobase40drivers/net/ewrk3.h#define EWRK3_EPROM1 iobase+0x16   /* EEPROM Data Register 1 */
iobase41drivers/net/ewrk3.h#define EWRK3_EPROM2 iobase+0x17   /* EEPROM Data Register 2 */
iobase42drivers/net/ewrk3.h#define EWRK3_PAR0   iobase+0x18   /* Physical Address Register 0 */
iobase43drivers/net/ewrk3.h#define EWRK3_PAR1   iobase+0x19   /* Physical Address Register 1 */
iobase44drivers/net/ewrk3.h#define EWRK3_PAR2   iobase+0x1a   /* Physical Address Register 2 */
iobase45drivers/net/ewrk3.h#define EWRK3_PAR3   iobase+0x1b   /* Physical Address Register 3 */
iobase46drivers/net/ewrk3.h#define EWRK3_PAR4   iobase+0x1c   /* Physical Address Register 4 */
iobase47drivers/net/ewrk3.h#define EWRK3_PAR5   iobase+0x1d   /* Physical Address Register 5 */
iobase48drivers/net/ewrk3.h#define EWRK3_CMR    iobase+0x1e   /* Configuration/Management Register */
iobase175drivers/net/ewrk3.h#define EISA_ID0      iobase + 0x0c80  /* EISA ID Register 0 */ 
iobase176drivers/net/ewrk3.h#define EISA_ID1      iobase + 0x0c81  /* EISA ID Register 1 */ 
iobase177drivers/net/ewrk3.h#define EISA_ID2      iobase + 0x0c82  /* EISA ID Register 2 */ 
iobase178drivers/net/ewrk3.h#define EISA_ID3      iobase + 0x0c83  /* EISA ID Register 3 */ 
iobase179drivers/net/ewrk3.h#define EISA_CR       iobase + 0x0c84  /* EISA Control Register */
iobase712drivers/net/wavelan.cstatic unsigned short  iobase[]  =
iobase746drivers/net/wavelan.cfor (i = 0; i < nels(iobase); i++)
iobase748drivers/net/wavelan.cif (check_region(iobase[i], sizeof(ha_t)))
iobase751drivers/net/wavelan.cif (wavelan_probe1(dev, iobase[i]) == 0)
iobase311drivers/scsi/eata.cstatic inline unchar wait_on_busy(ushort iobase) {
iobase314drivers/scsi/eata.cwhile (inb(iobase + REG_AUX_STATUS) & ABSY_ASSERTED)
iobase320drivers/scsi/eata.cstatic inline unchar do_dma (ushort iobase, unsigned int addr, unchar cmd) {
iobase322drivers/scsi/eata.cif (wait_on_busy(iobase)) return TRUE;
iobase325drivers/scsi/eata.coutb((char)  addr,        iobase + REG_LOW);
iobase326drivers/scsi/eata.coutb((char) (addr >> 8),  iobase + REG_LM);
iobase327drivers/scsi/eata.coutb((char) (addr >> 16), iobase + REG_MID);
iobase328drivers/scsi/eata.coutb((char) (addr >> 24), iobase + REG_MSB);
iobase331drivers/scsi/eata.coutb(cmd, iobase + REG_CMD);
iobase335drivers/scsi/eata.cstatic inline unchar read_pio (ushort iobase, ushort *start, ushort *end) {
iobase341drivers/scsi/eata.cwhile (!(inb(iobase + REG_STATUS) & DRQ_ASSERTED)) 
iobase345drivers/scsi/eata.c*p = inw(iobase);
iobase271drivers/scsi/u14-34f.cstatic inline unchar wait_on_busy(ushort iobase) {
iobase274drivers/scsi/u14-34f.cwhile (inb(iobase + REG_LCL_INTR) & BSY_ASSERTED)
iobase160drivers/scsi/wd7000.cint iobase;                       /* This adapter's I/O base address */
iobase185drivers/scsi/wd7000.cint iobase;                   /* I/O ports base address */
iobase532drivers/scsi/wd7000.coutb(host->control, host->iobase+ASC_CONTROL);
iobase539drivers/scsi/wd7000.coutb(host->control,host->iobase+ASC_CONTROL);
iobase569drivers/scsi/wd7000.cWAIT(host->iobase+ASC_STAT,ASC_STATMASK,CMD_RDY,0);
iobase572drivers/scsi/wd7000.coutb(*cmd, host->iobase+ASC_COMMAND);
iobase573drivers/scsi/wd7000.cWAIT(host->iobase+ASC_STAT, ASC_STATMASK, CMD_RDY, 0);
iobase574drivers/scsi/wd7000.c}  while (inb(host->iobase+ASC_STAT) & CMD_REJ);
iobase798drivers/scsi/wd7000.c#define wd7000_intr_ack(host)  outb(0,host->iobase+ASC_INTR_ACK)
iobase814drivers/scsi/wd7000.cflag = inb(host->iobase+ASC_INTR_STAT);
iobase819drivers/scsi/wd7000.cif (!(inb(host->iobase+ASC_STAT) & INT_IM))  {
iobase994drivers/scsi/wd7000.coutb(ASC_RES, host->iobase+ASC_CONTROL);
iobase996drivers/scsi/wd7000.coutb(0,host->iobase+ASC_CONTROL);
iobase998drivers/scsi/wd7000.cWAIT(host->iobase+ASC_STAT, ASC_STATMASK, CMD_RDY, 0);
iobase1000drivers/scsi/wd7000.cif ((diag = inb(host->iobase+ASC_INTR_STAT)) != 1)  {
iobase1037drivers/scsi/wd7000.cWAIT(host->iobase+ASC_STAT, ASC_STATMASK, ASC_INIT, 0);
iobase1119drivers/scsi/wd7000.cif (check_region(cfg->iobase, 4))  {  /* ports in use */
iobase1120drivers/scsi/wd7000.cprintk("IO %xh already in use.\n", host->iobase);
iobase1139drivers/scsi/wd7000.chost->iobase = cfg->iobase;
iobase1156drivers/scsi/wd7000.chost->iobase, host->irq, host->dma);
iobase1158drivers/scsi/wd7000.crequest_region(host->iobase, 4,"wd7000"); /* Register our ports */
iobase1183drivers/scsi/wd7000.cif (inb(host->iobase+ASC_STAT) & INT_IM)  {