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1 /********************************************************
2 * Header file for eata_dma.c Linux EATA-DMA SCSI driver *
3 * (c) 1993,94,95 Michael Neuffer *
4 *********************************************************
5 * last change: 95/02/13 *
6 ********************************************************/
7
8
9 #ifndef _EATA_DMA_H
10 #define _EATA_DMA_H
11
12 #define VER_MAJOR 2
13 #define VER_MINOR 3
14 #define VER_SUB "1a"
15
16 /************************************************************************
17 * Here you can configure your drives that are using a non-standard *
18 * geometry. *
19 * To enable this set HARDCODED to 1 *
20 * If you have only one drive that need reconfiguration, set ID1 to -1 *
21 ************************************************************************/
22 #define HARDCODED 0 /* Here are drives running in emu. mode */
23
24 #define ID0 0 /* SCSI ID of "IDE" drive mapped to C:
25 * If you're not sure check your config
26 * utility that came with your controller
27 */
28 #define HEADS0 13 /* Number of emulated heads of this drive */
29 #define SECTORS0 38 /* Number of emulated sectors */
30 #define CYLINDER0 719 /* Number of emulated cylinders */
31
32 #define ID1 1 /* SCSI ID of "IDE" drive mapped to D: */
33 #define HEADS1 16 /* Number of emulated heads of this drive */
34 #define SECTORS1 62 /* Number of emulated sectors */
35 #define CYLINDER1 1024 /* Number of emulated cylinders */
36
37 /************************************************************************
38 * Here you can switch parts of the code on and of *
39 ************************************************************************/
40
41 #define CHECKPAL 0 /* EISA pal checking on/off */
42 #define EATA_DMA_PROC 0 /* proc-fs support */
43
44 /************************************************************************
45 * Debug options. *
46 * Enable DEBUG and whichever options you require. *
47 ************************************************************************/
48 #define DEBUG_EATA 1 /* Enable debug code. */
49 #define DPT_DEBUG 0 /* Bobs special */
50 #define DBG_DELAY 0 /* Build in delays so debug messages can be
51 * be read before they vanish of the top of
52 * the screen!
53 */
54 #define DBG_PROBE 0 /* Debug probe routines. */
55 #define DBG_PCI 0 /* Trace PCI routines */
56 #define DBG_EISA 0 /* Trace EISA routines */
57 #define DBG_ISA 0 /* Trace ISA routines */
58 #define DBG_BLINK 0 /* Trace Blink check */
59 #define DBG_PIO 0 /* Trace get_config_PIO */
60 #define DBG_COM 0 /* Trace command call */
61 #define DBG_QUEUE 0 /* Trace command queueing. */
62 #define DBG_INTR 0 /* Trace interrupt service routine. */
63 #define DBG_INTR2 0 /* Trace interrupt service routine. */
64 #define DBG_PROC 0 /* Debug proc-fs related statistics */
65 #define DBG_REGISTER 0 /* */
66 #define DBG_ABNORM 1 /* Debug abnormal actions (reset, abort)*/
67
68 #if DEBUG_EATA
69 #define DBG(x, y) if ((x)) {y;}
70 #else
71 #define DBG(x, y)
72 #endif
73
74
75 #define EATA_DMA { \
76 NULL, NULL, \
77 "EATA (Extended Attachment) driver", \
78 eata_detect, \
79 eata_release, \
80 eata_info, \
81 eata_command, \
82 eata_queue, \
83 eata_abort, \
84 eata_reset, \
85 NULL, /* Slave attach */ \
86 scsicam_bios_param, \
87 0, /* Canqueue */ \
88 0, /* this_id */ \
89 0, /* sg_tablesize */ \
90 0, /* cmd_per_lun */ \
91 0, /* present */ \
92 1, /* True if ISA */ \
93 ENABLE_CLUSTERING }
94
95 int eata_detect(Scsi_Host_Template *);
96 const char *eata_info(struct Scsi_Host *);
97 int eata_command(Scsi_Cmnd *);
98 int eata_queue(Scsi_Cmnd *, void *(done)(Scsi_Cmnd *));
99 int eata_abort(Scsi_Cmnd *);
100 int eata_reset(Scsi_Cmnd *);
101 int eata_release(struct Scsi_Host *);
102
103 /*********************************************
104 * Misc. definitions *
105 *********************************************/
106
107 #ifndef TRUE
108 # define TRUE 1
109 #endif
110 #ifndef FALSE
111 # define FALSE 0
112 #endif
113
114 #define R_LIMIT 0x20000
115
116 #define MAXISA 4
117 #define MAXEISA 16
118 #define MAXPCI 16
119 #define MAXIRQ 16
120 #define MAXTARGET 8
121
122 #define MAX_PCI_DEVICES 32 /* Maximum # Of Devices Per Bus */
123 #define MAX_METHOD_2 16 /* Max Devices For Method 2 */
124 #define MAX_PCI_BUS 16 /* Maximum # Of Busses Allowed */
125
126 #define SG_SIZE 64
127
128 #define C_P_L_CURRENT_MAX 10 /* Until this limit in the mm is removed
129 * Kernels < 1.1.86 died horrible deaths
130 * if you used values >2. The memory management
131 * since pl1.1.86 seems to cope with up to 10
132 * queued commands per device.
133 */
134 #define C_P_L_DIV 4 /* 1 <= C_P_L_DIV <= 8
135 * You can use this parameter to fine-tune
136 * the driver. Depending on the number of
137 * devices and their speed and ability to queue
138 * commands, you will get the best results with a
139 * value
140 * ~= numdevices-(devices_unable_to_queue_commands/2)
141 * The reason for this is that the disk driver
142 * tends to flood the queue, so that other
143 * drivers have problems to queue commands
144 * themselves. This can for example result in
145 * the effect that the tape stops during disk
146 * accesses.
147 */
148
149 #define FREE 0
150 #define USED 1
151 #define TIMEOUT 2
152 #define RESET 4
153 #define LOCKED 8
154
155 #define HD(cmd) ((hostdata *)&(cmd->host->hostdata))
156 #define CD(cmd) ((struct eata_ccb *)(cmd->host_scribble))
157 #define SD(host) ((hostdata *)&(host->hostdata))
158
159 #define DELAY(x) { int i; i = jiffies + x; while (jiffies < i); }
160 #define DEL2(x) { ulong i; for (i = 0; i < 0xffff*x; i++); }
161
162 /***********************************************
163 * EATA Command & Register definitions *
164 ***********************************************/
165 #define PCI_REG_DPTconfig 0x40
166 #define PCI_REG_PumpModeAddress 0x44
167 #define PCI_REG_PumpModeData 0x48
168 #define PCI_REG_ConfigParam1 0x50
169 #define PCI_REG_ConfigParam2 0x54
170
171
172 #define EATA_CMD_PIO_READ_CONFIG 0xf0
173 #define EATA_CMD_PIO_SET_CONFIG 0xf1
174 #define EATA_CMD_PIO_SEND_CP 0xf2
175 #define EATA_CMD_PIO_RECEIVE_SP 0xf3
176 #define EATA_CMD_PIO_TRUNC 0xf4
177
178 #define EATA_CMD_RESET 0xf9
179
180 #define EATA_CMD_DMA_READ_CONFIG 0xfd
181 #define EATA_CMD_DMA_SET_CONFIG 0xfe
182 #define EATA_CMD_DMA_SEND_CP 0xff
183
184 #define ECS_EMULATE_SENSE 0xd4
185
186 #define HA_WCOMMAND 0x07 /* command register offset */
187 #define HA_WDMAADDR 0x02 /* DMA address LSB offset */
188 #define HA_RAUXSTAT 0x08 /* aux status register offset*/
189 #define HA_RSTATUS 0x07 /* status register offset */
190 #define HA_RDATA 0x00 /* data register (16bit) */
191
192 #define HA_ABUSY 0x01 /* aux busy bit */
193 #define HA_AIRQ 0x02 /* aux IRQ pending bit */
194 #define HA_SERROR 0x01 /* pr. command ended in error*/
195 #define HA_SMORE 0x02 /* more data soon to come */
196 #define HA_SCORR 0x04 /* data corrected */
197 #define HA_SDRQ 0x08 /* data request active */
198 #define HA_SSC 0x10 /* seek complete */
199 #define HA_SFAULT 0x20 /* write fault */
200 #define HA_SREADY 0x40 /* drive ready */
201 #define HA_SBUSY 0x80 /* drive busy */
202 #define HA_SDRDY HA_SSC+HA_SREADY+HA_SDRQ
203
204 /**********************************************
205 * Message definitions *
206 **********************************************/
207
208 struct reg_bit { /* reading this one will clear the interrupt */
209 unchar error:1; /* previous command ended in an error */
210 unchar more:1; /* more DATA coming soon, poll BSY & DRQ (PIO) */
211 unchar corr:1; /* data read was successfully corrected with ECC*/
212 unchar drq:1; /* data request active */
213 unchar sc:1; /* seek complete */
214 unchar fault:1; /* write fault */
215 unchar ready:1; /* drive ready */
216 unchar busy:1; /* controller busy */
217 };
218
219 struct reg_abit { /* reading this won't clear the interrupt */
220 unchar abusy:1; /* auxiliary busy */
221 unchar irq:1; /* set when drive interrupt is asserted */
222 unchar dummy:6;
223 };
224
225 struct eata_register { /* EATA register set */
226 unchar data_reg[2]; /* R, couldn't figure this one out */
227 unchar cp_addr[4]; /* W, CP address register */
228 union {
229 unchar command; /* W, command code: [read|set] conf, send CP*/
230 struct reg_bit status; /* R, see register_bit1 */
231 unchar statusunchar;
232 } ovr;
233 struct reg_abit aux_stat; /* R, see register_bit2 */
234 };
235
236 /**********************************************
237 * Other definitions *
238 **********************************************/
239
240 struct eata_sg_list
241 {
242 ulong data;
243 ulong len;
244 };
245
246 struct get_conf { /* Read Configuration Array */
247 ulong len; /* Should return 0x22 */
248 unchar sig[4]; /* Signature MUST be "EATA" */
249 unchar version2:4,
250 version:4; /* EATA Version level */
251 unchar OCS_enabled:1, /* Overlap Command Support enabled */
252 TAR_support:1, /* SCSI Target Mode supported */
253 TRNXFR:1, /* Truncate Transfer Cmd not necessary */
254 /* Only used in PIO Mode */
255 MORE_support:1, /* MORE supported (only PIO Mode) */
256 DMA_support:1, /* DMA supported Driver uses only */
257 /* this mode */
258 DMA_valid:1, /* DRQ value in Byte 30 is valid */
259 ATA:1, /* ATA device connected (not supported) */
260 HAA_valid:1; /* Hostadapter Address is valid */
261
262 ushort cppadlen; /* Number of pad unchars send after CD data */
263 /* set to zero for DMA commands */
264 unchar scsi_id[4]; /* SCSI ID of controller 2-0 Byte 0 res. */
265 /* if not, zero is returned */
266 ulong cplen; /* CP length: number of valid cp unchars */
267 ulong splen; /* Number of unchars returned after */
268 /* Receive SP command */
269 ushort queuesiz; /* max number of queueable CPs */
270 ushort dummy;
271 ushort SGsiz; /* max number of SG table entries */
272 unchar IRQ:4, /* IRQ used this HA */
273 IRQ_TR:1, /* IRQ Trigger: 0=edge, 1=level */
274 SECOND:1, /* This is a secondary controller */
275 DMA_channel:2; /* DRQ index, DRQ is 2comp of DRQX */
276 unchar sync; /* device at ID 7 tru 0 is running in */
277 /* synchronous mode, this will disappear */
278 unchar DSBLE:1, /* ISA i/o addressing is disabled */
279 FORCADR:1, /* i/o address has been forced */
280 :6;
281 unchar MAX_ID:5, /* Max number of SCSI target IDs */
282 MAX_CHAN:3; /* Number of SCSI busses on HBA */
283 unchar MAX_LUN; /* Max number of LUNs */
284 unchar :5,
285 ID_qest:1, /* Raidnum ID is questionable */
286 is_PCI:1, /* HBA is PCI */
287 is_EISA:1; /* HBA is EISA */
288 unchar unused[478];
289 };
290
291 struct eata_ccb { /* Send Command Packet structure */
292
293 unchar SCSI_Reset:1, /* Cause a SCSI Bus reset on the cmd */
294 HBA_Init:1, /* Cause Controller to reinitialize */
295 Auto_Req_Sen:1, /* Do Auto Request Sense on errors */
296 scatter:1, /* Data Ptr points to a SG Packet */
297 Resrvd:1, /* RFU */
298 Interpret:1, /* Interpret the SCSI cdb of own use */
299 DataOut:1, /* Data Out phase with command */
300 DataIn:1; /* Data In phase with command */
301 unchar reqlen; /* Request Sense Length */
302 /* Valid if Auto_Req_Sen=1 */
303 unchar unused[3];
304 unchar FWNEST:1, /* send cmd to phys RAID component*/
305 unused2:7;
306 unchar Phsunit:1, /* physical unit on mirrored pair */
307 I_AT:1, /* inhibit address translation */
308 I_HBA_C:1, /* HBA Inhibit caching */
309 unused3:5;
310
311 unchar cp_id; /* SCSI Device ID of target */
312 unchar cp_lun:3,
313 :2,
314 cp_luntar:1, /* CP is for target ROUTINE */
315 cp_dispri:1, /* Grant disconnect privilege */
316 cp_identify:1; /* Always TRUE */
317 unchar cp_msg1; /* Message bytes 0-3 */
318 unchar cp_msg2;
319 unchar cp_msg3;
320 unchar cp_cdb[12]; /* Command Descriptor Block */
321 ulong cp_datalen; /* Data Transfer Length */
322 /* If scatter=1 len of sg package */
323 void *cp_viraddr; /* address of this ccb */
324 ulong cp_dataDMA; /* Data Address, if scatter=1 */
325 /* address of scatter packet */
326 ulong cp_statDMA; /* address for Status Packet */
327 ulong cp_reqDMA; /* Request Sense Address, used if */
328 /* CP command ends with error */
329
330 ulong timeout;
331 unchar retries;
332 unchar status; /* status of this queueslot */
333 struct eata_sg_list sg_list[SG_SIZE];
334 Scsi_Cmnd *cmd; /* address of cmd */
335 };
336
337
338 struct eata_sp {
339 unchar hba_stat:7, /* HBA status */
340 EOC:1; /* True if command finished */
341 unchar scsi_stat; /* Target SCSI status */
342 unchar reserved[2];
343 ulong residue_len; /* Number of unchars not transferred */
344 struct eata_ccb *ccb; /* Address set in COMMAND PACKET */
345 unchar msg[12];
346 };
347
348 typedef struct hstd {
349 char vendor[9];
350 char name[18];
351 char revision[6];
352 char EATA_revision;
353 unchar bustype; /* bustype of HBA */
354 unchar channel; /* no. of scsi channel */
355 unchar state; /* state of HBA */
356 unchar primary; /* true if primary */
357 ulong reads[13];
358 ulong writes[13];
359 unchar t_state[MAXTARGET]; /* state of Target (RESET,..) */
360 uint t_timeout[MAXTARGET]; /* timeouts on target */
361 uint last_ccb; /* Last used ccb */
362 struct Scsi_Host *next;
363 struct Scsi_Host *prev;
364 struct eata_sp sp; /* status packet */
365 struct eata_ccb ccb[0]; /* ccb array begins here */
366 }hostdata;
367
368
369
370 /* structure for max. 2 emulated drives */
371 struct drive_geom_emul {
372 unchar trans; /* translation flag 1=transl */
373 unchar channel; /* SCSI channel number */
374 unchar HBA; /* HBA number (prim/sec) */
375 unchar id; /* drive id */
376 unchar lun; /* drive lun */
377 uint heads; /* number of heads */
378 uint sectors; /* number of sectors */
379 uint cylinder; /* number of cylinders */
380 };
381
382 struct geom_emul {
383 int bios_drives; /* number of emulated drives */
384 struct drive_geom_emul drv[2]; /* drive structures */
385 };
386
387 #endif /* _EATA_H */
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*/