root/include/asm-sparc/vac-ops.h

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INCLUDED FROM


DEFINITIONS

This source file includes following definitions.
  1. enable_vac
  2. disable_vac
  3. hw_flush_vac_context_entry
  4. sw_flush_vac_context_entry
  5. hw_flush_vac_segment_entry
  6. sw_flush_vac_segment_entry
  7. hw_flush_vac_page_entry
  8. sw_flush_vac_page_entry

   1 #ifndef _SPARC_VAC_OPS_H
   2 #define _SPARC_VAC_OPS_H
   3 
   4 /* vac-ops.h: Inline assembly routines to do operations on the Sparc
   5               VAC (virtual address cache).
   6 
   7    Copyright (C) 1994, David S. Miller (davem@caip.rutgers.edu)
   8 */
   9 
  10 extern unsigned long *trapbase;
  11 extern char end, etext, msgbuf;
  12 
  13 extern void flush_vac_context(void);
  14 extern void flush_vac_segment(unsigned int foo_segment);
  15 extern void flush_vac_page(unsigned int foo_addr);
  16 
  17 extern int vac_do_hw_vac_flushes, vac_size, vac_linesize;
  18 extern int vac_entries_per_context, vac_entries_per_segment;
  19 extern int vac_entries_per_page;
  20 
  21 /* enable_vac() enables the virtual address cache. It returns 0 on
  22    success, 1 on failure.
  23 */
  24 
  25 extern __inline__ int enable_vac(void)
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  26 {
  27   int success=0;
  28 
  29   __asm__ __volatile__("lduba [%1] 2, %0\n\t"
  30                        "or    %0, 0x10, %0\n\t"
  31                        "stba  %0, [%1] 2\n\t"
  32                        "or    %%g0, %%g0, %0" :
  33                        "=r" (success) :
  34                        "r" ((unsigned int) 0x40000000),
  35                        "0" (success));
  36   return success;
  37 }
  38 
  39 /* disable_vac() disables the virtual address cache. It returns 0 on
  40    success, 1 on failure.
  41 */
  42 
  43 extern __inline__ int disable_vac(void)
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  44 {
  45   int success=0;
  46 
  47   __asm__ __volatile__("lduba [%1] 0x2, %0\n\t"
  48                         "xor   %0, 0x10, %0\n\t"
  49                         "stba  %0, [%1] 0x2\n\t"
  50                         "or    %%g0, %%g0, %0" : 
  51                        "=r" (success) : 
  52                        "r" (0x40000000),
  53                        "0" (success));
  54   return success;
  55 }
  56 
  57 /* Various one-shot VAC entry flushes on the Sparc */
  58 
  59 extern __inline__ void hw_flush_vac_context_entry(char* addr)
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  60 {
  61   __asm__ __volatile__("sta %%g0, [%0] 0x7" : : "r" (addr));
  62 }
  63 
  64 extern __inline__ void sw_flush_vac_context_entry(char* addr)
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  65 {
  66   __asm__ __volatile__("sta %%g0, [%0] 0xe" : : "r" (addr));
  67 }
  68 
  69 extern __inline__ void hw_flush_vac_segment_entry(char* addr)
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  70 {
  71   __asm__ __volatile__("sta %%g0, [%0] 0x5" : : "r" (addr));
  72 }
  73 
  74 extern __inline__ void sw_flush_vac_segment_entry(char* addr)
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  75 {
  76   __asm__ __volatile__("sta %%g0, [%0] 0xc" : : "r" (addr));
  77 }
  78 
  79 extern __inline__ void hw_flush_vac_page_entry(unsigned long* addr)
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  80 {
  81   __asm__ __volatile__("sta %%g0, [%0] 0x6" : : "r" (addr));
  82 }
  83 
  84 extern __inline__ void sw_flush_vac_page_entry(unsigned long* addr)
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  85 {
  86   __asm__ __volatile__("sta %%g0, [%0] 0xd" : : "r" (addr));
  87 }
  88  
  89 #endif /* !(_SPARC_VAC_OPS_H) */

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