root/include/asm-sparc/viking.h

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INCLUDED FROM


   1 /* viking.h:  Defines specific to the TI Viking MBUS module.
   2  *            This is SRMMU stuff.
   3  *
   4  * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
   5  */
   6 #ifndef _SPARC_VIKING_H
   7 #define _SPARC_VIKING_H
   8 
   9 /* Bits in the SRMMU control register for TI Viking modules.
  10  *
  11  * -------------------------------------------------------------
  12  * |implvers| RSV |DP|RSV|TC|AC|SP|BM|PC|MBM|SB|IC|DC|RSV|NF|ME|
  13  * -------------------------------------------------------------
  14  *  31    24 23-20 19  18 17 16 15 14 13  12 11 10  9 8-2  1  0
  15  *
  16  * DP: Data Prefetcher Enable -- 0 = DP is off, 1 = DP is on
  17  * TC: Tablewalk Cacheable -- 0 = Twalks are not cacheable
  18  *                            1 = Twalks are cacheable
  19  * AC: Alternate Cacheable -- 0 = Direct physical accesses not cacheable
  20  *                            1 = Direct physical accesses are cacheable
  21  * SP: SnooP Enable -- 0 = bus snooping off, 1 = bus snooping on
  22  * BM: Boot Mode -- 0 = not in boot mode, 1 = in boot mode
  23  * MBM: MBus Mode -- 0 = not in MBus mode, 1 = in MBus mode
  24  * SB: StoreBuffer enable -- 0 = store buffer off, 1 = store buffer on
  25  * IC: Instruction Cache -- 0 = off, 1 = on
  26  * DC: Data Cache -- 0 = off, 1 = 0n
  27  * NF: No Fault -- 0 = faults generate traps, 1 = faults don't trap
  28  * ME: MMU enable -- 0 = mmu not translating, 1 = mmu translating
  29  *
  30  */
  31 
  32 #define VIKING_DCENABLE     0x00000100   /* Enable data cache */
  33 #define VIKING_ICENABLE     0x00000200   /* Enable instruction cache */
  34 #define VIKING_SBENABLE     0x00000400   /* Enable store buffer */
  35 #define VIKING_MMODE        0x00000800   /* MBUS mode */
  36 #define VIKING_PCENABLE     0x00001000   /* Enable parity checking */
  37 
  38 /* Boot mode, 0 at boot-time, 1 after prom initializes the MMU. */
  39 #define VIKING_BMODE        0x00002000   
  40 #define VIKING_SPENABLE     0x00004000   /* Enable bus cache snooping */
  41 
  42 /* The deal with this AC bit is that if you are going to modify the
  43  * contents of physical ram using the MMU bypass, you had better set
  44  * this bit or things will get unsynchronized.  This is only applicable
  45  * if an E-cache (ie. a PAC) is around and the Viking is not in MBUS mode.
  46  */
  47 #define VIKING_ACENABLE     0x00008000   /* Enable alternate caching */
  48 #define VIKING_TCENABLE     0x00010000   /* Enable table-walks to be cached */
  49 #define VIKING_DPENABLE     0x00040000   /* Enable the data prefetcher */
  50 
  51 #endif

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