This source file includes following definitions.
- depca_probe
- depca_hw_init
- depca_open
- depca_init_ring
- depca_start_xmit
- depca_interrupt
- depca_rx
- depca_tx
- depca_close
- LoadCSRs
- InitRestartDepca
- depca_get_stats
- set_multicast_list
- SetMulticastFilter
- isa_probe
- eisa_probe
- alloc_device
- DepcaSignature
- DevicePresent
- get_hw_addr
- load_packet
- EISA_signature
- depca_ioctl
- init_module
- cleanup_module
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189 static char *version = "depca.c:v0.41 5/26/95 davies@wanton.lkg.dec.com\n";
190
191 #include <linux/config.h>
192 #ifdef MODULE
193 #include <linux/module.h>
194 #include <linux/version.h>
195 #else
196 #define MOD_INC_USE_COUNT
197 #define MOD_DEC_USE_COUNT
198 #endif
199
200 #include <linux/types.h>
201 #include <linux/kernel.h>
202 #include <linux/sched.h>
203 #include <linux/string.h>
204 #include <linux/ptrace.h>
205 #include <linux/errno.h>
206 #include <linux/ioport.h>
207 #include <linux/malloc.h>
208 #include <linux/interrupt.h>
209 #include <asm/segment.h>
210 #include <asm/bitops.h>
211 #include <asm/io.h>
212 #include <asm/dma.h>
213
214 #include <linux/netdevice.h>
215 #include <linux/etherdevice.h>
216 #include <linux/skbuff.h>
217
218 #include "depca.h"
219
220 #ifdef DEPCA_DEBUG
221 static int depca_debug = DEPCA_DEBUG;
222 #else
223 static int depca_debug = 1;
224 #endif
225
226 #define DEPCA_NDA 0xffe0
227
228
229
230
231 #define PROBE_LENGTH 32
232 #define ETH_PROM_SIG 0xAA5500FFUL
233
234
235
236
237
238
239
240
241 #define NUM_RX_DESC 8
242 #define NUM_TX_DESC 8
243 #define RX_BUFF_SZ 1536
244 #define TX_BUFF_SZ 1536
245
246 #define CRC_POLYNOMIAL_BE 0x04c11db7UL
247 #define CRC_POLYNOMIAL_LE 0xedb88320UL
248
249
250
251
252 #define DEPCA_EISA_IO_PORTS 0x0c00
253 #define MAX_EISA_SLOTS 16
254 #define EISA_SLOT_INC 0x1000
255
256
257
258
259 #define DEPCA_RAM_BASE_ADDRESSES {0xc0000,0xd0000,0xe0000,0x00000}
260 #define DEPCA_IO_PORTS {0x300, 0x200, 0}
261 #define DEPCA_TOTAL_SIZE 0x10
262 static short mem_chkd = 0;
263
264
265
266
267 #define DEPCA_SIGNATURE {"DEPCA",\
268 "DE100","DE101",\
269 "DE200","DE201","DE202",\
270 "DE210",\
271 "DE422",\
272 ""}
273 static enum {DEPCA, de100, de101, de200, de201, de202, de210, de422, unknown} adapter;
274
275
276
277
278 #define DEPCA_STRLEN 16
279 #define MAX_NUM_DEPCAS 2
280
281
282
283
284
285
286
287 #define ALIGN4 ((u_long)4 - 1)
288 #define ALIGN8 ((u_long)8 - 1)
289 #define ALIGN ALIGN8
290
291
292
293
294 struct depca_rx_desc {
295 volatile s32 base;
296 s16 buf_length;
297 s16 msg_length;
298 };
299
300 struct depca_tx_desc {
301 volatile s32 base;
302 s16 length;
303 s16 misc;
304 };
305
306 #define LA_MASK 0x0000ffff
307
308
309
310
311
312 struct depca_init {
313 u16 mode;
314 u8 phys_addr[ETH_ALEN];
315 u8 mcast_table[8];
316 u32 rx_ring;
317 u32 tx_ring;
318 };
319
320 #define DEPCA_PKT_STAT_SZ 16
321 #define DEPCA_PKT_BIN_SZ 128
322
323 struct depca_private {
324 char devname[DEPCA_STRLEN];
325 char adapter_name[DEPCA_STRLEN];
326 char adapter;
327 struct depca_rx_desc *rx_ring;
328 struct depca_tx_desc *tx_ring;
329 struct depca_init init_block;
330 char *rx_memcpy[NUM_RX_DESC];
331 char *tx_memcpy[NUM_TX_DESC];
332 u_long bus_offset;
333 u_long sh_mem;
334 u_long dma_buffs;
335 int rx_new, tx_new;
336 int rx_old, tx_old;
337 struct enet_statistics stats;
338 struct {
339 u32 bins[DEPCA_PKT_STAT_SZ];
340 u32 unicast;
341 u32 multicast;
342 u32 broadcast;
343 u32 excessive_collisions;
344 u32 tx_underruns;
345 u32 excessive_underruns;
346 } pktStats;
347 int txRingMask;
348 int rxRingMask;
349 s32 rx_rlen;
350 s32 tx_rlen;
351 };
352
353
354
355
356
357
358
359
360 #define TX_BUFFS_AVAIL ((lp->tx_old<=lp->tx_new)?\
361 lp->tx_old+lp->txRingMask-lp->tx_new:\
362 lp->tx_old -lp->tx_new-1)
363
364
365
366
367 static int depca_open(struct device *dev);
368 static int depca_start_xmit(struct sk_buff *skb, struct device *dev);
369 static void depca_interrupt(int irq, struct pt_regs * regs);
370 static int depca_close(struct device *dev);
371 static int depca_ioctl(struct device *dev, struct ifreq *rq, int cmd);
372 static struct enet_statistics *depca_get_stats(struct device *dev);
373 static void set_multicast_list(struct device *dev,int num_addrs,void *addrs);
374
375
376
377
378 static int depca_hw_init(struct device *dev, u_long ioaddr);
379 static void depca_init_ring(struct device *dev);
380 static int depca_rx(struct device *dev);
381 static int depca_tx(struct device *dev);
382
383 static void LoadCSRs(struct device *dev);
384 static int InitRestartDepca(struct device *dev);
385 static void DepcaSignature(char *name, u_long paddr);
386 static int DevicePresent(u_long ioaddr);
387 static int get_hw_addr(struct device *dev);
388 static int EISA_signature(char *name, s32 eisa_id);
389 static void SetMulticastFilter(struct device *dev,int num_addrs,char *addrs);
390 static void isa_probe(struct device *dev, u_long iobase);
391 static void eisa_probe(struct device *dev, u_long iobase);
392 static struct device *alloc_device(struct device *dev, u_long iobase);
393 static int load_packet(struct device *dev, struct sk_buff *skb);
394
395 #ifdef MODULE
396 int init_module(void);
397 void cleanup_module(void);
398 static int autoprobed = 1, loading_module = 1;
399 # else
400 static u_char de1xx_irq[] = {2,3,4,5,7,0};
401 static u_char de2xx_irq[] = {5,9,10,11,15,0};
402 static u_char de422_irq[] = {5,9,10,11,0};
403 static u_char *depca_irq;
404 static int autoprobed = 0, loading_module = 0;
405 #endif
406
407 static char name[DEPCA_STRLEN];
408 static int num_depcas = 0, num_eth = 0;
409
410
411
412
413 #define STOP_DEPCA \
414 outw(CSR0, DEPCA_ADDR);\
415 outw(STOP, DEPCA_DATA)
416
417
418
419 int depca_probe(struct device *dev)
420 {
421 int tmp = num_depcas, status = -ENODEV;
422 u_long iobase = dev->base_addr;
423
424 if ((iobase == 0) && loading_module){
425 printk("Autoprobing is not supported when loading a module based driver.\n");
426 status = -EIO;
427 } else {
428 isa_probe(dev, iobase);
429 eisa_probe(dev, iobase);
430
431 if ((tmp == num_depcas) && (iobase != 0) && loading_module) {
432 printk("%s: depca_probe() cannot find device at 0x%04lx.\n", dev->name,
433 iobase);
434 }
435
436
437
438
439
440 for (; (dev->priv == NULL) && (dev->next != NULL); dev = dev->next);
441
442 if (dev->priv) status = 0;
443 if (iobase == 0) autoprobed = 1;
444 }
445
446 return status;
447 }
448
449 static int
450 depca_hw_init(struct device *dev, u_long ioaddr)
451 {
452 struct depca_private *lp;
453 int i, j, offset, netRAM, mem_len, status=0;
454 s16 nicsr;
455 u_long mem_start=0, mem_base[] = DEPCA_RAM_BASE_ADDRESSES;
456
457 STOP_DEPCA;
458
459 nicsr = inb(DEPCA_NICSR);
460 nicsr = ((nicsr & ~SHE & ~RBE & ~IEN) | IM);
461 outb(nicsr, DEPCA_NICSR);
462
463 if (inw(DEPCA_DATA) == STOP) {
464 for (; mem_base[mem_chkd]; mem_chkd++) {
465 mem_start = mem_base[mem_chkd];
466 DepcaSignature(name, mem_start);
467 if (*name != '\0') break;
468 }
469
470 if ((*name != '\0') && mem_start) {
471 dev->base_addr = ioaddr;
472
473 if ((ioaddr&0x0fff)==DEPCA_EISA_IO_PORTS) {
474 printk("%s: %s at 0x%04lx (EISA slot %d)",
475 dev->name, name, ioaddr, (int)((ioaddr>>12)&0x0f));
476 } else {
477 printk("%s: %s at 0x%04lx", dev->name, name, ioaddr);
478 }
479
480 printk(", h/w address ");
481 status = get_hw_addr(dev);
482 for (i=0; i<ETH_ALEN - 1; i++) {
483 printk("%2.2x:", dev->dev_addr[i]);
484 }
485 printk("%2.2x", dev->dev_addr[i]);
486
487 if (status == 0) {
488
489 netRAM = ((adapter != DEPCA) ? 64 : 48);
490 if ((nicsr & _128KB) && (adapter == de422)) netRAM = 128;
491 offset = 0x0000;
492
493
494 if (nicsr & BUF) {
495 offset = 0x8000;
496 nicsr &= ~BS;
497 netRAM -= 32;
498 }
499 mem_start += offset;
500 if ((mem_len = (NUM_RX_DESC*(sizeof(struct depca_rx_desc)+RX_BUFF_SZ) +
501 NUM_TX_DESC*(sizeof(struct depca_tx_desc)+TX_BUFF_SZ) +
502 sizeof(struct depca_init))) <=
503 (netRAM<<10)) {
504 printk(",\n has %dkB RAM at 0x%.5lx", netRAM, mem_start);
505
506
507 if (adapter != DEPCA) {
508 nicsr |= SHE;
509 outb(nicsr, DEPCA_NICSR);
510 }
511
512
513 dev->priv = (void *) kmalloc(sizeof(struct depca_private), GFP_KERNEL);
514 lp = (struct depca_private *)dev->priv;
515 memset((char *)dev->priv, 0, sizeof(struct depca_private));
516 lp->adapter = adapter;
517 sprintf(lp->adapter_name,"%s (%s)", name, dev->name);
518 request_region(ioaddr, DEPCA_TOTAL_SIZE, lp->adapter_name);
519
520
521 lp->sh_mem = mem_start;
522 mem_start += sizeof(struct depca_init);
523
524
525 mem_start = (mem_start + ALIGN) & ~ALIGN;
526 lp->rx_ring = (struct depca_rx_desc *)mem_start;
527
528 mem_start += (sizeof(struct depca_rx_desc) * NUM_RX_DESC);
529 lp->tx_ring = (struct depca_tx_desc *)mem_start;
530
531 mem_start += (sizeof(struct depca_tx_desc) * NUM_TX_DESC);
532 lp->bus_offset = mem_start & 0x00ff0000;
533 mem_start &= LA_MASK;
534
535 lp->dma_buffs = mem_start;
536
537
538 lp->rxRingMask = NUM_RX_DESC - 1;
539 lp->txRingMask = NUM_TX_DESC - 1;
540
541
542 for (i=0, j = lp->rxRingMask; j>0; i++) {
543 j >>= 1;
544 }
545 lp->rx_rlen = (s32)(i << 29);
546 for (i=0, j = lp->txRingMask; j>0; i++) {
547 j >>= 1;
548 }
549 lp->tx_rlen = (s32)(i << 29);
550
551
552 depca_init_ring(dev);
553
554
555 LoadCSRs(dev);
556
557
558 nicsr = ((nicsr & ~IM)|IEN);
559 outb(nicsr, DEPCA_NICSR);
560
561
562
563 if (dev->irq < 2) {
564 #ifndef MODULE
565 unsigned char irqnum;
566 autoirq_setup(0);
567
568
569 switch (lp->adapter) {
570 case DEPCA:
571 case de100:
572 case de101:
573 depca_irq = de1xx_irq;
574 break;
575 case de200:
576 case de201:
577 case de202:
578 case de210:
579 depca_irq = de2xx_irq;
580 break;
581 case de422:
582 depca_irq = de422_irq;
583 break;
584 }
585
586
587 outw(INEA | INIT, DEPCA_DATA);
588
589 irqnum = autoirq_report(1);
590 if (!irqnum) {
591 printk(" and failed to detect IRQ line.\n");
592 status = -ENXIO;
593 } else {
594 for (dev->irq=0,i=0; (depca_irq[i]) && (!dev->irq); i++) {
595 if (irqnum == depca_irq[i]) {
596 dev->irq = irqnum;
597 printk(" and uses IRQ%d.\n", dev->irq);
598 }
599 }
600
601 if (!dev->irq) {
602 printk(" but incorrect IRQ line detected.\n");
603 status = -ENXIO;
604 }
605 }
606 #endif
607 } else {
608 printk(" and assigned IRQ%d.\n", dev->irq);
609 }
610 if (status) release_region(ioaddr, DEPCA_TOTAL_SIZE);
611 } else {
612 printk(",\n requests %dkB RAM: only %dkB is available!\n",
613 (mem_len>>10), netRAM);
614 status = -ENXIO;
615 }
616 } else {
617 printk(" which has an Ethernet PROM CRC error.\n");
618 status = -ENXIO;
619 }
620 }
621 if (!status) {
622 if (depca_debug > 0) {
623 printk(version);
624 }
625
626
627 dev->open = &depca_open;
628 dev->hard_start_xmit = &depca_start_xmit;
629 dev->stop = &depca_close;
630 dev->get_stats = &depca_get_stats;
631 dev->set_multicast_list = &set_multicast_list;
632 dev->do_ioctl = &depca_ioctl;
633
634 dev->mem_start = 0;
635
636
637 ether_setup(dev);
638 } else {
639 if (dev->priv) {
640 kfree_s(dev->priv, sizeof(struct depca_private));
641 dev->priv = NULL;
642 }
643 }
644 } else {
645 status = -ENXIO;
646 }
647
648 return status;
649 }
650
651
652 static int
653 depca_open(struct device *dev)
654 {
655 struct depca_private *lp = (struct depca_private *)dev->priv;
656 s16 nicsr;
657 u_long ioaddr = dev->base_addr;
658 int i, status = 0;
659 struct depca_init *p = (struct depca_init *)lp->sh_mem;
660
661 if (request_irq(dev->irq, &depca_interrupt, 0, lp->adapter_name)) {
662 printk("depca_open(): Requested IRQ%d is busy\n",dev->irq);
663 status = -EAGAIN;
664 }
665
666 irq2dev_map[dev->irq] = dev;
667 STOP_DEPCA;
668 nicsr = inb(DEPCA_NICSR);
669
670
671 if (adapter != DEPCA) {
672 nicsr |= SHE;
673 outb(nicsr, DEPCA_NICSR);
674 }
675
676
677 depca_init_ring(dev);
678 LoadCSRs(dev);
679
680 if (depca_debug > 1){
681
682 memcpy_toio((char *)lp->sh_mem, &lp->init_block, sizeof(struct depca_init));
683
684 printk("%s: depca open with irq %d\n",dev->name,dev->irq);
685 printk("Descriptor head addresses:\n");
686 printk("\t0x%lx 0x%lx\n",(u_long)lp->rx_ring, (u_long)lp->tx_ring);
687 printk("Descriptor addresses:\nRX: ");
688 for (i=0;i<lp->rxRingMask;i++){
689 if (i < 3) {
690 printk("0x%8.8lx ", (long) &lp->rx_ring[i].base);
691 }
692 }
693 printk("...0x%8.8lx\n", (long) &lp->rx_ring[i].base);
694 printk("TX: ");
695 for (i=0;i<lp->txRingMask;i++){
696 if (i < 3) {
697 printk("0x%8.8lx ", (long) &lp->tx_ring[i].base);
698 }
699 }
700 printk("...0x%8.8lx\n", (long) &lp->tx_ring[i].base);
701 printk("\nDescriptor buffers:\nRX: ");
702 for (i=0;i<lp->rxRingMask;i++){
703 if (i < 3) {
704 printk("0x%8.8x ", readl(&lp->rx_ring[i].base));
705 }
706 }
707 printk("...0x%8.8x\n", readl(&lp->rx_ring[i].base));
708 printk("TX: ");
709 for (i=0;i<lp->txRingMask;i++){
710 if (i < 3) {
711 printk("0x%8.8x ", readl(&lp->tx_ring[i].base));
712 }
713 }
714 printk("...0x%8.8x\n", readl(&lp->tx_ring[i].base));
715 printk("Status: %d\n", status);
716 printk("Initialisation block at 0x%8.8lx\n",lp->sh_mem);
717 printk("\tmode: 0x%4.4x\n",readw(&p->mode));
718 printk("\tphysical address: ");
719 for (i=0;i<ETH_ALEN-1;i++){
720 printk("%2.2x:",(u_char)readb(&p->phys_addr[i]));
721 }
722 printk("%2.2x\n",(u_char)readb(&p->phys_addr[i]));
723 printk("\tmulticast hash table: ");
724 for (i=0;i<(HASH_TABLE_LEN >> 3)-1;i++){
725 printk("%2.2x:",(u_char)readb(&p->mcast_table[i]));
726 }
727 printk("%2.2x\n",(u_char)readb(&p->mcast_table[i]));
728 printk("\trx_ring at: 0x%8.8x\n",readl(&p->rx_ring));
729 printk("\ttx_ring at: 0x%8.8x\n",readl(&p->tx_ring));
730 printk("dma_buffs: 0x%8.8lx\n",lp->dma_buffs);
731 printk("Ring size:\nRX: %d Log2(rxRingMask): 0x%8.8x\n",
732 (int)lp->rxRingMask + 1,
733 lp->rx_rlen);
734 printk("TX: %d Log2(txRingMask): 0x%8.8x\n",
735 (int)lp->txRingMask + 1,
736 lp->tx_rlen);
737 outw(CSR2,DEPCA_ADDR);
738 printk("CSR2&1: 0x%4.4x",inw(DEPCA_DATA));
739 outw(CSR1,DEPCA_ADDR);
740 printk("%4.4x\n",inw(DEPCA_DATA));
741 outw(CSR3,DEPCA_ADDR);
742 printk("CSR3: 0x%4.4x\n",inw(DEPCA_DATA));
743 }
744
745
746 nicsr = ((nicsr & ~IM & ~LED)|IEN);
747 outb(nicsr, DEPCA_NICSR);
748 outw(CSR0,DEPCA_ADDR);
749
750 dev->tbusy = 0;
751 dev->interrupt = 0;
752 dev->start = 1;
753
754 status = InitRestartDepca(dev);
755
756 if (depca_debug > 1){
757 printk("CSR0: 0x%4.4x\n",inw(DEPCA_DATA));
758 printk("nicsr: 0x%02x\n",inb(DEPCA_NICSR));
759 }
760
761 MOD_INC_USE_COUNT;
762
763 return status;
764 }
765
766
767 static void
768 depca_init_ring(struct device *dev)
769 {
770 struct depca_private *lp = (struct depca_private *)dev->priv;
771 u_int i;
772 u_long p;
773
774
775 set_bit(0, (void *)&dev->tbusy);
776
777 lp->rx_new = lp->tx_new = 0;
778 lp->rx_old = lp->tx_old = 0;
779
780
781 for (i = 0; i <= lp->rxRingMask; i++) {
782 writel((p=lp->dma_buffs+i*RX_BUFF_SZ) | R_OWN, &lp->rx_ring[i].base);
783 writew(-RX_BUFF_SZ, &lp->rx_ring[i].buf_length);
784 lp->rx_memcpy[i]=(char *)(p+lp->bus_offset);
785 }
786 for (i = 0; i <= lp->txRingMask; i++) {
787 writel((p=lp->dma_buffs+(i+lp->txRingMask+1)*TX_BUFF_SZ) & 0x00ffffff,
788 &lp->tx_ring[i].base);
789 lp->tx_memcpy[i]=(char *)(p+lp->bus_offset);
790 }
791
792
793 lp->init_block.rx_ring = ((u32)((u_long)lp->rx_ring)&LA_MASK) | lp->rx_rlen;
794 lp->init_block.tx_ring = ((u32)((u_long)lp->tx_ring)&LA_MASK) | lp->tx_rlen;
795
796 SetMulticastFilter(dev, 0, NULL);
797
798 for (i = 0; i < ETH_ALEN; i++) {
799 lp->init_block.phys_addr[i] = dev->dev_addr[i];
800 }
801
802 lp->init_block.mode = 0x0000;
803
804 return;
805 }
806
807
808
809
810 static int
811 depca_start_xmit(struct sk_buff *skb, struct device *dev)
812 {
813 struct depca_private *lp = (struct depca_private *)dev->priv;
814 u_long ioaddr = dev->base_addr;
815 int status = 0;
816
817
818 if (dev->tbusy) {
819 int tickssofar = jiffies - dev->trans_start;
820 if (tickssofar < 1*HZ) {
821 status = -1;
822 } else {
823 printk("%s: transmit timed out, status %04x, resetting.\n",
824 dev->name, inw(DEPCA_DATA));
825
826 STOP_DEPCA;
827 depca_init_ring(dev);
828 LoadCSRs(dev);
829 dev->interrupt = UNMASK_INTERRUPTS;
830 dev->start = 1;
831 dev->tbusy=0;
832 dev->trans_start = jiffies;
833 InitRestartDepca(dev);
834 }
835 return status;
836 } else if (skb == NULL) {
837 dev_tint(dev);
838 } else if (skb->len > 0) {
839
840 if (set_bit(0, (void*)&dev->tbusy) != 0) {
841 printk("%s: Transmitter access conflict.\n", dev->name);
842 status = -1;
843 } else {
844 if (TX_BUFFS_AVAIL) {
845 status = load_packet(dev, skb);
846
847 if (!status) {
848
849 outw(CSR0, DEPCA_ADDR);
850 outw(INEA | TDMD, DEPCA_DATA);
851
852 dev->trans_start = jiffies;
853 dev_kfree_skb(skb, FREE_WRITE);
854 }
855 if (TX_BUFFS_AVAIL) {
856 dev->tbusy=0;
857 }
858 } else {
859 status = -1;
860 }
861 }
862 }
863
864 return status;
865 }
866
867
868
869
870 static void
871 depca_interrupt(int irq, struct pt_regs * regs)
872 {
873 struct device *dev = (struct device *)(irq2dev_map[irq]);
874 struct depca_private *lp;
875 s16 csr0, nicsr;
876 u_long ioaddr;
877
878 if (dev == NULL) {
879 printk ("depca_interrupt(): irq %d for unknown device.\n", irq);
880 } else {
881 lp = (struct depca_private *)dev->priv;
882 ioaddr = dev->base_addr;
883
884 if (dev->interrupt)
885 printk("%s: Re-entering the interrupt handler.\n", dev->name);
886
887 dev->interrupt = MASK_INTERRUPTS;
888
889
890 nicsr = inb(DEPCA_NICSR);
891 nicsr |= (IM|LED);
892 outb(nicsr, DEPCA_NICSR);
893
894 outw(CSR0, DEPCA_ADDR);
895 csr0 = inw(DEPCA_DATA);
896
897
898 outw(csr0 & INTE, DEPCA_DATA);
899
900 if (csr0 & RINT)
901 depca_rx(dev);
902
903 if (csr0 & TINT)
904 depca_tx(dev);
905
906 if ((TX_BUFFS_AVAIL >= 0) && dev->tbusy) {
907 dev->tbusy = 0;
908 mark_bh(NET_BH);
909 }
910
911
912 nicsr = (nicsr & ~IM & ~LED);
913 outb(nicsr, DEPCA_NICSR);
914
915 dev->interrupt = UNMASK_INTERRUPTS;
916 }
917
918 return;
919 }
920
921 static int
922 depca_rx(struct device *dev)
923 {
924 struct depca_private *lp = (struct depca_private *)dev->priv;
925 int i, entry;
926 s32 status;
927
928 for (entry=lp->rx_new;
929 !(readl(&lp->rx_ring[entry].base) & R_OWN);
930 entry=lp->rx_new){
931 status = readl(&lp->rx_ring[entry].base) >> 16 ;
932 if (status & R_STP) {
933 lp->rx_old = entry;
934 }
935 if (status & R_ENP) {
936 if (status & R_ERR) {
937 lp->stats.rx_errors++;
938 if (status & R_FRAM) lp->stats.rx_frame_errors++;
939 if (status & R_OFLO) lp->stats.rx_over_errors++;
940 if (status & R_CRC) lp->stats.rx_crc_errors++;
941 if (status & R_BUFF) lp->stats.rx_fifo_errors++;
942 } else {
943 short len, pkt_len = readw(&lp->rx_ring[entry].msg_length);
944 struct sk_buff *skb;
945
946 skb = dev_alloc_skb(pkt_len+2);
947 if (skb != NULL) {
948 unsigned char * buf;
949 skb_reserve(skb,2);
950 buf = skb_put(skb,pkt_len);
951 skb->dev = dev;
952 if (entry < lp->rx_old) {
953 len = (lp->rxRingMask - lp->rx_old + 1) * RX_BUFF_SZ;
954 memcpy_fromio(buf, lp->rx_memcpy[lp->rx_old], len);
955 memcpy_fromio(buf + len, lp->rx_memcpy[0], pkt_len-len);
956 } else {
957 memcpy_fromio(buf, lp->rx_memcpy[lp->rx_old], pkt_len);
958 }
959
960
961
962
963
964 skb->protocol=eth_type_trans(skb,dev);
965 netif_rx(skb);
966
967
968
969
970 lp->stats.rx_packets++;
971 for (i=1; i<DEPCA_PKT_STAT_SZ-1; i++) {
972 if (pkt_len < (i*DEPCA_PKT_BIN_SZ)) {
973 lp->pktStats.bins[i]++;
974 i = DEPCA_PKT_STAT_SZ;
975 }
976 }
977 if (buf[0] & 0x01) {
978 if ((*(s16 *)&buf[0] == -1) && (*(s32 *)&buf[2] == -1)) {
979 lp->pktStats.broadcast++;
980 } else {
981 lp->pktStats.multicast++;
982 }
983 } else if ((*(s16 *)&buf[0] == *(s16 *)&dev->dev_addr[0]) &&
984 (*(s32 *)&buf[2] == *(s32 *)&dev->dev_addr[2])) {
985 lp->pktStats.unicast++;
986 }
987
988 lp->pktStats.bins[0]++;
989 if (lp->pktStats.bins[0] == 0) {
990 memset((char *)&lp->pktStats, 0, sizeof(lp->pktStats));
991 }
992 } else {
993 printk("%s: Memory squeeze, deferring packet.\n", dev->name);
994 lp->stats.rx_dropped++;
995 break;
996 }
997 }
998
999 for (; lp->rx_old!=entry; lp->rx_old=(++lp->rx_old)&lp->rxRingMask) {
1000 writel(readl(&lp->rx_ring[lp->rx_old].base) | R_OWN,
1001 &lp->rx_ring[lp->rx_old].base);
1002 }
1003 writel(readl(&lp->rx_ring[entry].base) | R_OWN, &lp->rx_ring[entry].base);
1004 }
1005
1006
1007
1008
1009 lp->rx_new = (++lp->rx_new) & lp->rxRingMask;
1010 }
1011
1012 return 0;
1013 }
1014
1015
1016
1017
1018 static int
1019 depca_tx(struct device *dev)
1020 {
1021 struct depca_private *lp = (struct depca_private *)dev->priv;
1022 int entry;
1023 s32 status;
1024 u_long ioaddr = dev->base_addr;
1025
1026 for (entry = lp->tx_old; entry != lp->tx_new; entry = lp->tx_old) {
1027 status = readl(&lp->tx_ring[entry].base) >> 16 ;
1028
1029 if (status < 0) {
1030 break;
1031 } else if (status & T_ERR) {
1032 status = readl(&lp->tx_ring[entry].misc);
1033 lp->stats.tx_errors++;
1034 if (status & TMD3_RTRY) lp->stats.tx_aborted_errors++;
1035 if (status & TMD3_LCAR) lp->stats.tx_carrier_errors++;
1036 if (status & TMD3_LCOL) lp->stats.tx_window_errors++;
1037 if (status & TMD3_UFLO) lp->stats.tx_fifo_errors++;
1038 if (status & (TMD3_BUFF | TMD3_UFLO)) {
1039
1040 outw(CSR0, DEPCA_ADDR);
1041 outw(INEA | TDMD, DEPCA_DATA);
1042 }
1043 } else if (status & (T_MORE | T_ONE)) {
1044 lp->stats.collisions++;
1045 } else {
1046 lp->stats.tx_packets++;
1047 }
1048
1049
1050 lp->tx_old = (++lp->tx_old) & lp->txRingMask;
1051 }
1052
1053 return 0;
1054 }
1055
1056 static int
1057 depca_close(struct device *dev)
1058 {
1059 struct depca_private *lp = (struct depca_private *)dev->priv;
1060 s16 nicsr;
1061 u_long ioaddr = dev->base_addr;
1062
1063 dev->start = 0;
1064 dev->tbusy = 1;
1065
1066 outw(CSR0, DEPCA_ADDR);
1067
1068 if (depca_debug > 1) {
1069 printk("%s: Shutting down ethercard, status was %2.2x.\n",
1070 dev->name, inw(DEPCA_DATA));
1071 }
1072
1073
1074
1075
1076
1077 outw(STOP, DEPCA_DATA);
1078
1079
1080
1081
1082 if (lp->adapter != DEPCA) {
1083 nicsr = inb(DEPCA_NICSR);
1084 nicsr &= ~SHE;
1085 outb(nicsr, DEPCA_NICSR);
1086 }
1087
1088
1089
1090
1091 free_irq(dev->irq);
1092 irq2dev_map[dev->irq] = NULL;
1093
1094 MOD_DEC_USE_COUNT;
1095
1096 return 0;
1097 }
1098
1099 static void LoadCSRs(struct device *dev)
1100 {
1101 struct depca_private *lp = (struct depca_private *)dev->priv;
1102 u_long ioaddr = dev->base_addr;
1103
1104 outw(CSR1, DEPCA_ADDR);
1105 outw((u16)(lp->sh_mem & LA_MASK), DEPCA_DATA);
1106 outw(CSR2, DEPCA_ADDR);
1107 outw((u16)((lp->sh_mem & LA_MASK) >> 16), DEPCA_DATA);
1108 outw(CSR3, DEPCA_ADDR);
1109 outw(ACON, DEPCA_DATA);
1110
1111 outw(CSR0, DEPCA_ADDR);
1112
1113 return;
1114 }
1115
1116 static int InitRestartDepca(struct device *dev)
1117 {
1118 struct depca_private *lp = (struct depca_private *)dev->priv;
1119 u_long ioaddr = dev->base_addr;
1120 int i, status=0;
1121
1122
1123 memcpy_toio((char *)lp->sh_mem, &lp->init_block, sizeof(struct depca_init));
1124
1125 outw(CSR0, DEPCA_ADDR);
1126 outw(INIT, DEPCA_DATA);
1127
1128
1129 for (i=0;(i<100) && !(inw(DEPCA_DATA) & IDON); i++);
1130
1131 if (i!=100) {
1132
1133 outw(IDON | INEA | STRT, DEPCA_DATA);
1134 if (depca_debug > 2) {
1135 printk("%s: DEPCA open after %d ticks, init block 0x%08lx csr0 %4.4x.\n",
1136 dev->name, i, lp->sh_mem, inw(DEPCA_DATA));
1137 }
1138 } else {
1139 printk("%s: DEPCA unopen after %d ticks, init block 0x%08lx csr0 %4.4x.\n",
1140 dev->name, i, lp->sh_mem, inw(DEPCA_DATA));
1141 status = -1;
1142 }
1143
1144 return status;
1145 }
1146
1147 static struct enet_statistics *
1148 depca_get_stats(struct device *dev)
1149 {
1150 struct depca_private *lp = (struct depca_private *)dev->priv;
1151
1152
1153
1154 return &lp->stats;
1155 }
1156
1157
1158
1159
1160
1161
1162
1163
1164 static void
1165 set_multicast_list(struct device *dev, int num_addrs, void *addrs)
1166 {
1167 struct depca_private *lp = (struct depca_private *)dev->priv;
1168 u_long ioaddr = dev->base_addr;
1169
1170 if (irq2dev_map[dev->irq] != NULL) {
1171 while(dev->tbusy);
1172 set_bit(0, (void*)&dev->tbusy);
1173 while(lp->tx_old != lp->tx_new);
1174
1175 STOP_DEPCA;
1176 depca_init_ring(dev);
1177
1178 if (num_addrs >= 0) {
1179 SetMulticastFilter(dev, num_addrs, (char *)addrs);
1180 lp->init_block.mode &= ~PROM;
1181 } else {
1182 lp->init_block.mode |= PROM;
1183 }
1184
1185 LoadCSRs(dev);
1186 InitRestartDepca(dev);
1187 dev->tbusy = 0;
1188 }
1189 }
1190
1191
1192
1193
1194
1195
1196
1197 static void SetMulticastFilter(struct device *dev, int num_addrs, char *addrs)
1198 {
1199 struct depca_private *lp = (struct depca_private *)dev->priv;
1200 int i, j, bit, byte;
1201 u16 hashcode;
1202 s32 crc, poly = CRC_POLYNOMIAL_BE;
1203
1204 if (num_addrs == HASH_TABLE_LEN) {
1205 for (i=0; i<(HASH_TABLE_LEN>>3); i++) {
1206 lp->init_block.mcast_table[i] = (char)0xff;
1207 }
1208 } else {
1209
1210 for (i=0; i<(HASH_TABLE_LEN>>3); i++){
1211 lp->init_block.mcast_table[i]=0;
1212 }
1213
1214
1215 for (i=0;i<num_addrs;i++) {
1216 if ((*addrs & 0x01) == 1) {
1217 crc = 0xffffffff;
1218 for (byte=0;byte<ETH_ALEN;byte++) {
1219
1220 for (bit = *addrs++,j=0;j<8;j++, bit>>=1) {
1221 crc = (crc << 1) ^ ((((crc<0?1:0) ^ bit) & 0x01) ? poly : 0);
1222 }
1223 }
1224 hashcode = (crc & 1);
1225 for (j=0;j<5;j++) {
1226 hashcode = (hashcode << 1) | ((crc>>=1) & 1);
1227 }
1228
1229
1230 byte = hashcode >> 3;
1231 bit = 1 << (hashcode & 0x07);
1232 lp->init_block.mcast_table[byte] |= bit;
1233 } else {
1234 addrs += ETH_ALEN;
1235 }
1236 }
1237 }
1238
1239 return;
1240 }
1241
1242
1243
1244
1245 static void isa_probe(struct device *dev, u_long ioaddr)
1246 {
1247 int i = num_depcas, maxSlots;
1248 s32 ports[] = DEPCA_IO_PORTS;
1249
1250 if (!ioaddr && autoprobed) return ;
1251 if (ioaddr > 0x400) return;
1252 if (i >= MAX_NUM_DEPCAS) return;
1253
1254 if (ioaddr == 0) {
1255 maxSlots = MAX_NUM_DEPCAS;
1256 } else {
1257 ports[i] = ioaddr;
1258 maxSlots = i + 1;
1259 }
1260
1261 for (; (i<maxSlots) && (dev!=NULL) && ports[i]; i++) {
1262 if (DevicePresent(ports[i]) == 0) {
1263 if (check_region(ports[i], DEPCA_TOTAL_SIZE) == 0) {
1264 if ((dev = alloc_device(dev, ports[i])) != NULL) {
1265 if (depca_hw_init(dev, ports[i]) == 0) {
1266 num_depcas++;
1267 }
1268 num_eth++;
1269 }
1270 } else if (autoprobed) {
1271 printk("%s: region already allocated at 0x%04x.\n", dev->name,ports[i]);
1272 }
1273 }
1274 }
1275
1276 return;
1277 }
1278
1279
1280
1281
1282
1283 static void eisa_probe(struct device *dev, u_long ioaddr)
1284 {
1285 int i, maxSlots;
1286 u_long iobase;
1287 char name[DEPCA_STRLEN];
1288
1289 if (!ioaddr && autoprobed) return ;
1290 if ((ioaddr < 0x400) && (ioaddr > 0)) return;
1291
1292 if (ioaddr == 0) {
1293 iobase = EISA_SLOT_INC;
1294 i = 1;
1295 maxSlots = MAX_EISA_SLOTS;
1296 } else {
1297 iobase = ioaddr;
1298 i = (ioaddr >> 12);
1299 maxSlots = i + 1;
1300 }
1301 if ((iobase & 0x0fff) == 0) iobase += DEPCA_EISA_IO_PORTS;
1302
1303 for (; (i<maxSlots) && (dev!=NULL); i++, iobase+=EISA_SLOT_INC) {
1304 if (EISA_signature(name, EISA_ID)) {
1305 if (DevicePresent(iobase) == 0) {
1306 if (check_region(iobase, DEPCA_TOTAL_SIZE) == 0) {
1307 if ((dev = alloc_device(dev, iobase)) != NULL) {
1308 if (depca_hw_init(dev, iobase) == 0) {
1309 num_depcas++;
1310 }
1311 num_eth++;
1312 }
1313 } else if (autoprobed) {
1314 printk("%s: region already allocated at 0x%04lx.\n",dev->name,iobase);
1315 }
1316 }
1317 }
1318 }
1319
1320 return;
1321 }
1322
1323
1324
1325
1326
1327 static struct device *alloc_device(struct device *dev, u_long iobase)
1328 {
1329 int addAutoProbe = 0;
1330 struct device *tmp = NULL, *ret;
1331 int (*init)(struct device *) = NULL;
1332
1333
1334
1335
1336 if (!loading_module) {
1337 while (dev->next != NULL) {
1338 if ((dev->base_addr == DEPCA_NDA) || (dev->base_addr == 0)) break;
1339 dev = dev->next;
1340 num_eth++;
1341 }
1342
1343
1344
1345
1346
1347 if ((dev->base_addr == 0) && (num_depcas > 0)) {
1348 addAutoProbe++;
1349 tmp = dev->next;
1350 init = dev->init;
1351 }
1352
1353
1354
1355
1356
1357 if ((dev->next == NULL) &&
1358 !((dev->base_addr == DEPCA_NDA) || (dev->base_addr == 0))){
1359 dev->next = (struct device *)kmalloc(sizeof(struct device) + 8,
1360 GFP_KERNEL);
1361
1362 dev = dev->next;
1363 if (dev == NULL) {
1364 printk("eth%d: Device not initialised, insufficient memory\n",
1365 num_eth);
1366 } else {
1367
1368
1369
1370
1371
1372 dev->name = (char *)(dev + sizeof(struct device));
1373 if (num_eth > 9999) {
1374 sprintf(dev->name,"eth????");
1375 } else {
1376 sprintf(dev->name,"eth%d", num_eth);
1377 }
1378 dev->base_addr = iobase;
1379 dev->next = NULL;
1380 dev->init = &depca_probe;
1381 num_depcas++;
1382 }
1383 }
1384 ret = dev;
1385
1386
1387
1388
1389
1390 if (ret != NULL) {
1391 if (addAutoProbe) {
1392 for (;(tmp->next!=NULL) && (tmp->base_addr!=DEPCA_NDA); tmp=tmp->next);
1393
1394
1395
1396
1397
1398 if ((tmp->next == NULL) && !(tmp->base_addr == DEPCA_NDA)) {
1399 tmp->next = (struct device *)kmalloc(sizeof(struct device) + 8,
1400 GFP_KERNEL);
1401 tmp = tmp->next;
1402 if (tmp == NULL) {
1403 printk("%s: Insufficient memory to extend the device list.\n",
1404 dev->name);
1405 } else {
1406
1407
1408
1409
1410
1411 tmp->name = (char *)(tmp + sizeof(struct device));
1412 if (num_eth > 9999) {
1413 sprintf(tmp->name,"eth????");
1414 } else {
1415 sprintf(tmp->name,"eth%d", num_eth);
1416 }
1417 tmp->base_addr = 0;
1418 tmp->next = NULL;
1419 tmp->init = init;
1420 }
1421 } else {
1422 tmp->base_addr = 0;
1423 }
1424 }
1425 }
1426 } else {
1427 ret = dev;
1428 }
1429
1430 return ret;
1431 }
1432
1433
1434
1435
1436
1437
1438 static void DepcaSignature(char *name, u_long paddr)
1439 {
1440 u_int i,j,k;
1441 char *signatures[] = DEPCA_SIGNATURE;
1442 char tmpstr[16];
1443
1444 for (i=0;i<16;i++) {
1445 tmpstr[i] = readb(paddr+0xc000+i);
1446 }
1447
1448 strcpy(name,"");
1449 for (i=0;*signatures[i]!='\0' && *name=='\0';i++) {
1450 for (j=0,k=0;j<16 && k<strlen(signatures[i]);j++) {
1451 if (signatures[i][k] == tmpstr[j]) {
1452 k++;
1453 } else {
1454 k=0;
1455 }
1456 }
1457 if (k == strlen(signatures[i])) {
1458 strcpy(name,signatures[i]);
1459 }
1460 }
1461
1462 adapter = i - 1;
1463
1464 return;
1465 }
1466
1467
1468
1469
1470
1471
1472
1473
1474
1475
1476
1477
1478
1479
1480
1481
1482 static int DevicePresent(u_long ioaddr)
1483 {
1484 union {
1485 struct {
1486 u32 a;
1487 u32 b;
1488 } llsig;
1489 char Sig[sizeof(u32) << 1];
1490 } dev;
1491 short sigLength=0;
1492 s8 data;
1493 s16 nicsr;
1494 int i, j, status = 0;
1495
1496 data = inb(DEPCA_PROM);
1497 data = inb(DEPCA_PROM);
1498
1499 if (data == 0x08) {
1500 nicsr = inb(DEPCA_NICSR);
1501 nicsr |= AAC;
1502 outb(nicsr, DEPCA_NICSR);
1503 }
1504
1505 dev.llsig.a = ETH_PROM_SIG;
1506 dev.llsig.b = ETH_PROM_SIG;
1507 sigLength = sizeof(u32) << 1;
1508
1509 for (i=0,j=0;j<sigLength && i<PROBE_LENGTH+sigLength-1;i++) {
1510 data = inb(DEPCA_PROM);
1511 if (dev.Sig[j] == data) {
1512 j++;
1513 } else {
1514 if (data == dev.Sig[0]) {
1515 j=1;
1516 } else {
1517 j=0;
1518 }
1519 }
1520 }
1521
1522 if (j!=sigLength) {
1523 status = -ENODEV;
1524 }
1525
1526 return status;
1527 }
1528
1529
1530
1531
1532
1533
1534 static int get_hw_addr(struct device *dev)
1535 {
1536 u_long ioaddr = dev->base_addr;
1537 int i, k, tmp, status = 0;
1538 u_short j, x, chksum;
1539
1540 x = (((adapter == de100) || (adapter == de101)) ? 1 : 0);
1541
1542 for (i=0,k=0,j=0;j<3;j++) {
1543 k <<= 1 ;
1544 if (k > 0xffff) k-=0xffff;
1545
1546 k += (u_char) (tmp = inb(DEPCA_PROM + x));
1547 dev->dev_addr[i++] = (u_char) tmp;
1548 k += (u_short) ((tmp = inb(DEPCA_PROM + x)) << 8);
1549 dev->dev_addr[i++] = (u_char) tmp;
1550
1551 if (k > 0xffff) k-=0xffff;
1552 }
1553 if (k == 0xffff) k=0;
1554
1555 chksum = (u_char) inb(DEPCA_PROM + x);
1556 chksum |= (u_short) (inb(DEPCA_PROM + x) << 8);
1557 if (k != chksum) status = -1;
1558
1559 return status;
1560 }
1561
1562
1563
1564
1565 static int load_packet(struct device *dev, struct sk_buff *skb)
1566 {
1567 struct depca_private *lp = (struct depca_private *)dev->priv;
1568 int i, entry, end, len, status = 0;
1569
1570 entry = lp->tx_new;
1571 end = (entry + (skb->len - 1) / TX_BUFF_SZ) & lp->txRingMask;
1572 if (!(readl(&lp->tx_ring[end].base) & T_OWN)) {
1573
1574
1575
1576
1577 if (end < entry) {
1578 len = (lp->txRingMask - entry + 1) * TX_BUFF_SZ;
1579 memcpy_toio(lp->tx_memcpy[entry], skb->data, len);
1580 memcpy_toio(lp->tx_memcpy[0], skb->data + len, skb->len - len);
1581 } else {
1582 memcpy_toio(lp->tx_memcpy[entry], skb->data, skb->len);
1583 }
1584
1585
1586 len = (skb->len < ETH_ZLEN) ? ETH_ZLEN : skb->len;
1587 for (i = entry; i != end; i = (++i) & lp->txRingMask) {
1588
1589 writel(readl(&lp->tx_ring[i].base) & ~T_FLAGS, &lp->tx_ring[i].base);
1590 writew(0x0000, &lp->tx_ring[i].misc);
1591 writew(-TX_BUFF_SZ, &lp->tx_ring[i].length);
1592 len -= TX_BUFF_SZ;
1593 }
1594
1595 writel(readl(&lp->tx_ring[end].base) & ~T_FLAGS, &lp->tx_ring[end].base);
1596 writew(0x0000, &lp->tx_ring[end].misc);
1597 writew(-len, &lp->tx_ring[end].length);
1598
1599
1600 writel(readl(&lp->tx_ring[entry].base) | T_STP, &lp->tx_ring[entry].base);
1601
1602 writel(readl(&lp->tx_ring[end].base) | T_ENP, &lp->tx_ring[end].base);
1603
1604 for (i=end; i!=entry; --i) {
1605
1606 writel(readl(&lp->tx_ring[i].base) | T_OWN, &lp->tx_ring[i].base);
1607 if (i == 0) i=lp->txRingMask+1;
1608 }
1609 writel(readl(&lp->tx_ring[entry].base) | T_OWN, &lp->tx_ring[entry].base);
1610
1611 lp->tx_new = (++end) & lp->txRingMask;
1612 } else {
1613 status = -1;
1614 }
1615
1616 return status;
1617 }
1618
1619
1620
1621
1622 static int EISA_signature(char *name, s32 eisa_id)
1623 {
1624 u_int i;
1625 char *signatures[] = DEPCA_SIGNATURE;
1626 char ManCode[DEPCA_STRLEN];
1627 union {
1628 s32 ID;
1629 char Id[4];
1630 } Eisa;
1631 int status = 0;
1632
1633 *name = '\0';
1634 Eisa.ID = inl(eisa_id);
1635
1636 ManCode[0]=(((Eisa.Id[0]>>2)&0x1f)+0x40);
1637 ManCode[1]=(((Eisa.Id[1]&0xe0)>>5)+((Eisa.Id[0]&0x03)<<3)+0x40);
1638 ManCode[2]=(((Eisa.Id[2]>>4)&0x0f)+0x30);
1639 ManCode[3]=((Eisa.Id[2]&0x0f)+0x30);
1640 ManCode[4]=(((Eisa.Id[3]>>4)&0x0f)+0x30);
1641 ManCode[5]='\0';
1642
1643 for (i=0;(*signatures[i] != '\0') && (*name == '\0');i++) {
1644 if (strstr(ManCode, signatures[i]) != NULL) {
1645 strcpy(name,ManCode);
1646 status = 1;
1647 }
1648 }
1649
1650 return status;
1651 }
1652
1653
1654
1655
1656
1657 static int depca_ioctl(struct device *dev, struct ifreq *rq, int cmd)
1658 {
1659 struct depca_private *lp = (struct depca_private *)dev->priv;
1660 struct depca_ioctl *ioc = (struct depca_ioctl *) &rq->ifr_data;
1661 int i, status = 0;
1662 u_long ioaddr = dev->base_addr;
1663 union {
1664 u8 addr[(HASH_TABLE_LEN * ETH_ALEN)];
1665 u16 sval[(HASH_TABLE_LEN * ETH_ALEN) >> 1];
1666 u32 lval[(HASH_TABLE_LEN * ETH_ALEN) >> 2];
1667 } tmp;
1668
1669 switch(ioc->cmd) {
1670 case DEPCA_GET_HWADDR:
1671 for (i=0; i<ETH_ALEN; i++) {
1672 tmp.addr[i] = dev->dev_addr[i];
1673 }
1674 ioc->len = ETH_ALEN;
1675 if (!(status = verify_area(VERIFY_WRITE, (void *)ioc->data, ioc->len))) {
1676 memcpy_tofs(ioc->data, tmp.addr, ioc->len);
1677 }
1678
1679 break;
1680 case DEPCA_SET_HWADDR:
1681 if (suser()) {
1682 if (!(status = verify_area(VERIFY_READ, (void *)ioc->data, ETH_ALEN))) {
1683 memcpy_fromfs(tmp.addr,ioc->data,ETH_ALEN);
1684 for (i=0; i<ETH_ALEN; i++) {
1685 dev->dev_addr[i] = tmp.addr[i];
1686 }
1687 while(dev->tbusy);
1688 set_bit(0, (void*)&dev->tbusy);
1689 while(lp->tx_old != lp->tx_new);
1690
1691 STOP_DEPCA;
1692 depca_init_ring(dev);
1693 LoadCSRs(dev);
1694 InitRestartDepca(dev);
1695 dev->tbusy = 0;
1696 }
1697 } else {
1698 status = -EPERM;
1699 }
1700
1701 break;
1702 case DEPCA_SET_PROM:
1703 if (suser()) {
1704 while(dev->tbusy);
1705 set_bit(0, (void*)&dev->tbusy);
1706 while(lp->tx_old != lp->tx_new);
1707
1708 STOP_DEPCA;
1709 depca_init_ring(dev);
1710 lp->init_block.mode |= PROM;
1711
1712 LoadCSRs(dev);
1713 InitRestartDepca(dev);
1714 dev->tbusy = 0;
1715 } else {
1716 status = -EPERM;
1717 }
1718
1719 break;
1720 case DEPCA_CLR_PROM:
1721 if (suser()) {
1722 while(dev->tbusy);
1723 set_bit(0, (void*)&dev->tbusy);
1724 while(lp->tx_old != lp->tx_new);
1725
1726 STOP_DEPCA;
1727 depca_init_ring(dev);
1728 lp->init_block.mode &= ~PROM;
1729
1730 LoadCSRs(dev);
1731 InitRestartDepca(dev);
1732 dev->tbusy = 0;
1733 } else {
1734 status = -EPERM;
1735 }
1736
1737 break;
1738 case DEPCA_SAY_BOO:
1739 printk("%s: Boo!\n", dev->name);
1740
1741 break;
1742 case DEPCA_GET_MCA:
1743 ioc->len = (HASH_TABLE_LEN >> 3);
1744 if (!(status = verify_area(VERIFY_WRITE, ioc->data, ioc->len))) {
1745 memcpy_tofs(ioc->data, lp->init_block.mcast_table, ioc->len);
1746 }
1747
1748 break;
1749 case DEPCA_SET_MCA:
1750 if (suser()) {
1751 if (ioc->len != HASH_TABLE_LEN) {
1752 if (!(status=verify_area(VERIFY_READ, ioc->data, ETH_ALEN*ioc->len))) {
1753 memcpy_fromfs(tmp.addr, ioc->data, ETH_ALEN * ioc->len);
1754 set_multicast_list(dev, ioc->len, tmp.addr);
1755 }
1756 } else {
1757 set_multicast_list(dev, ioc->len, NULL);
1758 }
1759 } else {
1760 status = -EPERM;
1761 }
1762
1763 break;
1764 case DEPCA_CLR_MCA:
1765 if (suser()) {
1766 set_multicast_list(dev, 0, NULL);
1767 } else {
1768 status = -EPERM;
1769 }
1770
1771 break;
1772 case DEPCA_MCA_EN:
1773 if (suser()) {
1774 set_multicast_list(dev, HASH_TABLE_LEN, NULL);
1775 } else {
1776 status = -EPERM;
1777 }
1778
1779 break;
1780 case DEPCA_GET_STATS:
1781 cli();
1782 ioc->len = sizeof(lp->pktStats);
1783 if (!(status=verify_area(VERIFY_WRITE, ioc->data, ioc->len))) {
1784 memcpy_tofs(ioc->data, &lp->pktStats, ioc->len);
1785 }
1786 sti();
1787
1788 break;
1789 case DEPCA_CLR_STATS:
1790 if (suser()) {
1791 cli();
1792 memset(&lp->pktStats, 0, sizeof(lp->pktStats));
1793 sti();
1794 } else {
1795 status = -EPERM;
1796 }
1797
1798 break;
1799 case DEPCA_GET_REG:
1800 i=0;
1801 tmp.sval[i++] = inw(DEPCA_NICSR);
1802 outw(CSR0, DEPCA_ADDR);
1803 tmp.sval[i++] = inw(DEPCA_DATA);
1804 memcpy(&tmp.sval[i], &lp->init_block, sizeof(struct depca_init));
1805 ioc->len = i+sizeof(struct depca_init);
1806 if (!(status=verify_area(VERIFY_WRITE, ioc->data, ioc->len))) {
1807 memcpy_tofs(ioc->data, tmp.addr, ioc->len);
1808 }
1809
1810 break;
1811 default:
1812 status = -EOPNOTSUPP;
1813 }
1814
1815 return status;
1816 }
1817
1818 #ifdef MODULE
1819 char kernel_version[] = UTS_RELEASE;
1820 static struct device thisDepca = {
1821 " ",
1822 0, 0, 0, 0,
1823 0x200, 7,
1824 0, 0, 0, NULL, depca_probe };
1825
1826 static int irq=7;
1827 static int io=0x200;
1828
1829 int
1830 init_module(void)
1831 {
1832 thisDepca.irq=irq;
1833 thisDepca.base_addr=io;
1834 if (register_netdev(&thisDepca) != 0)
1835 return -EIO;
1836
1837 return 0;
1838 }
1839
1840 void
1841 cleanup_module(void)
1842 {
1843 if (MOD_IN_USE) {
1844 printk("%s: device busy, remove delayed\n",thisDepca.name);
1845 } else {
1846 release_region(thisDepca.base_addr, DEPCA_TOTAL_SIZE);
1847 if (thisDepca.priv) {
1848 kfree_s(thisDepca.priv, sizeof(struct depca_private));
1849 thisDepca.priv = NULL;
1850 }
1851
1852 unregister_netdev(&thisDepca);
1853 }
1854 }
1855 #endif
1856
1857
1858
1859
1860
1861
1862
1863
1864