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*/
1 /* lance.c: An AMD LANCE ethernet driver for linux. */
2 /*
3 Written 1993,1994,1995 by Donald Becker.
4
5 Copyright 1993 United States Government as represented by the
6 Director, National Security Agency.
7 This software may be used and distributed according to the terms
8 of the GNU Public License, incorporated herein by reference.
9
10 This driver is for the Allied Telesis AT1500 and HP J2405A, and should work
11 with most other LANCE-based bus-master (NE2100 clone) ethercards.
12
13 The author may be reached as becker@CESDIS.gsfc.nasa.gov, or C/O
14 Center of Excellence in Space Data and Information Sciences
15 Code 930.5, Goddard Space Flight Center, Greenbelt MD 20771
16 */
17
18 static const char *version = "lance.c:v1.08 4/10/95 dplatt@3do.com\n";
19
20 #include <linux/config.h>
21 #include <linux/kernel.h>
22 #include <linux/sched.h>
23 #include <linux/string.h>
24 #include <linux/ptrace.h>
25 #include <linux/errno.h>
26 #include <linux/ioport.h>
27 #include <linux/malloc.h>
28 #include <linux/interrupt.h>
29 #include <linux/pci.h>
30 #include <linux/bios32.h>
31 #include <asm/bitops.h>
32 #include <asm/io.h>
33 #include <asm/dma.h>
34
35 #include <linux/netdevice.h>
36 #include <linux/etherdevice.h>
37 #include <linux/skbuff.h>
38
39 struct device *init_etherdev(struct device *dev, int sizeof_private,
40 unsigned long *mem_startp);
41 static unsigned int lance_portlist[] = {0x300, 0x320, 0x340, 0x360, 0};
42 unsigned long lance_probe1(int ioaddr, unsigned long mem_start);
43
44 #ifdef HAVE_DEVLIST
45 struct netdev_entry lance_drv =
46 {"lance", lance_probe1, LANCE_TOTAL_SIZE, lance_portlist};
47 #endif
48
49 #ifdef LANCE_DEBUG
50 int lance_debug = LANCE_DEBUG;
51 #else
52 int lance_debug = 1;
53 #endif
54
55 /*
56 Theory of Operation
57
58 I. Board Compatibility
59
60 This device driver is designed for the AMD 79C960, the "PCnet-ISA
61 single-chip ethernet controller for ISA". This chip is used in a wide
62 variety of boards from vendors such as Allied Telesis, HP, Kingston,
63 and Boca. This driver is also intended to work with older AMD 7990
64 designs, such as the NE1500 and NE2100, and newer 79C961. For convenience,
65 I use the name LANCE to refer to all of the AMD chips, even though it properly
66 refers only to the original 7990.
67
68 II. Board-specific settings
69
70 The driver is designed to work the boards that use the faster
71 bus-master mode, rather than in shared memory mode. (Only older designs
72 have on-board buffer memory needed to support the slower shared memory mode.)
73
74 Most ISA boards have jumpered settings for the I/O base, IRQ line, and DMA
75 channel. This driver probes the likely base addresses:
76 {0x300, 0x320, 0x340, 0x360}.
77 After the board is found it generates a DMA-timeout interrupt and uses
78 autoIRQ to find the IRQ line. The DMA channel can be set with the low bits
79 of the otherwise-unused dev->mem_start value (aka PARAM1). If unset it is
80 probed for by enabling each free DMA channel in turn and checking if
81 initialization succeeds.
82
83 The HP-J2405A board is an exception: with this board it's easy to read the
84 EEPROM-set values for the base, IRQ, and DMA. (Of course you must already
85 _know_ the base address -- that field is for writing the EEPROM.)
86
87 III. Driver operation
88
89 IIIa. Ring buffers
90 The LANCE uses ring buffers of Tx and Rx descriptors. Each entry describes
91 the base and length of the data buffer, along with status bits. The length
92 of these buffers is set by LANCE_LOG_{RX,TX}_BUFFERS, which is log_2() of
93 the buffer length (rather than being directly the buffer length) for
94 implementation ease. The current values are 2 (Tx) and 4 (Rx), which leads to
95 ring sizes of 4 (Tx) and 16 (Rx). Increasing the number of ring entries
96 needlessly uses extra space and reduces the chance that an upper layer will
97 be able to reorder queued Tx packets based on priority. Decreasing the number
98 of entries makes it more difficult to achieve back-to-back packet transmission
99 and increases the chance that Rx ring will overflow. (Consider the worst case
100 of receiving back-to-back minimum-sized packets.)
101
102 The LANCE has the capability to "chain" both Rx and Tx buffers, but this driver
103 statically allocates full-sized (slightly oversized -- PKT_BUF_SZ) buffers to
104 avoid the administrative overhead. For the Rx side this avoids dynamically
105 allocating full-sized buffers "just in case", at the expense of a
106 memory-to-memory data copy for each packet received. For most systems this
107 is a good tradeoff: the Rx buffer will always be in low memory, the copy
108 is inexpensive, and it primes the cache for later packet processing. For Tx
109 the buffers are only used when needed as low-memory bounce buffers.
110
111 IIIB. 16M memory limitations.
112 For the ISA bus master mode all structures used directly by the LANCE,
113 the initialization block, Rx and Tx rings, and data buffers, must be
114 accessible from the ISA bus, i.e. in the lower 16M of real memory.
115 This is a problem for current Linux kernels on >16M machines. The network
116 devices are initialized after memory initialization, and the kernel doles out
117 memory from the top of memory downward. The current solution is to have a
118 special network initialization routine that's called before memory
119 initialization; this will eventually be generalized for all network devices.
120 As mentioned before, low-memory "bounce-buffers" are used when needed.
121
122 IIIC. Synchronization
123 The driver runs as two independent, single-threaded flows of control. One
124 is the send-packet routine, which enforces single-threaded use by the
125 dev->tbusy flag. The other thread is the interrupt handler, which is single
126 threaded by the hardware and other software.
127
128 The send packet thread has partial control over the Tx ring and 'dev->tbusy'
129 flag. It sets the tbusy flag whenever it's queuing a Tx packet. If the next
130 queue slot is empty, it clears the tbusy flag when finished otherwise it sets
131 the 'lp->tx_full' flag.
132
133 The interrupt handler has exclusive control over the Rx ring and records stats
134 from the Tx ring. (The Tx-done interrupt can't be selectively turned off, so
135 we can't avoid the interrupt overhead by having the Tx routine reap the Tx
136 stats.) After reaping the stats, it marks the queue entry as empty by setting
137 the 'base' to zero. Iff the 'lp->tx_full' flag is set, it clears both the
138 tx_full and tbusy flags.
139
140 */
141
142 /* Set the number of Tx and Rx buffers, using Log_2(# buffers).
143 Reasonable default values are 4 Tx buffers, and 16 Rx buffers.
144 That translates to 2 (4 == 2^^2) and 4 (16 == 2^^4). */
145 #ifndef LANCE_LOG_TX_BUFFERS
146 #define LANCE_LOG_TX_BUFFERS 4
147 #define LANCE_LOG_RX_BUFFERS 4
148 #endif
149
150 #define TX_RING_SIZE (1 << (LANCE_LOG_TX_BUFFERS))
151 #define TX_RING_MOD_MASK (TX_RING_SIZE - 1)
152 #define TX_RING_LEN_BITS ((LANCE_LOG_TX_BUFFERS) << 29)
153
154 #define RX_RING_SIZE (1 << (LANCE_LOG_RX_BUFFERS))
155 #define RX_RING_MOD_MASK (RX_RING_SIZE - 1)
156 #define RX_RING_LEN_BITS ((LANCE_LOG_RX_BUFFERS) << 29)
157
158 #define PKT_BUF_SZ 1544
159
160 /* Offsets from base I/O address. */
161 #define LANCE_DATA 0x10
162 #define LANCE_ADDR 0x12
163 #define LANCE_RESET 0x14
164 #define LANCE_BUS_IF 0x16
165 #define LANCE_TOTAL_SIZE 0x18
166
167 /* The LANCE Rx and Tx ring descriptors. */
168 struct lance_rx_head {
169 int base;
170 short buf_length; /* This length is 2s complement (negative)! */
171 short msg_length; /* This length is "normal". */
172 };
173
174 struct lance_tx_head {
175 int base;
176 short length; /* Length is 2s complement (negative)! */
177 short misc;
178 };
179
180 /* The LANCE initialization block, described in databook. */
181 struct lance_init_block {
182 unsigned short mode; /* Pre-set mode (reg. 15) */
183 unsigned char phys_addr[6]; /* Physical ethernet address */
184 unsigned filter[2]; /* Multicast filter (unused). */
185 /* Receive and transmit ring base, along with extra bits. */
186 unsigned rx_ring; /* Tx and Rx ring base pointers */
187 unsigned tx_ring;
188 };
189
190 struct lance_private {
191 /* The Tx and Rx ring entries must be aligned on 8-byte boundaries.
192 This is accomplished by allocating 7 extra bytes for the struct
193 and adjusting the start of the struct to be 8-byte aligned. */
194 struct lance_rx_head rx_ring[RX_RING_SIZE];
195 struct lance_tx_head tx_ring[TX_RING_SIZE];
196 struct lance_init_block init_block;
197 const char *name;
198 /* The saved address of a sent-in-place packet/buffer, for skfree(). */
199 struct sk_buff* tx_skbuff[TX_RING_SIZE];
200 long rx_buffs; /* Address of Rx and Tx buffers. */
201 /* Tx low-memory "bounce buffer" address. */
202 char (*tx_bounce_buffs)[PKT_BUF_SZ];
203 int cur_rx, cur_tx; /* The next free ring entry */
204 int dirty_rx, dirty_tx; /* The ring entries to be free()ed. */
205 int dma;
206 struct enet_statistics stats;
207 unsigned char chip_version; /* See lance_chip_type. */
208 char tx_full;
209 char lock;
210 };
211
212 #define LANCE_MUST_PAD 0x00000001
213 #define LANCE_ENABLE_AUTOSELECT 0x00000002
214 #define LANCE_MUST_REINIT_RING 0x00000004
215 #define LANCE_MUST_UNRESET 0x00000008
216 #define LANCE_HAS_MISSED_FRAME 0x00000010
217
218 /* A mapping from the chip ID number to the part number and features.
219 These are from the datasheets -- in real life the '970 version
220 reportedly has the same ID as the '965. */
221 static struct lance_chip_type {
222 int id_number;
223 const char *name;
224 int flags;
225 } chip_table[] = {
226 {0x0000, "LANCE 7990", /* Ancient lance chip. */
227 LANCE_MUST_PAD + LANCE_MUST_UNRESET},
228 {0x0003, "PCnet/ISA 79C960", /* 79C960 PCnet/ISA. */
229 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
230 LANCE_HAS_MISSED_FRAME},
231 {0x2260, "PCnet/ISA+ 79C961", /* 79C961 PCnet/ISA+, Plug-n-Play. */
232 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
233 LANCE_HAS_MISSED_FRAME},
234 {0x2420, "PCnet/PCI 79C970", /* 79C970 or 79C974 PCnet-SCSI, PCI. */
235 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
236 LANCE_HAS_MISSED_FRAME},
237 /* Bug: the PCnet/PCI actually uses the PCnet/VLB ID number, so just call
238 it the PCnet32. */
239 {0x2430, "PCnet32", /* 79C965 PCnet for VL bus. */
240 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
241 LANCE_HAS_MISSED_FRAME},
242 {0x0, "PCnet (unknown)",
243 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
244 LANCE_HAS_MISSED_FRAME},
245 };
246
247 enum {OLD_LANCE = 0, PCNET_ISA=1, PCNET_ISAP=2, PCNET_PCI=3, PCNET_VLB=4, LANCE_UNKNOWN=5};
248
249 /* Non-zero only if the current card is a PCI with BIOS-set IRQ. */
250 static unsigned char pci_irq_line = 0;
251
252 /* Non-zero if lance_probe1() needs to allocate low-memory bounce buffers.
253 Assume yes until we know the memory size. */
254 static unsigned char lance_need_isa_bounce_buffers = 1;
255
256 static int lance_open(struct device *dev);
257 static void lance_init_ring(struct device *dev);
258 static int lance_start_xmit(struct sk_buff *skb, struct device *dev);
259 static int lance_rx(struct device *dev);
260 static void lance_interrupt(int irq, struct pt_regs *regs);
261 static int lance_close(struct device *dev);
262 static struct enet_statistics *lance_get_stats(struct device *dev);
263 #ifdef HAVE_MULTICAST
264 static void set_multicast_list(struct device *dev, int num_addrs, void *addrs);
265 #endif
266
267
268
269 /* This lance probe is unlike the other board probes in 1.0.*. The LANCE may
270 have to allocate a contiguous low-memory region for bounce buffers.
271 This requirement is satisfied by having the lance initialization occur
272 before the memory management system is started, and thus well before the
273 other probes. */
274
275 unsigned long lance_init(unsigned long mem_start, unsigned long mem_end)
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*/
276 {
277 int *port;
278
279 if (mem_end <= 16*1024*1024)
280 lance_need_isa_bounce_buffers = 0;
281
282 #if defined(CONFIG_PCI)
283 if (pcibios_present()) {
284 int pci_index;
285 printk("lance.c: PCI bios is present, checking for devices...\n");
286 for (pci_index = 0; pci_index < 8; pci_index++) {
287 unsigned char pci_bus, pci_device_fn;
288 unsigned long pci_ioaddr;
289 unsigned short pci_command;
290
291 if (pcibios_find_device (PCI_VENDOR_ID_AMD,
292 PCI_DEVICE_ID_AMD_LANCE, pci_index,
293 &pci_bus, &pci_device_fn) != 0)
294 break;
295 pcibios_read_config_byte(pci_bus, pci_device_fn,
296 PCI_INTERRUPT_LINE, &pci_irq_line);
297 pcibios_read_config_dword(pci_bus, pci_device_fn,
298 PCI_BASE_ADDRESS_0, &pci_ioaddr);
299 /* Remove I/O space marker in bit 0. */
300 pci_ioaddr &= ~3;
301 /* PCI Spec 2.1 states that it is either the driver or PCI card's
302 * responsibility to set the PCI Master Enable Bit if needed.
303 * (From Mark Stockton <marks@schooner.sys.hou.compaq.com>)
304 */
305 pcibios_read_config_word(pci_bus, pci_device_fn,
306 PCI_COMMAND, &pci_command);
307 if ( ! (pci_command & PCI_COMMAND_MASTER)) {
308 printk("PCI Master Bit has not been set. Setting...\n");
309 pci_command |= PCI_COMMAND_MASTER;
310 pcibios_write_config_word(pci_bus, pci_device_fn,
311 PCI_COMMAND, pci_command);
312 }
313 printk("Found PCnet/PCI at %#lx, irq %d (mem_start is %#lx).\n",
314 pci_ioaddr, pci_irq_line, mem_start);
315 mem_start = lance_probe1(pci_ioaddr, mem_start);
316 pci_irq_line = 0;
317 }
318 }
319 #endif /* defined(CONFIG_PCI) */
320
321 for (port = lance_portlist; *port; port++) {
322 int ioaddr = *port;
323
324 if ( check_region(ioaddr, LANCE_TOTAL_SIZE) == 0
325 && inb(ioaddr + 14) == 0x57
326 && inb(ioaddr + 15) == 0x57) {
327 mem_start = lance_probe1(ioaddr, mem_start);
328 }
329 }
330
331 return mem_start;
332 }
333
334 unsigned long lance_probe1(int ioaddr, unsigned long mem_start)
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*/
335 {
336 struct device *dev;
337 struct lance_private *lp;
338 short dma_channels; /* Mark spuriously-busy DMA channels */
339 int i, reset_val, lance_version;
340 const char *chipname;
341 /* Flags for specific chips or boards. */
342 unsigned char hpJ2405A = 0; /* HP ISA adaptor */
343 int hp_builtin = 0; /* HP on-board ethernet. */
344 static int did_version = 0; /* Already printed version info. */
345
346 /* First we look for special cases.
347 Check for HP's on-board ethernet by looking for 'HP' in the BIOS.
348 There are two HP versions, check the BIOS for the configuration port.
349 This method provided by L. Julliard, Laurent_Julliard@grenoble.hp.com.
350 */
351 if ( *((unsigned short *) 0x000f0102) == 0x5048) {
352 static const short ioaddr_table[] = { 0x300, 0x320, 0x340, 0x360};
353 int hp_port = ( *((unsigned char *) 0x000f00f1) & 1) ? 0x499 : 0x99;
354 /* We can have boards other than the built-in! Verify this is on-board. */
355 if ((inb(hp_port) & 0xc0) == 0x80
356 && ioaddr_table[inb(hp_port) & 3] == ioaddr)
357 hp_builtin = hp_port;
358 }
359 /* We also recognize the HP Vectra on-board here, but check below. */
360 hpJ2405A = (inb(ioaddr) == 0x08 && inb(ioaddr+1) == 0x00
361 && inb(ioaddr+2) == 0x09);
362
363 /* Reset the LANCE. */
364 reset_val = inw(ioaddr+LANCE_RESET); /* Reset the LANCE */
365
366 /* The Un-Reset needed is only needed for the real NE2100, and will
367 confuse the HP board. */
368 if (!hpJ2405A)
369 outw(reset_val, ioaddr+LANCE_RESET);
370
371 outw(0x0000, ioaddr+LANCE_ADDR); /* Switch to window 0 */
372 if (inw(ioaddr+LANCE_DATA) != 0x0004)
373 return mem_start;
374
375 /* Get the version of the chip. */
376 outw(88, ioaddr+LANCE_ADDR);
377 if (inw(ioaddr+LANCE_ADDR) != 88) {
378 lance_version = 0;
379 } else { /* Good, it's a newer chip. */
380 int chip_version = inw(ioaddr+LANCE_DATA);
381 outw(89, ioaddr+LANCE_ADDR);
382 chip_version |= inw(ioaddr+LANCE_DATA) << 16;
383 if (lance_debug > 2)
384 printk(" LANCE chip version is %#x.\n", chip_version);
385 if ((chip_version & 0xfff) != 0x003)
386 return mem_start;
387 chip_version = (chip_version >> 12) & 0xffff;
388 for (lance_version = 1; chip_table[lance_version].id_number; lance_version++) {
389 if (chip_table[lance_version].id_number == chip_version)
390 break;
391 }
392 }
393
394 dev = init_etherdev(0, 7
395 + ((sizeof(struct lance_private) + 7) & ~7)
396 + PKT_BUF_SZ*RX_RING_SIZE
397 + (lance_need_isa_bounce_buffers
398 ? PKT_BUF_SZ*TX_RING_SIZE
399 : 0),
400 &mem_start);
401
402 chipname = chip_table[lance_version].name;
403 printk("%s: %s at %#3x,", dev->name, chipname, ioaddr);
404
405 /* There is a 16 byte station address PROM at the base address.
406 The first six bytes are the station address. */
407 for (i = 0; i < 6; i++)
408 printk(" %2.2x", dev->dev_addr[i] = inb(ioaddr + i));
409
410 dev->base_addr = ioaddr;
411 request_region(ioaddr, LANCE_TOTAL_SIZE, chip_table[lance_version].name);
412
413 /* Make certain the data structures used by the LANCE are aligned. */
414 dev->priv = (void *)(((int)dev->priv + 7) & ~7);
415 lp = (struct lance_private *)dev->priv;
416 lp->name = chipname;
417 lp->rx_buffs = (long)lp + ((sizeof(struct lance_private) + 7) & ~7);
418 lp->tx_bounce_buffs = (char (*)[PKT_BUF_SZ])
419 (lp->rx_buffs + PKT_BUF_SZ*RX_RING_SIZE);
420
421 lp->chip_version = lance_version;
422
423 lp->init_block.mode = 0x0003; /* Disable Rx and Tx. */
424 for (i = 0; i < 6; i++)
425 lp->init_block.phys_addr[i] = dev->dev_addr[i];
426 lp->init_block.filter[0] = 0x00000000;
427 lp->init_block.filter[1] = 0x00000000;
428 lp->init_block.rx_ring = (int)lp->rx_ring | RX_RING_LEN_BITS;
429 lp->init_block.tx_ring = (int)lp->tx_ring | TX_RING_LEN_BITS;
430
431 outw(0x0001, ioaddr+LANCE_ADDR);
432 inw(ioaddr+LANCE_ADDR);
433 outw((short) (int) &lp->init_block, ioaddr+LANCE_DATA);
434 outw(0x0002, ioaddr+LANCE_ADDR);
435 inw(ioaddr+LANCE_ADDR);
436 outw(((int)&lp->init_block) >> 16, ioaddr+LANCE_DATA);
437 outw(0x0000, ioaddr+LANCE_ADDR);
438 inw(ioaddr+LANCE_ADDR);
439
440 if (pci_irq_line) {
441 dev->dma = 4; /* Native bus-master, no DMA channel needed. */
442 dev->irq = pci_irq_line;
443 } else if (hp_builtin) {
444 static const char dma_tbl[4] = {3, 5, 6, 0};
445 static const char irq_tbl[4] = {3, 4, 5, 9};
446 unsigned char port_val = inb(hp_builtin);
447 dev->dma = dma_tbl[(port_val >> 4) & 3];
448 dev->irq = irq_tbl[(port_val >> 2) & 3];
449 printk(" HP Vectra IRQ %d DMA %d.\n", dev->irq, dev->dma);
450 } else if (hpJ2405A) {
451 static const char dma_tbl[4] = {3, 5, 6, 7};
452 static const char irq_tbl[8] = {3, 4, 5, 9, 10, 11, 12, 15};
453 short reset_val = inw(ioaddr+LANCE_RESET);
454 dev->dma = dma_tbl[(reset_val >> 2) & 3];
455 dev->irq = irq_tbl[(reset_val >> 4) & 7];
456 printk(" HP J2405A IRQ %d DMA %d.\n", dev->irq, dev->dma);
457 } else if (lance_version == PCNET_ISAP) { /* The plug-n-play version. */
458 short bus_info;
459 outw(8, ioaddr+LANCE_ADDR);
460 bus_info = inw(ioaddr+LANCE_BUS_IF);
461 dev->dma = bus_info & 0x07;
462 dev->irq = (bus_info >> 4) & 0x0F;
463 } else {
464 /* The DMA channel may be passed in PARAM1. */
465 if (dev->mem_start & 0x07)
466 dev->dma = dev->mem_start & 0x07;
467 }
468
469 if (dev->dma == 0) {
470 /* Read the DMA channel status register, so that we can avoid
471 stuck DMA channels in the DMA detection below. */
472 dma_channels = ((inb(DMA1_STAT_REG) >> 4) & 0x0f) |
473 (inb(DMA2_STAT_REG) & 0xf0);
474 }
475 if (dev->irq >= 2)
476 printk(" assigned IRQ %d", dev->irq);
477 else {
478 /* To auto-IRQ we enable the initialization-done and DMA error
479 interrupts. For ISA boards we get a DMA error, but VLB and PCI
480 boards will work. */
481 autoirq_setup(0);
482
483 /* Trigger an initialization just for the interrupt. */
484 outw(0x0041, ioaddr+LANCE_DATA);
485
486 dev->irq = autoirq_report(1);
487 if (dev->irq)
488 printk(", probed IRQ %d", dev->irq);
489 else {
490 printk(", failed to detect IRQ line.\n");
491 return mem_start;
492 }
493
494 /* Check for the initialization done bit, 0x0100, which means
495 that we don't need a DMA channel. */
496 if (inw(ioaddr+LANCE_DATA) & 0x0100)
497 dev->dma = 4;
498 }
499
500 if (dev->dma == 4) {
501 printk(", no DMA needed.\n");
502 } else if (dev->dma) {
503 if (request_dma(dev->dma, chipname)) {
504 printk("DMA %d allocation failed.\n", dev->dma);
505 return mem_start;
506 } else
507 printk(", assigned DMA %d.\n", dev->dma);
508 } else { /* OK, we have to auto-DMA. */
509 for (i = 0; i < 4; i++) {
510 static const char dmas[] = { 5, 6, 7, 3 };
511 int dma = dmas[i];
512 int boguscnt;
513
514 /* Don't enable a permanently busy DMA channel, or the machine
515 will hang. */
516 if (test_bit(dma, &dma_channels))
517 continue;
518 outw(0x7f04, ioaddr+LANCE_DATA); /* Clear the memory error bits. */
519 if (request_dma(dma, chipname))
520 continue;
521 set_dma_mode(dma, DMA_MODE_CASCADE);
522 enable_dma(dma);
523
524 /* Trigger an initialization. */
525 outw(0x0001, ioaddr+LANCE_DATA);
526 for (boguscnt = 100; boguscnt > 0; --boguscnt)
527 if (inw(ioaddr+LANCE_DATA) & 0x0900)
528 break;
529 if (inw(ioaddr+LANCE_DATA) & 0x0100) {
530 dev->dma = dma;
531 printk(", DMA %d.\n", dev->dma);
532 break;
533 } else {
534 disable_dma(dma);
535 free_dma(dma);
536 }
537 }
538 if (i == 4) { /* Failure: bail. */
539 printk("DMA detection failed.\n");
540 return mem_start;
541 }
542 }
543
544 if (chip_table[lp->chip_version].flags & LANCE_ENABLE_AUTOSELECT) {
545 /* Turn on auto-select of media (10baseT or BNC) so that the user
546 can watch the LEDs even if the board isn't opened. */
547 outw(0x0002, ioaddr+LANCE_ADDR);
548 outw(0x0002, ioaddr+LANCE_BUS_IF);
549 }
550
551 if (lance_debug > 0 && did_version++ == 0)
552 printk(version);
553
554 /* The LANCE-specific entries in the device structure. */
555 dev->open = &lance_open;
556 dev->hard_start_xmit = &lance_start_xmit;
557 dev->stop = &lance_close;
558 dev->get_stats = &lance_get_stats;
559 dev->set_multicast_list = &set_multicast_list;
560
561 return mem_start;
562 }
563
564
565 static int
566 lance_open(struct device *dev)
/* */
567 {
568 struct lance_private *lp = (struct lance_private *)dev->priv;
569 int ioaddr = dev->base_addr;
570 int i;
571
572 if (dev->irq == 0 ||
573 request_irq(dev->irq, &lance_interrupt, 0, lp->name)) {
574 return -EAGAIN;
575 }
576
577 /* We used to allocate DMA here, but that was silly.
578 DMA lines can't be shared! We now permanently snarf them. */
579
580 irq2dev_map[dev->irq] = dev;
581
582 /* Reset the LANCE */
583 inw(ioaddr+LANCE_RESET);
584
585 /* The DMA controller is used as a no-operation slave, "cascade mode". */
586 if (dev->dma != 4) {
587 enable_dma(dev->dma);
588 set_dma_mode(dev->dma, DMA_MODE_CASCADE);
589 }
590
591 /* Un-Reset the LANCE, needed only for the NE2100. */
592 if (chip_table[lp->chip_version].flags & LANCE_MUST_UNRESET)
593 outw(0, ioaddr+LANCE_RESET);
594
595 if (chip_table[lp->chip_version].flags & LANCE_ENABLE_AUTOSELECT) {
596 /* This is 79C960-specific: Turn on auto-select of media (AUI, BNC). */
597 outw(0x0002, ioaddr+LANCE_ADDR);
598 outw(0x0002, ioaddr+LANCE_BUS_IF);
599 }
600
601 if (lance_debug > 1)
602 printk("%s: lance_open() irq %d dma %d tx/rx rings %#x/%#x init %#x.\n",
603 dev->name, dev->irq, dev->dma, (int) lp->tx_ring, (int) lp->rx_ring,
604 (int) &lp->init_block);
605
606 lance_init_ring(dev);
607 /* Re-initialize the LANCE, and start it when done. */
608 outw(0x0001, ioaddr+LANCE_ADDR);
609 outw((short) (int) &lp->init_block, ioaddr+LANCE_DATA);
610 outw(0x0002, ioaddr+LANCE_ADDR);
611 outw(((int)&lp->init_block) >> 16, ioaddr+LANCE_DATA);
612
613 outw(0x0004, ioaddr+LANCE_ADDR);
614 outw(0x0915, ioaddr+LANCE_DATA);
615
616 outw(0x0000, ioaddr+LANCE_ADDR);
617 outw(0x0001, ioaddr+LANCE_DATA);
618
619 dev->tbusy = 0;
620 dev->interrupt = 0;
621 dev->start = 1;
622 i = 0;
623 while (i++ < 100)
624 if (inw(ioaddr+LANCE_DATA) & 0x0100)
625 break;
626 /*
627 * We used to clear the InitDone bit, 0x0100, here but Mark Stockton
628 * reports that doing so triggers a bug in the '974.
629 */
630 outw(0x0042, ioaddr+LANCE_DATA);
631
632 if (lance_debug > 2)
633 printk("%s: LANCE open after %d ticks, init block %#x csr0 %4.4x.\n",
634 dev->name, i, (int) &lp->init_block, inw(ioaddr+LANCE_DATA));
635
636 return 0; /* Always succeed */
637 }
638
639 /* The LANCE has been halted for one reason or another (busmaster memory
640 arbitration error, Tx FIFO underflow, driver stopped it to reconfigure,
641 etc.). Modern LANCE variants always reload their ring-buffer
642 configuration when restarted, so we must reinitialize our ring
643 context before restarting. As part of this reinitialization,
644 find all packets still on the Tx ring and pretend that they had been
645 sent (in effect, drop the packets on the floor) - the higher-level
646 protocols will time out and retransmit. It'd be better to shuffle
647 these skbs to a temp list and then actually re-Tx them after
648 restarting the chip, but I'm too lazy to do so right now. dplatt@3do.com
649 */
650
651 static void
652 lance_purge_tx_ring(struct device *dev)
/* */
653 {
654 struct lance_private *lp = (struct lance_private *)dev->priv;
655 int i;
656
657 for (i = 0; i < TX_RING_SIZE; i++) {
658 if (lp->tx_skbuff[i]) {
659 dev_kfree_skb(lp->tx_skbuff[i],FREE_WRITE);
660 lp->tx_skbuff[i] = NULL;
661 }
662 }
663 }
664
665
666 /* Initialize the LANCE Rx and Tx rings. */
667 static void
668 lance_init_ring(struct device *dev)
/* */
669 {
670 struct lance_private *lp = (struct lance_private *)dev->priv;
671 int i;
672
673 lp->lock = 0, lp->tx_full = 0;
674 lp->cur_rx = lp->cur_tx = 0;
675 lp->dirty_rx = lp->dirty_tx = 0;
676
677 for (i = 0; i < RX_RING_SIZE; i++) {
678 lp->rx_ring[i].base = (lp->rx_buffs + i*PKT_BUF_SZ) | 0x80000000;
679 lp->rx_ring[i].buf_length = -PKT_BUF_SZ;
680 }
681 /* The Tx buffer address is filled in as needed, but we do need to clear
682 the upper ownership bit. */
683 for (i = 0; i < TX_RING_SIZE; i++) {
684 lp->tx_ring[i].base = 0;
685 }
686
687 lp->init_block.mode = 0x0000;
688 for (i = 0; i < 6; i++)
689 lp->init_block.phys_addr[i] = dev->dev_addr[i];
690 lp->init_block.filter[0] = 0x00000000;
691 lp->init_block.filter[1] = 0x00000000;
692 lp->init_block.rx_ring = (int)lp->rx_ring | RX_RING_LEN_BITS;
693 lp->init_block.tx_ring = (int)lp->tx_ring | TX_RING_LEN_BITS;
694 }
695
696 static void
697 lance_restart(struct device *dev, unsigned int csr0_bits, int must_reinit)
/* */
698 {
699 struct lance_private *lp = (struct lance_private *)dev->priv;
700
701 if (must_reinit ||
702 (chip_table[lp->chip_version].flags & LANCE_MUST_REINIT_RING)) {
703 lance_purge_tx_ring(dev);
704 lance_init_ring(dev);
705 }
706 outw(0x0000, dev->base_addr + LANCE_ADDR);
707 outw(csr0_bits, dev->base_addr + LANCE_DATA);
708 }
709
710 static int
711 lance_start_xmit(struct sk_buff *skb, struct device *dev)
/* */
712 {
713 struct lance_private *lp = (struct lance_private *)dev->priv;
714 int ioaddr = dev->base_addr;
715 int entry;
716 unsigned long flags;
717
718 /* Transmitter timeout, serious problems. */
719 if (dev->tbusy) {
720 int tickssofar = jiffies - dev->trans_start;
721 if (tickssofar < 20)
722 return 1;
723 outw(0, ioaddr+LANCE_ADDR);
724 printk("%s: transmit timed out, status %4.4x, resetting.\n",
725 dev->name, inw(ioaddr+LANCE_DATA));
726 outw(0x0004, ioaddr+LANCE_DATA);
727 lp->stats.tx_errors++;
728 #ifndef final_version
729 {
730 int i;
731 printk(" Ring data dump: dirty_tx %d cur_tx %d%s cur_rx %d.",
732 lp->dirty_tx, lp->cur_tx, lp->tx_full ? " (full)" : "",
733 lp->cur_rx);
734 for (i = 0 ; i < RX_RING_SIZE; i++)
735 printk("%s %08x %04x %04x", i & 0x3 ? "" : "\n ",
736 lp->rx_ring[i].base, -lp->rx_ring[i].buf_length,
737 lp->rx_ring[i].msg_length);
738 for (i = 0 ; i < TX_RING_SIZE; i++)
739 printk("%s %08x %04x %04x", i & 0x3 ? "" : "\n ",
740 lp->tx_ring[i].base, -lp->tx_ring[i].length,
741 lp->tx_ring[i].misc);
742 printk("\n");
743 }
744 #endif
745 lance_restart(dev, 0x0043, 1);
746
747 dev->tbusy=0;
748 dev->trans_start = jiffies;
749
750 return 0;
751 }
752
753 if (skb == NULL) {
754 dev_tint(dev);
755 return 0;
756 }
757
758 if (skb->len <= 0)
759 return 0;
760
761 if (lance_debug > 3) {
762 outw(0x0000, ioaddr+LANCE_ADDR);
763 printk("%s: lance_start_xmit() called, csr0 %4.4x.\n", dev->name,
764 inw(ioaddr+LANCE_DATA));
765 outw(0x0000, ioaddr+LANCE_DATA);
766 }
767
768 /* Block a timer-based transmit from overlapping. This could better be
769 done with atomic_swap(1, dev->tbusy), but set_bit() works as well. */
770 if (set_bit(0, (void*)&dev->tbusy) != 0) {
771 printk("%s: Transmitter access conflict.\n", dev->name);
772 return 1;
773 }
774
775 if (set_bit(0, (void*)&lp->lock) != 0) {
776 if (lance_debug > 0)
777 printk("%s: tx queue lock!.\n", dev->name);
778 /* don't clear dev->tbusy flag. */
779 return 1;
780 }
781
782 /* Fill in a Tx ring entry */
783
784 /* Mask to ring buffer boundary. */
785 entry = lp->cur_tx & TX_RING_MOD_MASK;
786
787 /* Caution: the write order is important here, set the base address
788 with the "ownership" bits last. */
789
790 /* The old LANCE chips doesn't automatically pad buffers to min. size. */
791 if (chip_table[lp->chip_version].flags & LANCE_MUST_PAD) {
792 lp->tx_ring[entry].length =
793 -(ETH_ZLEN < skb->len ? skb->len : ETH_ZLEN);
794 } else
795 lp->tx_ring[entry].length = -skb->len;
796
797 lp->tx_ring[entry].misc = 0x0000;
798
799 /* If any part of this buffer is >16M we must copy it to a low-memory
800 buffer. */
801 if ((int)(skb->data) + skb->len > 0x01000000) {
802 if (lance_debug > 5)
803 printk("%s: bouncing a high-memory packet (%#x).\n",
804 dev->name, (int)(skb->data));
805 memcpy(&lp->tx_bounce_buffs[entry], skb->data, skb->len);
806 lp->tx_ring[entry].base =
807 (int)(lp->tx_bounce_buffs + entry) | 0x83000000;
808 dev_kfree_skb (skb, FREE_WRITE);
809 } else {
810 lp->tx_skbuff[entry] = skb;
811 lp->tx_ring[entry].base = (int)(skb->data) | 0x83000000;
812 }
813 lp->cur_tx++;
814
815 /* Trigger an immediate send poll. */
816 outw(0x0000, ioaddr+LANCE_ADDR);
817 outw(0x0048, ioaddr+LANCE_DATA);
818
819 dev->trans_start = jiffies;
820
821 save_flags(flags);
822 cli();
823 lp->lock = 0;
824 if (lp->tx_ring[(entry+1) & TX_RING_MOD_MASK].base == 0)
825 dev->tbusy=0;
826 else
827 lp->tx_full = 1;
828 restore_flags(flags);
829
830 return 0;
831 }
832
833 /* The LANCE interrupt handler. */
834 static void
835 lance_interrupt(int irq, struct pt_regs * regs)
/* */
836 {
837 struct device *dev = (struct device *)(irq2dev_map[irq]);
838 struct lance_private *lp;
839 int csr0, ioaddr, boguscnt=10;
840 int must_restart;
841
842 if (dev == NULL) {
843 printk ("lance_interrupt(): irq %d for unknown device.\n", irq);
844 return;
845 }
846
847 ioaddr = dev->base_addr;
848 lp = (struct lance_private *)dev->priv;
849 if (dev->interrupt)
850 printk("%s: Re-entering the interrupt handler.\n", dev->name);
851
852 dev->interrupt = 1;
853
854 outw(0x00, dev->base_addr + LANCE_ADDR);
855 while ((csr0 = inw(dev->base_addr + LANCE_DATA)) & 0x8600
856 && --boguscnt >= 0) {
857 /* Acknowledge all of the current interrupt sources ASAP. */
858 outw(csr0 & ~0x004f, dev->base_addr + LANCE_DATA);
859
860 must_restart = 0;
861
862 if (lance_debug > 5)
863 printk("%s: interrupt csr0=%#2.2x new csr=%#2.2x.\n",
864 dev->name, csr0, inw(dev->base_addr + LANCE_DATA));
865
866 if (csr0 & 0x0400) /* Rx interrupt */
867 lance_rx(dev);
868
869 if (csr0 & 0x0200) { /* Tx-done interrupt */
870 int dirty_tx = lp->dirty_tx;
871
872 while (dirty_tx < lp->cur_tx) {
873 int entry = dirty_tx & TX_RING_MOD_MASK;
874 int status = lp->tx_ring[entry].base;
875
876 if (status < 0)
877 break; /* It still hasn't been Txed */
878
879 lp->tx_ring[entry].base = 0;
880
881 if (status & 0x40000000) {
882 /* There was an major error, log it. */
883 int err_status = lp->tx_ring[entry].misc;
884 lp->stats.tx_errors++;
885 if (err_status & 0x0400) lp->stats.tx_aborted_errors++;
886 if (err_status & 0x0800) lp->stats.tx_carrier_errors++;
887 if (err_status & 0x1000) lp->stats.tx_window_errors++;
888 if (err_status & 0x4000) {
889 /* Ackk! On FIFO errors the Tx unit is turned off! */
890 lp->stats.tx_fifo_errors++;
891 /* Remove this verbosity later! */
892 printk("%s: Tx FIFO error! Status %4.4x.\n",
893 dev->name, csr0);
894 /* Restart the chip. */
895 must_restart = 1;
896 }
897 } else {
898 if (status & 0x18000000)
899 lp->stats.collisions++;
900 lp->stats.tx_packets++;
901 }
902
903 /* We must free the original skb if it's not a data-only copy
904 in the bounce buffer. */
905 if (lp->tx_skbuff[entry]) {
906 dev_kfree_skb(lp->tx_skbuff[entry],FREE_WRITE);
907 lp->tx_skbuff[entry] = 0;
908 }
909 dirty_tx++;
910 }
911
912 #ifndef final_version
913 if (lp->cur_tx - dirty_tx >= TX_RING_SIZE) {
914 printk("out-of-sync dirty pointer, %d vs. %d, full=%d.\n",
915 dirty_tx, lp->cur_tx, lp->tx_full);
916 dirty_tx += TX_RING_SIZE;
917 }
918 #endif
919
920 if (lp->tx_full && dev->tbusy
921 && dirty_tx > lp->cur_tx - TX_RING_SIZE + 2) {
922 /* The ring is no longer full, clear tbusy. */
923 lp->tx_full = 0;
924 dev->tbusy = 0;
925 mark_bh(NET_BH);
926 }
927
928 lp->dirty_tx = dirty_tx;
929 }
930
931 /* Log misc errors. */
932 if (csr0 & 0x4000) lp->stats.tx_errors++; /* Tx babble. */
933 if (csr0 & 0x1000) lp->stats.rx_errors++; /* Missed a Rx frame. */
934 if (csr0 & 0x0800) {
935 printk("%s: Bus master arbitration failure, status %4.4x.\n",
936 dev->name, csr0);
937 /* Restart the chip. */
938 must_restart = 1;
939 }
940
941 if (must_restart) {
942 /* stop the chip to clear the error condition, then restart */
943 outw(0x0000, dev->base_addr + LANCE_ADDR);
944 outw(0x0004, dev->base_addr + LANCE_DATA);
945 lance_restart(dev, 0x0002, 0);
946 }
947 }
948
949 /* Clear any other interrupt, and set interrupt enable. */
950 outw(0x0000, dev->base_addr + LANCE_ADDR);
951 outw(0x7940, dev->base_addr + LANCE_DATA);
952
953 if (lance_debug > 4)
954 printk("%s: exiting interrupt, csr%d=%#4.4x.\n",
955 dev->name, inw(ioaddr + LANCE_ADDR),
956 inw(dev->base_addr + LANCE_DATA));
957
958 dev->interrupt = 0;
959 return;
960 }
961
962 static int
963 lance_rx(struct device *dev)
/* */
964 {
965 struct lance_private *lp = (struct lance_private *)dev->priv;
966 int entry = lp->cur_rx & RX_RING_MOD_MASK;
967 int i;
968
969 /* If we own the next entry, it's a new packet. Send it up. */
970 while (lp->rx_ring[entry].base >= 0) {
971 int status = lp->rx_ring[entry].base >> 24;
972
973 if (status != 0x03) { /* There was an error. */
974 /* There is a tricky error noted by John Murphy,
975 <murf@perftech.com> to Russ Nelson: Even with full-sized
976 buffers it's possible for a jabber packet to use two
977 buffers, with only the last correctly noting the error. */
978 if (status & 0x01) /* Only count a general error at the */
979 lp->stats.rx_errors++; /* end of a packet.*/
980 if (status & 0x20) lp->stats.rx_frame_errors++;
981 if (status & 0x10) lp->stats.rx_over_errors++;
982 if (status & 0x08) lp->stats.rx_crc_errors++;
983 if (status & 0x04) lp->stats.rx_fifo_errors++;
984 lp->rx_ring[entry].base &= 0x03ffffff;
985 } else {
986 /* Malloc up new buffer, compatible with net-2e. */
987 short pkt_len = (lp->rx_ring[entry].msg_length & 0xfff)-4;
988 struct sk_buff *skb;
989
990 skb = dev_alloc_skb(pkt_len+2);
991 if (skb == NULL) {
992 printk("%s: Memory squeeze, deferring packet.\n", dev->name);
993 for (i=0; i < RX_RING_SIZE; i++)
994 if (lp->rx_ring[(entry+i) & RX_RING_MOD_MASK].base < 0)
995 break;
996
997 if (i > RX_RING_SIZE -2) {
998 lp->stats.rx_dropped++;
999 lp->rx_ring[entry].base |= 0x80000000;
1000 lp->cur_rx++;
1001 }
1002 break;
1003 }
1004 skb->dev = dev;
1005 skb_reserve(skb,2); /* 16 byte align */
1006 skb_put(skb,pkt_len); /* Make room */
1007 eth_copy_and_sum(skb,
1008 (unsigned char *)(lp->rx_ring[entry].base & 0x00ffffff),
1009 pkt_len,0);
1010 skb->protocol=eth_type_trans(skb,dev);
1011 netif_rx(skb);
1012 lp->stats.rx_packets++;
1013 }
1014
1015 /* The docs say that the buffer length isn't touched, but Andrew Boyd
1016 of QNX reports that some revs of the 79C965 clear it. */
1017 lp->rx_ring[entry].buf_length = -PKT_BUF_SZ;
1018 lp->rx_ring[entry].base |= 0x80000000;
1019 entry = (++lp->cur_rx) & RX_RING_MOD_MASK;
1020 }
1021
1022 /* We should check that at least two ring entries are free. If not,
1023 we should free one and mark stats->rx_dropped++. */
1024
1025 return 0;
1026 }
1027
1028 static int
1029 lance_close(struct device *dev)
/* */
1030 {
1031 int ioaddr = dev->base_addr;
1032 struct lance_private *lp = (struct lance_private *)dev->priv;
1033
1034 dev->start = 0;
1035 dev->tbusy = 1;
1036
1037 if (chip_table[lp->chip_version].flags & LANCE_HAS_MISSED_FRAME) {
1038 outw(112, ioaddr+LANCE_ADDR);
1039 lp->stats.rx_missed_errors = inw(ioaddr+LANCE_DATA);
1040 }
1041 outw(0, ioaddr+LANCE_ADDR);
1042
1043 if (lance_debug > 1)
1044 printk("%s: Shutting down ethercard, status was %2.2x.\n",
1045 dev->name, inw(ioaddr+LANCE_DATA));
1046
1047 /* We stop the LANCE here -- it occasionally polls
1048 memory if we don't. */
1049 outw(0x0004, ioaddr+LANCE_DATA);
1050
1051 if (dev->dma != 4)
1052 disable_dma(dev->dma);
1053
1054 free_irq(dev->irq);
1055
1056 irq2dev_map[dev->irq] = 0;
1057
1058 return 0;
1059 }
1060
1061 static struct enet_statistics *
1062 lance_get_stats(struct device *dev)
/* */
1063 {
1064 struct lance_private *lp = (struct lance_private *)dev->priv;
1065 short ioaddr = dev->base_addr;
1066 short saved_addr;
1067 unsigned long flags;
1068
1069 if (chip_table[lp->chip_version].flags & LANCE_HAS_MISSED_FRAME) {
1070 save_flags(flags);
1071 cli();
1072 saved_addr = inw(ioaddr+LANCE_ADDR);
1073 outw(112, ioaddr+LANCE_ADDR);
1074 lp->stats.rx_missed_errors = inw(ioaddr+LANCE_DATA);
1075 outw(saved_addr, ioaddr+LANCE_ADDR);
1076 restore_flags(flags);
1077 }
1078
1079 return &lp->stats;
1080 }
1081
1082 /* Set or clear the multicast filter for this adaptor.
1083 num_addrs == -1 Promiscuous mode, receive all packets
1084 num_addrs == 0 Normal mode, clear multicast list
1085 num_addrs > 0 Multicast mode, receive normal and MC packets, and do
1086 best-effort filtering.
1087 */
1088 static void
1089 set_multicast_list(struct device *dev, int num_addrs, void *addrs)
/* ![[last]](../icons/n_last.png)
*/
1090 {
1091 short ioaddr = dev->base_addr;
1092
1093 outw(0, ioaddr+LANCE_ADDR);
1094 outw(0x0004, ioaddr+LANCE_DATA); /* Temporarily stop the lance. */
1095
1096 if (num_addrs >= 0) {
1097 short multicast_table[4];
1098 int i;
1099 /* We don't use the multicast table, but rely on upper-layer filtering. */
1100 memset(multicast_table, (num_addrs == 0) ? 0 : -1, sizeof(multicast_table));
1101 for (i = 0; i < 4; i++) {
1102 outw(8 + i, ioaddr+LANCE_ADDR);
1103 outw(multicast_table[i], ioaddr+LANCE_DATA);
1104 }
1105 outw(15, ioaddr+LANCE_ADDR);
1106 outw(0x0000, ioaddr+LANCE_DATA); /* Unset promiscuous mode */
1107 } else {
1108 /* Log any net taps. */
1109 printk("%s: Promiscuous mode enabled.\n", dev->name);
1110 outw(15, ioaddr+LANCE_ADDR);
1111 outw(0x8000, ioaddr+LANCE_DATA); /* Set promiscuous mode */
1112 }
1113
1114 lance_restart(dev, 0x0142, 0); /* Resume normal operation */
1115
1116 }
1117
1118
1119 /*
1120 * Local variables:
1121 * compile-command: "gcc -D__KERNEL__ -I/usr/src/linux/net/inet -Wall -Wstrict-prototypes -O6 -m486 -c lance.c"
1122 * c-indent-level: 4
1123 * tab-width: 4
1124 * End:
1125 */
![[bottom]](../icons/n_bottom.png){kind=icon}
*/