This source file includes following definitions.
- xchg_u32
- xchg_u64
- __xchg
1 #ifndef __ALPHA_SYSTEM_H
2 #define __ALPHA_SYSTEM_H
3
4 #include <asm/pal.h>
5
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16
17
18 #define BOOT_PCB 0x20000000
19 #define BOOT_ADDR 0x20000000
20 #define BOOT_SIZE (16*1024)
21
22 #define KERNEL_START 0xfffffc0000300000
23 #define SWAPPER_PGD 0xfffffc0000300000
24 #define INIT_STACK 0xfffffc0000302000
25 #define EMPTY_PGT 0xfffffc0000304000
26 #define EMPTY_PGE 0xfffffc0000308000
27 #define ZERO_PGE 0xfffffc000030A000
28
29 #define START_ADDR 0xfffffc0000310000
30 #define START_SIZE (2*1024*1024)
31
32 #ifndef __ASSEMBLY__
33
34 extern void wrent(void *, unsigned long);
35 extern void wrkgp(unsigned long);
36 extern void wrusp(unsigned long);
37 extern unsigned long rdusp(void);
38 extern unsigned long rdmces (void);
39 extern void wrmces (unsigned long);
40
41 #define halt() __asm__ __volatile__(".long 0");
42
43 extern void alpha_switch_to(unsigned long pctxp);
44
45 #define switch_to(p) do { \
46 current = p; \
47 alpha_switch_to((unsigned long) &(p)->tss - 0xfffffc0000000000); \
48 } while (0)
49
50 #define mb() \
51 __asm__ __volatile__("mb": : :"memory")
52
53 #define draina() \
54 __asm__ __volatile__ ("call_pal %0" : : "i" (PAL_draina) : "memory")
55
56 #define getipl() \
57 ({ unsigned long __old_ipl; \
58 __asm__ __volatile__( \
59 "call_pal 54\n\t" \
60 "bis $0,$0,%0" \
61 : "=r" (__old_ipl) \
62 : : "$0", "$1", "$16", "$22", "$23", "$24", "$25"); \
63 __old_ipl; })
64
65 #define setipl(__new_ipl) \
66 __asm__ __volatile__( \
67 "bis %0,%0,$16\n\t" \
68 "call_pal 53" \
69 : : "r" (__new_ipl) \
70 : "$0", "$1", "$16", "$22", "$23", "$24", "$25")
71
72 #define swpipl(__new_ipl) \
73 ({ unsigned long __old_ipl; \
74 __asm__ __volatile__( \
75 "bis %1,%1,$16\n\t" \
76 "call_pal 53\n\t" \
77 "bis $0,$0,%0" \
78 : "=r" (__old_ipl) \
79 : "r" (__new_ipl) \
80 : "$0", "$1", "$16", "$22", "$23", "$24", "$25"); \
81 __old_ipl; })
82
83 #define cli() setipl(7)
84 #define sti() setipl(0)
85 #define save_flags(flags) do { flags = getipl(); } while (0)
86 #define restore_flags(flags) setipl(flags)
87
88 extern inline unsigned long xchg_u32(volatile int * m, unsigned long val)
89 {
90 unsigned long dummy, dummy2;
91
92 __asm__ __volatile__(
93 "\n1:\t"
94 "ldl_l %0,%1\n\t"
95 "bis %2,%2,%3\n\t"
96 "stl_c %3,%1\n\t"
97 "beq %3,1b\n"
98 : "=r" (val), "=m" (*m), "=r" (dummy), "=r" (dummy2)
99 : "1" (*m), "2" (val));
100 return val;
101 }
102
103 extern inline unsigned long xchg_u64(volatile long * m, unsigned long val)
104 {
105 unsigned long dummy, dummy2;
106
107 __asm__ __volatile__(
108 "\n1:\t"
109 "ldq_l %0,%1\n\t"
110 "bis %2,%2,%3\n\t"
111 "stq_c %3,%1\n\t"
112 "beq %3,1b\n"
113 : "=r" (val), "=m" (*m), "=r" (dummy), "=r" (dummy2)
114 : "1" (*m), "2" (val));
115 return val;
116 }
117
118 #define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
119 #define tas(ptr) (xchg((ptr),1))
120
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128
129 extern void __xchg_called_with_bad_pointer(void);
130
131 static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size)
132 {
133 switch (size) {
134 case 4:
135 return xchg_u32(ptr, x);
136 case 8:
137 return xchg_u64(ptr, x);
138 }
139 __xchg_called_with_bad_pointer();
140 return x;
141 }
142
143 #endif
144
145 #endif