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*/
1 /* lance.c: An AMD LANCE ethernet driver for linux. */
2 /*
3 Written 1993,1994,1995 by Donald Becker.
4
5 Copyright 1993 United States Government as represented by the
6 Director, National Security Agency.
7 This software may be used and distributed according to the terms
8 of the GNU Public License, incorporated herein by reference.
9
10 This driver is for the Allied Telesis AT1500 and HP J2405A, and should work
11 with most other LANCE-based bus-master (NE2100 clone) ethercards.
12
13 The author may be reached as becker@CESDIS.gsfc.nasa.gov, or C/O
14 Center of Excellence in Space Data and Information Sciences
15 Code 930.5, Goddard Space Flight Center, Greenbelt MD 20771
16 */
17
18 static const char *version = "lance.c:v1.08 4/10/95 dplatt@3do.com\n";
19
20 #include <linux/config.h>
21 #include <linux/kernel.h>
22 #include <linux/sched.h>
23 #include <linux/string.h>
24 #include <linux/ptrace.h>
25 #include <linux/errno.h>
26 #include <linux/ioport.h>
27 #include <linux/malloc.h>
28 #include <linux/interrupt.h>
29 #include <linux/pci.h>
30 #include <linux/bios32.h>
31 #include <asm/bitops.h>
32 #include <asm/io.h>
33 #include <asm/dma.h>
34
35 #include <linux/netdevice.h>
36 #include <linux/etherdevice.h>
37 #include <linux/skbuff.h>
38
39 static unsigned int lance_portlist[] = {0x300, 0x320, 0x340, 0x360, 0};
40 unsigned long lance_probe1(int ioaddr, unsigned long mem_start);
41
42 #ifdef HAVE_DEVLIST
43 struct netdev_entry lance_drv =
44 {"lance", lance_probe1, LANCE_TOTAL_SIZE, lance_portlist};
45 #endif
46
47 #ifdef LANCE_DEBUG
48 int lance_debug = LANCE_DEBUG;
49 #else
50 int lance_debug = 1;
51 #endif
52
53 /*
54 Theory of Operation
55
56 I. Board Compatibility
57
58 This device driver is designed for the AMD 79C960, the "PCnet-ISA
59 single-chip ethernet controller for ISA". This chip is used in a wide
60 variety of boards from vendors such as Allied Telesis, HP, Kingston,
61 and Boca. This driver is also intended to work with older AMD 7990
62 designs, such as the NE1500 and NE2100, and newer 79C961. For convenience,
63 I use the name LANCE to refer to all of the AMD chips, even though it properly
64 refers only to the original 7990.
65
66 II. Board-specific settings
67
68 The driver is designed to work the boards that use the faster
69 bus-master mode, rather than in shared memory mode. (Only older designs
70 have on-board buffer memory needed to support the slower shared memory mode.)
71
72 Most ISA boards have jumpered settings for the I/O base, IRQ line, and DMA
73 channel. This driver probes the likely base addresses:
74 {0x300, 0x320, 0x340, 0x360}.
75 After the board is found it generates a DMA-timeout interrupt and uses
76 autoIRQ to find the IRQ line. The DMA channel can be set with the low bits
77 of the otherwise-unused dev->mem_start value (aka PARAM1). If unset it is
78 probed for by enabling each free DMA channel in turn and checking if
79 initialization succeeds.
80
81 The HP-J2405A board is an exception: with this board it's easy to read the
82 EEPROM-set values for the base, IRQ, and DMA. (Of course you must already
83 _know_ the base address -- that field is for writing the EEPROM.)
84
85 III. Driver operation
86
87 IIIa. Ring buffers
88 The LANCE uses ring buffers of Tx and Rx descriptors. Each entry describes
89 the base and length of the data buffer, along with status bits. The length
90 of these buffers is set by LANCE_LOG_{RX,TX}_BUFFERS, which is log_2() of
91 the buffer length (rather than being directly the buffer length) for
92 implementation ease. The current values are 2 (Tx) and 4 (Rx), which leads to
93 ring sizes of 4 (Tx) and 16 (Rx). Increasing the number of ring entries
94 needlessly uses extra space and reduces the chance that an upper layer will
95 be able to reorder queued Tx packets based on priority. Decreasing the number
96 of entries makes it more difficult to achieve back-to-back packet transmission
97 and increases the chance that Rx ring will overflow. (Consider the worst case
98 of receiving back-to-back minimum-sized packets.)
99
100 The LANCE has the capability to "chain" both Rx and Tx buffers, but this driver
101 statically allocates full-sized (slightly oversized -- PKT_BUF_SZ) buffers to
102 avoid the administrative overhead. For the Rx side this avoids dynamically
103 allocating full-sized buffers "just in case", at the expense of a
104 memory-to-memory data copy for each packet received. For most systems this
105 is a good tradeoff: the Rx buffer will always be in low memory, the copy
106 is inexpensive, and it primes the cache for later packet processing. For Tx
107 the buffers are only used when needed as low-memory bounce buffers.
108
109 IIIB. 16M memory limitations.
110 For the ISA bus master mode all structures used directly by the LANCE,
111 the initialization block, Rx and Tx rings, and data buffers, must be
112 accessible from the ISA bus, i.e. in the lower 16M of real memory.
113 This is a problem for current Linux kernels on >16M machines. The network
114 devices are initialized after memory initialization, and the kernel doles out
115 memory from the top of memory downward. The current solution is to have a
116 special network initialization routine that's called before memory
117 initialization; this will eventually be generalized for all network devices.
118 As mentioned before, low-memory "bounce-buffers" are used when needed.
119
120 IIIC. Synchronization
121 The driver runs as two independent, single-threaded flows of control. One
122 is the send-packet routine, which enforces single-threaded use by the
123 dev->tbusy flag. The other thread is the interrupt handler, which is single
124 threaded by the hardware and other software.
125
126 The send packet thread has partial control over the Tx ring and 'dev->tbusy'
127 flag. It sets the tbusy flag whenever it's queuing a Tx packet. If the next
128 queue slot is empty, it clears the tbusy flag when finished otherwise it sets
129 the 'lp->tx_full' flag.
130
131 The interrupt handler has exclusive control over the Rx ring and records stats
132 from the Tx ring. (The Tx-done interrupt can't be selectively turned off, so
133 we can't avoid the interrupt overhead by having the Tx routine reap the Tx
134 stats.) After reaping the stats, it marks the queue entry as empty by setting
135 the 'base' to zero. Iff the 'lp->tx_full' flag is set, it clears both the
136 tx_full and tbusy flags.
137
138 */
139
140 /* Set the number of Tx and Rx buffers, using Log_2(# buffers).
141 Reasonable default values are 4 Tx buffers, and 16 Rx buffers.
142 That translates to 2 (4 == 2^^2) and 4 (16 == 2^^4). */
143 #ifndef LANCE_LOG_TX_BUFFERS
144 #define LANCE_LOG_TX_BUFFERS 4
145 #define LANCE_LOG_RX_BUFFERS 4
146 #endif
147
148 #define TX_RING_SIZE (1 << (LANCE_LOG_TX_BUFFERS))
149 #define TX_RING_MOD_MASK (TX_RING_SIZE - 1)
150 #define TX_RING_LEN_BITS ((LANCE_LOG_TX_BUFFERS) << 29)
151
152 #define RX_RING_SIZE (1 << (LANCE_LOG_RX_BUFFERS))
153 #define RX_RING_MOD_MASK (RX_RING_SIZE - 1)
154 #define RX_RING_LEN_BITS ((LANCE_LOG_RX_BUFFERS) << 29)
155
156 #define PKT_BUF_SZ 1544
157
158 /* Offsets from base I/O address. */
159 #define LANCE_DATA 0x10
160 #define LANCE_ADDR 0x12
161 #define LANCE_RESET 0x14
162 #define LANCE_BUS_IF 0x16
163 #define LANCE_TOTAL_SIZE 0x18
164
165 /* The LANCE Rx and Tx ring descriptors. */
166 struct lance_rx_head {
167 int base;
168 short buf_length; /* This length is 2s complement (negative)! */
169 short msg_length; /* This length is "normal". */
170 };
171
172 struct lance_tx_head {
173 int base;
174 short length; /* Length is 2s complement (negative)! */
175 short misc;
176 };
177
178 /* The LANCE initialization block, described in databook. */
179 struct lance_init_block {
180 unsigned short mode; /* Pre-set mode (reg. 15) */
181 unsigned char phys_addr[6]; /* Physical ethernet address */
182 unsigned filter[2]; /* Multicast filter (unused). */
183 /* Receive and transmit ring base, along with extra bits. */
184 unsigned rx_ring; /* Tx and Rx ring base pointers */
185 unsigned tx_ring;
186 };
187
188 struct lance_private {
189 /* The Tx and Rx ring entries must be aligned on 8-byte boundaries.
190 This is accomplished by allocating 7 extra bytes for the struct
191 and adjusting the start of the struct to be 8-byte aligned. */
192 struct lance_rx_head rx_ring[RX_RING_SIZE];
193 struct lance_tx_head tx_ring[TX_RING_SIZE];
194 struct lance_init_block init_block;
195 const char *name;
196 /* The saved address of a sent-in-place packet/buffer, for skfree(). */
197 struct sk_buff* tx_skbuff[TX_RING_SIZE];
198 long rx_buffs; /* Address of Rx and Tx buffers. */
199 /* Tx low-memory "bounce buffer" address. */
200 char (*tx_bounce_buffs)[PKT_BUF_SZ];
201 int cur_rx, cur_tx; /* The next free ring entry */
202 int dirty_rx, dirty_tx; /* The ring entries to be free()ed. */
203 int dma;
204 struct enet_statistics stats;
205 unsigned char chip_version; /* See lance_chip_type. */
206 char tx_full;
207 char lock;
208 };
209
210 #define LANCE_MUST_PAD 0x00000001
211 #define LANCE_ENABLE_AUTOSELECT 0x00000002
212 #define LANCE_MUST_REINIT_RING 0x00000004
213 #define LANCE_MUST_UNRESET 0x00000008
214 #define LANCE_HAS_MISSED_FRAME 0x00000010
215
216 /* A mapping from the chip ID number to the part number and features.
217 These are from the datasheets -- in real life the '970 version
218 reportedly has the same ID as the '965. */
219 static struct lance_chip_type {
220 int id_number;
221 const char *name;
222 int flags;
223 } chip_table[] = {
224 {0x0000, "LANCE 7990", /* Ancient lance chip. */
225 LANCE_MUST_PAD + LANCE_MUST_UNRESET},
226 {0x0003, "PCnet/ISA 79C960", /* 79C960 PCnet/ISA. */
227 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
228 LANCE_HAS_MISSED_FRAME},
229 {0x2260, "PCnet/ISA+ 79C961", /* 79C961 PCnet/ISA+, Plug-n-Play. */
230 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
231 LANCE_HAS_MISSED_FRAME},
232 {0x2420, "PCnet/PCI 79C970", /* 79C970 or 79C974 PCnet-SCSI, PCI. */
233 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
234 LANCE_HAS_MISSED_FRAME},
235 /* Bug: the PCnet/PCI actually uses the PCnet/VLB ID number, so just call
236 it the PCnet32. */
237 {0x2430, "PCnet32", /* 79C965 PCnet for VL bus. */
238 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
239 LANCE_HAS_MISSED_FRAME},
240 {0x0, "PCnet (unknown)",
241 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
242 LANCE_HAS_MISSED_FRAME},
243 };
244
245 enum {OLD_LANCE = 0, PCNET_ISA=1, PCNET_ISAP=2, PCNET_PCI=3, PCNET_VLB=4, LANCE_UNKNOWN=5};
246
247 /* Non-zero only if the current card is a PCI with BIOS-set IRQ. */
248 static unsigned char pci_irq_line = 0;
249
250 /* Non-zero if lance_probe1() needs to allocate low-memory bounce buffers.
251 Assume yes until we know the memory size. */
252 static unsigned char lance_need_isa_bounce_buffers = 1;
253
254 static int lance_open(struct device *dev);
255 static void lance_init_ring(struct device *dev);
256 static int lance_start_xmit(struct sk_buff *skb, struct device *dev);
257 static int lance_rx(struct device *dev);
258 static void lance_interrupt(int irq, struct pt_regs *regs);
259 static int lance_close(struct device *dev);
260 static struct enet_statistics *lance_get_stats(struct device *dev);
261 #ifdef HAVE_MULTICAST
262 static void set_multicast_list(struct device *dev, int num_addrs, void *addrs);
263 #endif
264
265
266
267 /* This lance probe is unlike the other board probes in 1.0.*. The LANCE may
268 have to allocate a contiguous low-memory region for bounce buffers.
269 This requirement is satisfied by having the lance initialization occur
270 before the memory management system is started, and thus well before the
271 other probes. */
272
273 unsigned long lance_init(unsigned long mem_start, unsigned long mem_end)
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*/
274 {
275 int *port;
276
277 if (mem_end <= 16*1024*1024)
278 lance_need_isa_bounce_buffers = 0;
279
280 #if defined(CONFIG_PCI)
281 if (pcibios_present()) {
282 int pci_index;
283 printk("lance.c: PCI bios is present, checking for devices...\n");
284 for (pci_index = 0; pci_index < 8; pci_index++) {
285 unsigned char pci_bus, pci_device_fn;
286 unsigned int pci_ioaddr;
287 unsigned short pci_command;
288
289 if (pcibios_find_device (PCI_VENDOR_ID_AMD,
290 PCI_DEVICE_ID_AMD_LANCE, pci_index,
291 &pci_bus, &pci_device_fn) != 0)
292 break;
293 pcibios_read_config_byte(pci_bus, pci_device_fn,
294 PCI_INTERRUPT_LINE, &pci_irq_line);
295 pcibios_read_config_dword(pci_bus, pci_device_fn,
296 PCI_BASE_ADDRESS_0, &pci_ioaddr);
297 /* Remove I/O space marker in bit 0. */
298 pci_ioaddr &= ~3;
299 /* PCI Spec 2.1 states that it is either the driver or PCI card's
300 * responsibility to set the PCI Master Enable Bit if needed.
301 * (From Mark Stockton <marks@schooner.sys.hou.compaq.com>)
302 */
303 pcibios_read_config_word(pci_bus, pci_device_fn,
304 PCI_COMMAND, &pci_command);
305 if ( ! (pci_command & PCI_COMMAND_MASTER)) {
306 printk("PCI Master Bit has not been set. Setting...\n");
307 pci_command |= PCI_COMMAND_MASTER;
308 pcibios_write_config_word(pci_bus, pci_device_fn,
309 PCI_COMMAND, pci_command);
310 }
311 printk("Found PCnet/PCI at %#x, irq %d (mem_start is %#lx).\n",
312 pci_ioaddr, pci_irq_line, mem_start);
313 mem_start = lance_probe1(pci_ioaddr, mem_start);
314 pci_irq_line = 0;
315 }
316 }
317 #endif /* defined(CONFIG_PCI) */
318
319 for (port = lance_portlist; *port; port++) {
320 int ioaddr = *port;
321
322 if ( check_region(ioaddr, LANCE_TOTAL_SIZE) == 0
323 && inb(ioaddr + 14) == 0x57
324 && inb(ioaddr + 15) == 0x57) {
325 mem_start = lance_probe1(ioaddr, mem_start);
326 }
327 }
328
329 return mem_start;
330 }
331
332 unsigned long lance_probe1(int ioaddr, unsigned long mem_start)
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*/
333 {
334 struct device *dev;
335 struct lance_private *lp;
336 short dma_channels; /* Mark spuriously-busy DMA channels */
337 int i, reset_val, lance_version;
338 const char *chipname;
339 /* Flags for specific chips or boards. */
340 unsigned char hpJ2405A = 0; /* HP ISA adaptor */
341 int hp_builtin = 0; /* HP on-board ethernet. */
342 static int did_version = 0; /* Already printed version info. */
343
344 /* First we look for special cases.
345 Check for HP's on-board ethernet by looking for 'HP' in the BIOS.
346 There are two HP versions, check the BIOS for the configuration port.
347 This method provided by L. Julliard, Laurent_Julliard@grenoble.hp.com.
348 */
349 if ( *((unsigned short *) 0x000f0102) == 0x5048) {
350 static const short ioaddr_table[] = { 0x300, 0x320, 0x340, 0x360};
351 int hp_port = ( *((unsigned char *) 0x000f00f1) & 1) ? 0x499 : 0x99;
352 /* We can have boards other than the built-in! Verify this is on-board. */
353 if ((inb(hp_port) & 0xc0) == 0x80
354 && ioaddr_table[inb(hp_port) & 3] == ioaddr)
355 hp_builtin = hp_port;
356 }
357 /* We also recognize the HP Vectra on-board here, but check below. */
358 hpJ2405A = (inb(ioaddr) == 0x08 && inb(ioaddr+1) == 0x00
359 && inb(ioaddr+2) == 0x09);
360
361 /* Reset the LANCE. */
362 reset_val = inw(ioaddr+LANCE_RESET); /* Reset the LANCE */
363
364 /* The Un-Reset needed is only needed for the real NE2100, and will
365 confuse the HP board. */
366 if (!hpJ2405A)
367 outw(reset_val, ioaddr+LANCE_RESET);
368
369 outw(0x0000, ioaddr+LANCE_ADDR); /* Switch to window 0 */
370 if (inw(ioaddr+LANCE_DATA) != 0x0004)
371 return mem_start;
372
373 /* Get the version of the chip. */
374 outw(88, ioaddr+LANCE_ADDR);
375 if (inw(ioaddr+LANCE_ADDR) != 88) {
376 lance_version = 0;
377 } else { /* Good, it's a newer chip. */
378 int chip_version = inw(ioaddr+LANCE_DATA);
379 outw(89, ioaddr+LANCE_ADDR);
380 chip_version |= inw(ioaddr+LANCE_DATA) << 16;
381 if (lance_debug > 2)
382 printk(" LANCE chip version is %#x.\n", chip_version);
383 if ((chip_version & 0xfff) != 0x003)
384 return mem_start;
385 chip_version = (chip_version >> 12) & 0xffff;
386 for (lance_version = 1; chip_table[lance_version].id_number; lance_version++) {
387 if (chip_table[lance_version].id_number == chip_version)
388 break;
389 }
390 }
391
392 dev = init_etherdev(0, 7
393 + ((sizeof(struct lance_private) + 7) & ~7)
394 + PKT_BUF_SZ*RX_RING_SIZE
395 + (lance_need_isa_bounce_buffers
396 ? PKT_BUF_SZ*TX_RING_SIZE
397 : 0),
398 &mem_start);
399
400 chipname = chip_table[lance_version].name;
401 printk("%s: %s at %#3x,", dev->name, chipname, ioaddr);
402
403 /* There is a 16 byte station address PROM at the base address.
404 The first six bytes are the station address. */
405 for (i = 0; i < 6; i++)
406 printk(" %2.2x", dev->dev_addr[i] = inb(ioaddr + i));
407
408 dev->base_addr = ioaddr;
409 request_region(ioaddr, LANCE_TOTAL_SIZE, chip_table[lance_version].name);
410
411 /* Make certain the data structures used by the LANCE are aligned. */
412 dev->priv = (void *)(((int)dev->priv + 7) & ~7);
413 lp = (struct lance_private *)dev->priv;
414 lp->name = chipname;
415 lp->rx_buffs = (long)lp + ((sizeof(struct lance_private) + 7) & ~7);
416 lp->tx_bounce_buffs = (char (*)[PKT_BUF_SZ])
417 (lp->rx_buffs + PKT_BUF_SZ*RX_RING_SIZE);
418
419 lp->chip_version = lance_version;
420
421 lp->init_block.mode = 0x0003; /* Disable Rx and Tx. */
422 for (i = 0; i < 6; i++)
423 lp->init_block.phys_addr[i] = dev->dev_addr[i];
424 lp->init_block.filter[0] = 0x00000000;
425 lp->init_block.filter[1] = 0x00000000;
426 lp->init_block.rx_ring = (int)lp->rx_ring | RX_RING_LEN_BITS;
427 lp->init_block.tx_ring = (int)lp->tx_ring | TX_RING_LEN_BITS;
428
429 outw(0x0001, ioaddr+LANCE_ADDR);
430 inw(ioaddr+LANCE_ADDR);
431 outw((short) (int) &lp->init_block, ioaddr+LANCE_DATA);
432 outw(0x0002, ioaddr+LANCE_ADDR);
433 inw(ioaddr+LANCE_ADDR);
434 outw(((int)&lp->init_block) >> 16, ioaddr+LANCE_DATA);
435 outw(0x0000, ioaddr+LANCE_ADDR);
436 inw(ioaddr+LANCE_ADDR);
437
438 if (pci_irq_line) {
439 dev->dma = 4; /* Native bus-master, no DMA channel needed. */
440 dev->irq = pci_irq_line;
441 } else if (hp_builtin) {
442 static const char dma_tbl[4] = {3, 5, 6, 0};
443 static const char irq_tbl[4] = {3, 4, 5, 9};
444 unsigned char port_val = inb(hp_builtin);
445 dev->dma = dma_tbl[(port_val >> 4) & 3];
446 dev->irq = irq_tbl[(port_val >> 2) & 3];
447 printk(" HP Vectra IRQ %d DMA %d.\n", dev->irq, dev->dma);
448 } else if (hpJ2405A) {
449 static const char dma_tbl[4] = {3, 5, 6, 7};
450 static const char irq_tbl[8] = {3, 4, 5, 9, 10, 11, 12, 15};
451 short reset_val = inw(ioaddr+LANCE_RESET);
452 dev->dma = dma_tbl[(reset_val >> 2) & 3];
453 dev->irq = irq_tbl[(reset_val >> 4) & 7];
454 printk(" HP J2405A IRQ %d DMA %d.\n", dev->irq, dev->dma);
455 } else if (lance_version == PCNET_ISAP) { /* The plug-n-play version. */
456 short bus_info;
457 outw(8, ioaddr+LANCE_ADDR);
458 bus_info = inw(ioaddr+LANCE_BUS_IF);
459 dev->dma = bus_info & 0x07;
460 dev->irq = (bus_info >> 4) & 0x0F;
461 } else {
462 /* The DMA channel may be passed in PARAM1. */
463 if (dev->mem_start & 0x07)
464 dev->dma = dev->mem_start & 0x07;
465 }
466
467 if (dev->dma == 0) {
468 /* Read the DMA channel status register, so that we can avoid
469 stuck DMA channels in the DMA detection below. */
470 dma_channels = ((inb(DMA1_STAT_REG) >> 4) & 0x0f) |
471 (inb(DMA2_STAT_REG) & 0xf0);
472 }
473 if (dev->irq >= 2)
474 printk(" assigned IRQ %d", dev->irq);
475 else {
476 /* To auto-IRQ we enable the initialization-done and DMA error
477 interrupts. For ISA boards we get a DMA error, but VLB and PCI
478 boards will work. */
479 autoirq_setup(0);
480
481 /* Trigger an initialization just for the interrupt. */
482 outw(0x0041, ioaddr+LANCE_DATA);
483
484 dev->irq = autoirq_report(1);
485 if (dev->irq)
486 printk(", probed IRQ %d", dev->irq);
487 else {
488 printk(", failed to detect IRQ line.\n");
489 return mem_start;
490 }
491
492 /* Check for the initialization done bit, 0x0100, which means
493 that we don't need a DMA channel. */
494 if (inw(ioaddr+LANCE_DATA) & 0x0100)
495 dev->dma = 4;
496 }
497
498 if (dev->dma == 4) {
499 printk(", no DMA needed.\n");
500 } else if (dev->dma) {
501 if (request_dma(dev->dma, chipname)) {
502 printk("DMA %d allocation failed.\n", dev->dma);
503 return mem_start;
504 } else
505 printk(", assigned DMA %d.\n", dev->dma);
506 } else { /* OK, we have to auto-DMA. */
507 for (i = 0; i < 4; i++) {
508 static const char dmas[] = { 5, 6, 7, 3 };
509 int dma = dmas[i];
510 int boguscnt;
511
512 /* Don't enable a permanently busy DMA channel, or the machine
513 will hang. */
514 if (test_bit(dma, &dma_channels))
515 continue;
516 outw(0x7f04, ioaddr+LANCE_DATA); /* Clear the memory error bits. */
517 if (request_dma(dma, chipname))
518 continue;
519 set_dma_mode(dma, DMA_MODE_CASCADE);
520 enable_dma(dma);
521
522 /* Trigger an initialization. */
523 outw(0x0001, ioaddr+LANCE_DATA);
524 for (boguscnt = 100; boguscnt > 0; --boguscnt)
525 if (inw(ioaddr+LANCE_DATA) & 0x0900)
526 break;
527 if (inw(ioaddr+LANCE_DATA) & 0x0100) {
528 dev->dma = dma;
529 printk(", DMA %d.\n", dev->dma);
530 break;
531 } else {
532 disable_dma(dma);
533 free_dma(dma);
534 }
535 }
536 if (i == 4) { /* Failure: bail. */
537 printk("DMA detection failed.\n");
538 return mem_start;
539 }
540 }
541
542 if (chip_table[lp->chip_version].flags & LANCE_ENABLE_AUTOSELECT) {
543 /* Turn on auto-select of media (10baseT or BNC) so that the user
544 can watch the LEDs even if the board isn't opened. */
545 outw(0x0002, ioaddr+LANCE_ADDR);
546 outw(0x0002, ioaddr+LANCE_BUS_IF);
547 }
548
549 if (lance_debug > 0 && did_version++ == 0)
550 printk(version);
551
552 /* The LANCE-specific entries in the device structure. */
553 dev->open = &lance_open;
554 dev->hard_start_xmit = &lance_start_xmit;
555 dev->stop = &lance_close;
556 dev->get_stats = &lance_get_stats;
557 dev->set_multicast_list = &set_multicast_list;
558
559 return mem_start;
560 }
561
562
563 static int
564 lance_open(struct device *dev)
/* */
565 {
566 struct lance_private *lp = (struct lance_private *)dev->priv;
567 int ioaddr = dev->base_addr;
568 int i;
569
570 if (dev->irq == 0 ||
571 request_irq(dev->irq, &lance_interrupt, 0, lp->name)) {
572 return -EAGAIN;
573 }
574
575 /* We used to allocate DMA here, but that was silly.
576 DMA lines can't be shared! We now permanently snarf them. */
577
578 irq2dev_map[dev->irq] = dev;
579
580 /* Reset the LANCE */
581 inw(ioaddr+LANCE_RESET);
582
583 /* The DMA controller is used as a no-operation slave, "cascade mode". */
584 if (dev->dma != 4) {
585 enable_dma(dev->dma);
586 set_dma_mode(dev->dma, DMA_MODE_CASCADE);
587 }
588
589 /* Un-Reset the LANCE, needed only for the NE2100. */
590 if (chip_table[lp->chip_version].flags & LANCE_MUST_UNRESET)
591 outw(0, ioaddr+LANCE_RESET);
592
593 if (chip_table[lp->chip_version].flags & LANCE_ENABLE_AUTOSELECT) {
594 /* This is 79C960-specific: Turn on auto-select of media (AUI, BNC). */
595 outw(0x0002, ioaddr+LANCE_ADDR);
596 outw(0x0002, ioaddr+LANCE_BUS_IF);
597 }
598
599 if (lance_debug > 1)
600 printk("%s: lance_open() irq %d dma %d tx/rx rings %#x/%#x init %#x.\n",
601 dev->name, dev->irq, dev->dma, (int) lp->tx_ring, (int) lp->rx_ring,
602 (int) &lp->init_block);
603
604 lance_init_ring(dev);
605 /* Re-initialize the LANCE, and start it when done. */
606 outw(0x0001, ioaddr+LANCE_ADDR);
607 outw((short) (int) &lp->init_block, ioaddr+LANCE_DATA);
608 outw(0x0002, ioaddr+LANCE_ADDR);
609 outw(((int)&lp->init_block) >> 16, ioaddr+LANCE_DATA);
610
611 outw(0x0004, ioaddr+LANCE_ADDR);
612 outw(0x0915, ioaddr+LANCE_DATA);
613
614 outw(0x0000, ioaddr+LANCE_ADDR);
615 outw(0x0001, ioaddr+LANCE_DATA);
616
617 dev->tbusy = 0;
618 dev->interrupt = 0;
619 dev->start = 1;
620 i = 0;
621 while (i++ < 100)
622 if (inw(ioaddr+LANCE_DATA) & 0x0100)
623 break;
624 /*
625 * We used to clear the InitDone bit, 0x0100, here but Mark Stockton
626 * reports that doing so triggers a bug in the '974.
627 */
628 outw(0x0042, ioaddr+LANCE_DATA);
629
630 if (lance_debug > 2)
631 printk("%s: LANCE open after %d ticks, init block %#x csr0 %4.4x.\n",
632 dev->name, i, (int) &lp->init_block, inw(ioaddr+LANCE_DATA));
633
634 return 0; /* Always succeed */
635 }
636
637 /* The LANCE has been halted for one reason or another (busmaster memory
638 arbitration error, Tx FIFO underflow, driver stopped it to reconfigure,
639 etc.). Modern LANCE variants always reload their ring-buffer
640 configuration when restarted, so we must reinitialize our ring
641 context before restarting. As part of this reinitialization,
642 find all packets still on the Tx ring and pretend that they had been
643 sent (in effect, drop the packets on the floor) - the higher-level
644 protocols will time out and retransmit. It'd be better to shuffle
645 these skbs to a temp list and then actually re-Tx them after
646 restarting the chip, but I'm too lazy to do so right now. dplatt@3do.com
647 */
648
649 static void
650 lance_purge_tx_ring(struct device *dev)
/* */
651 {
652 struct lance_private *lp = (struct lance_private *)dev->priv;
653 int i;
654
655 for (i = 0; i < TX_RING_SIZE; i++) {
656 if (lp->tx_skbuff[i]) {
657 dev_kfree_skb(lp->tx_skbuff[i],FREE_WRITE);
658 lp->tx_skbuff[i] = NULL;
659 }
660 }
661 }
662
663
664 /* Initialize the LANCE Rx and Tx rings. */
665 static void
666 lance_init_ring(struct device *dev)
/* */
667 {
668 struct lance_private *lp = (struct lance_private *)dev->priv;
669 int i;
670
671 lp->lock = 0, lp->tx_full = 0;
672 lp->cur_rx = lp->cur_tx = 0;
673 lp->dirty_rx = lp->dirty_tx = 0;
674
675 for (i = 0; i < RX_RING_SIZE; i++) {
676 lp->rx_ring[i].base = (lp->rx_buffs + i*PKT_BUF_SZ) | 0x80000000;
677 lp->rx_ring[i].buf_length = -PKT_BUF_SZ;
678 }
679 /* The Tx buffer address is filled in as needed, but we do need to clear
680 the upper ownership bit. */
681 for (i = 0; i < TX_RING_SIZE; i++) {
682 lp->tx_ring[i].base = 0;
683 }
684
685 lp->init_block.mode = 0x0000;
686 for (i = 0; i < 6; i++)
687 lp->init_block.phys_addr[i] = dev->dev_addr[i];
688 lp->init_block.filter[0] = 0x00000000;
689 lp->init_block.filter[1] = 0x00000000;
690 lp->init_block.rx_ring = (int)lp->rx_ring | RX_RING_LEN_BITS;
691 lp->init_block.tx_ring = (int)lp->tx_ring | TX_RING_LEN_BITS;
692 }
693
694 static void
695 lance_restart(struct device *dev, unsigned int csr0_bits, int must_reinit)
/* */
696 {
697 struct lance_private *lp = (struct lance_private *)dev->priv;
698
699 if (must_reinit ||
700 (chip_table[lp->chip_version].flags & LANCE_MUST_REINIT_RING)) {
701 lance_purge_tx_ring(dev);
702 lance_init_ring(dev);
703 }
704 outw(0x0000, dev->base_addr + LANCE_ADDR);
705 outw(csr0_bits, dev->base_addr + LANCE_DATA);
706 }
707
708 static int
709 lance_start_xmit(struct sk_buff *skb, struct device *dev)
/* */
710 {
711 struct lance_private *lp = (struct lance_private *)dev->priv;
712 int ioaddr = dev->base_addr;
713 int entry;
714 unsigned long flags;
715
716 /* Transmitter timeout, serious problems. */
717 if (dev->tbusy) {
718 int tickssofar = jiffies - dev->trans_start;
719 if (tickssofar < 20)
720 return 1;
721 outw(0, ioaddr+LANCE_ADDR);
722 printk("%s: transmit timed out, status %4.4x, resetting.\n",
723 dev->name, inw(ioaddr+LANCE_DATA));
724 outw(0x0004, ioaddr+LANCE_DATA);
725 lp->stats.tx_errors++;
726 #ifndef final_version
727 {
728 int i;
729 printk(" Ring data dump: dirty_tx %d cur_tx %d%s cur_rx %d.",
730 lp->dirty_tx, lp->cur_tx, lp->tx_full ? " (full)" : "",
731 lp->cur_rx);
732 for (i = 0 ; i < RX_RING_SIZE; i++)
733 printk("%s %08x %04x %04x", i & 0x3 ? "" : "\n ",
734 lp->rx_ring[i].base, -lp->rx_ring[i].buf_length,
735 lp->rx_ring[i].msg_length);
736 for (i = 0 ; i < TX_RING_SIZE; i++)
737 printk("%s %08x %04x %04x", i & 0x3 ? "" : "\n ",
738 lp->tx_ring[i].base, -lp->tx_ring[i].length,
739 lp->tx_ring[i].misc);
740 printk("\n");
741 }
742 #endif
743 lance_restart(dev, 0x0043, 1);
744
745 dev->tbusy=0;
746 dev->trans_start = jiffies;
747
748 return 0;
749 }
750
751 if (skb == NULL) {
752 dev_tint(dev);
753 return 0;
754 }
755
756 if (skb->len <= 0)
757 return 0;
758
759 if (lance_debug > 3) {
760 outw(0x0000, ioaddr+LANCE_ADDR);
761 printk("%s: lance_start_xmit() called, csr0 %4.4x.\n", dev->name,
762 inw(ioaddr+LANCE_DATA));
763 outw(0x0000, ioaddr+LANCE_DATA);
764 }
765
766 /* Block a timer-based transmit from overlapping. This could better be
767 done with atomic_swap(1, dev->tbusy), but set_bit() works as well. */
768 if (set_bit(0, (void*)&dev->tbusy) != 0) {
769 printk("%s: Transmitter access conflict.\n", dev->name);
770 return 1;
771 }
772
773 if (set_bit(0, (void*)&lp->lock) != 0) {
774 if (lance_debug > 0)
775 printk("%s: tx queue lock!.\n", dev->name);
776 /* don't clear dev->tbusy flag. */
777 return 1;
778 }
779
780 /* Fill in a Tx ring entry */
781
782 /* Mask to ring buffer boundary. */
783 entry = lp->cur_tx & TX_RING_MOD_MASK;
784
785 /* Caution: the write order is important here, set the base address
786 with the "ownership" bits last. */
787
788 /* The old LANCE chips doesn't automatically pad buffers to min. size. */
789 if (chip_table[lp->chip_version].flags & LANCE_MUST_PAD) {
790 lp->tx_ring[entry].length =
791 -(ETH_ZLEN < skb->len ? skb->len : ETH_ZLEN);
792 } else
793 lp->tx_ring[entry].length = -skb->len;
794
795 lp->tx_ring[entry].misc = 0x0000;
796
797 /* If any part of this buffer is >16M we must copy it to a low-memory
798 buffer. */
799 if ((int)(skb->data) + skb->len > 0x01000000) {
800 if (lance_debug > 5)
801 printk("%s: bouncing a high-memory packet (%#x).\n",
802 dev->name, (int)(skb->data));
803 memcpy(&lp->tx_bounce_buffs[entry], skb->data, skb->len);
804 lp->tx_ring[entry].base =
805 (int)(lp->tx_bounce_buffs + entry) | 0x83000000;
806 dev_kfree_skb (skb, FREE_WRITE);
807 } else {
808 lp->tx_skbuff[entry] = skb;
809 lp->tx_ring[entry].base = (int)(skb->data) | 0x83000000;
810 }
811 lp->cur_tx++;
812
813 /* Trigger an immediate send poll. */
814 outw(0x0000, ioaddr+LANCE_ADDR);
815 outw(0x0048, ioaddr+LANCE_DATA);
816
817 dev->trans_start = jiffies;
818
819 save_flags(flags);
820 cli();
821 lp->lock = 0;
822 if (lp->tx_ring[(entry+1) & TX_RING_MOD_MASK].base == 0)
823 dev->tbusy=0;
824 else
825 lp->tx_full = 1;
826 restore_flags(flags);
827
828 return 0;
829 }
830
831 /* The LANCE interrupt handler. */
832 static void
833 lance_interrupt(int irq, struct pt_regs * regs)
/* */
834 {
835 struct device *dev = (struct device *)(irq2dev_map[irq]);
836 struct lance_private *lp;
837 int csr0, ioaddr, boguscnt=10;
838 int must_restart;
839
840 if (dev == NULL) {
841 printk ("lance_interrupt(): irq %d for unknown device.\n", irq);
842 return;
843 }
844
845 ioaddr = dev->base_addr;
846 lp = (struct lance_private *)dev->priv;
847 if (dev->interrupt)
848 printk("%s: Re-entering the interrupt handler.\n", dev->name);
849
850 dev->interrupt = 1;
851
852 outw(0x00, dev->base_addr + LANCE_ADDR);
853 while ((csr0 = inw(dev->base_addr + LANCE_DATA)) & 0x8600
854 && --boguscnt >= 0) {
855 /* Acknowledge all of the current interrupt sources ASAP. */
856 outw(csr0 & ~0x004f, dev->base_addr + LANCE_DATA);
857
858 must_restart = 0;
859
860 if (lance_debug > 5)
861 printk("%s: interrupt csr0=%#2.2x new csr=%#2.2x.\n",
862 dev->name, csr0, inw(dev->base_addr + LANCE_DATA));
863
864 if (csr0 & 0x0400) /* Rx interrupt */
865 lance_rx(dev);
866
867 if (csr0 & 0x0200) { /* Tx-done interrupt */
868 int dirty_tx = lp->dirty_tx;
869
870 while (dirty_tx < lp->cur_tx) {
871 int entry = dirty_tx & TX_RING_MOD_MASK;
872 int status = lp->tx_ring[entry].base;
873
874 if (status < 0)
875 break; /* It still hasn't been Txed */
876
877 lp->tx_ring[entry].base = 0;
878
879 if (status & 0x40000000) {
880 /* There was an major error, log it. */
881 int err_status = lp->tx_ring[entry].misc;
882 lp->stats.tx_errors++;
883 if (err_status & 0x0400) lp->stats.tx_aborted_errors++;
884 if (err_status & 0x0800) lp->stats.tx_carrier_errors++;
885 if (err_status & 0x1000) lp->stats.tx_window_errors++;
886 if (err_status & 0x4000) {
887 /* Ackk! On FIFO errors the Tx unit is turned off! */
888 lp->stats.tx_fifo_errors++;
889 /* Remove this verbosity later! */
890 printk("%s: Tx FIFO error! Status %4.4x.\n",
891 dev->name, csr0);
892 /* Restart the chip. */
893 must_restart = 1;
894 }
895 } else {
896 if (status & 0x18000000)
897 lp->stats.collisions++;
898 lp->stats.tx_packets++;
899 }
900
901 /* We must free the original skb if it's not a data-only copy
902 in the bounce buffer. */
903 if (lp->tx_skbuff[entry]) {
904 dev_kfree_skb(lp->tx_skbuff[entry],FREE_WRITE);
905 lp->tx_skbuff[entry] = 0;
906 }
907 dirty_tx++;
908 }
909
910 #ifndef final_version
911 if (lp->cur_tx - dirty_tx >= TX_RING_SIZE) {
912 printk("out-of-sync dirty pointer, %d vs. %d, full=%d.\n",
913 dirty_tx, lp->cur_tx, lp->tx_full);
914 dirty_tx += TX_RING_SIZE;
915 }
916 #endif
917
918 if (lp->tx_full && dev->tbusy
919 && dirty_tx > lp->cur_tx - TX_RING_SIZE + 2) {
920 /* The ring is no longer full, clear tbusy. */
921 lp->tx_full = 0;
922 dev->tbusy = 0;
923 mark_bh(NET_BH);
924 }
925
926 lp->dirty_tx = dirty_tx;
927 }
928
929 /* Log misc errors. */
930 if (csr0 & 0x4000) lp->stats.tx_errors++; /* Tx babble. */
931 if (csr0 & 0x1000) lp->stats.rx_errors++; /* Missed a Rx frame. */
932 if (csr0 & 0x0800) {
933 printk("%s: Bus master arbitration failure, status %4.4x.\n",
934 dev->name, csr0);
935 /* Restart the chip. */
936 must_restart = 1;
937 }
938
939 if (must_restart) {
940 /* stop the chip to clear the error condition, then restart */
941 outw(0x0000, dev->base_addr + LANCE_ADDR);
942 outw(0x0004, dev->base_addr + LANCE_DATA);
943 lance_restart(dev, 0x0002, 0);
944 }
945 }
946
947 /* Clear any other interrupt, and set interrupt enable. */
948 outw(0x0000, dev->base_addr + LANCE_ADDR);
949 outw(0x7940, dev->base_addr + LANCE_DATA);
950
951 if (lance_debug > 4)
952 printk("%s: exiting interrupt, csr%d=%#4.4x.\n",
953 dev->name, inw(ioaddr + LANCE_ADDR),
954 inw(dev->base_addr + LANCE_DATA));
955
956 dev->interrupt = 0;
957 return;
958 }
959
960 static int
961 lance_rx(struct device *dev)
/* */
962 {
963 struct lance_private *lp = (struct lance_private *)dev->priv;
964 int entry = lp->cur_rx & RX_RING_MOD_MASK;
965 int i;
966
967 /* If we own the next entry, it's a new packet. Send it up. */
968 while (lp->rx_ring[entry].base >= 0) {
969 int status = lp->rx_ring[entry].base >> 24;
970
971 if (status != 0x03) { /* There was an error. */
972 /* There is a tricky error noted by John Murphy,
973 <murf@perftech.com> to Russ Nelson: Even with full-sized
974 buffers it's possible for a jabber packet to use two
975 buffers, with only the last correctly noting the error. */
976 if (status & 0x01) /* Only count a general error at the */
977 lp->stats.rx_errors++; /* end of a packet.*/
978 if (status & 0x20) lp->stats.rx_frame_errors++;
979 if (status & 0x10) lp->stats.rx_over_errors++;
980 if (status & 0x08) lp->stats.rx_crc_errors++;
981 if (status & 0x04) lp->stats.rx_fifo_errors++;
982 lp->rx_ring[entry].base &= 0x03ffffff;
983 } else {
984 /* Malloc up new buffer, compatible with net-2e. */
985 short pkt_len = (lp->rx_ring[entry].msg_length & 0xfff)-4;
986 struct sk_buff *skb;
987
988 skb = dev_alloc_skb(pkt_len+2);
989 if (skb == NULL) {
990 printk("%s: Memory squeeze, deferring packet.\n", dev->name);
991 for (i=0; i < RX_RING_SIZE; i++)
992 if (lp->rx_ring[(entry+i) & RX_RING_MOD_MASK].base < 0)
993 break;
994
995 if (i > RX_RING_SIZE -2) {
996 lp->stats.rx_dropped++;
997 lp->rx_ring[entry].base |= 0x80000000;
998 lp->cur_rx++;
999 }
1000 break;
1001 }
1002 skb->dev = dev;
1003 skb_reserve(skb,2); /* 16 byte align */
1004 skb_put(skb,pkt_len); /* Make room */
1005 eth_copy_and_sum(skb,
1006 (unsigned char *)(lp->rx_ring[entry].base & 0x00ffffff),
1007 pkt_len,0);
1008 skb->protocol=eth_type_trans(skb,dev);
1009 netif_rx(skb);
1010 lp->stats.rx_packets++;
1011 }
1012
1013 /* The docs say that the buffer length isn't touched, but Andrew Boyd
1014 of QNX reports that some revs of the 79C965 clear it. */
1015 lp->rx_ring[entry].buf_length = -PKT_BUF_SZ;
1016 lp->rx_ring[entry].base |= 0x80000000;
1017 entry = (++lp->cur_rx) & RX_RING_MOD_MASK;
1018 }
1019
1020 /* We should check that at least two ring entries are free. If not,
1021 we should free one and mark stats->rx_dropped++. */
1022
1023 return 0;
1024 }
1025
1026 static int
1027 lance_close(struct device *dev)
/* */
1028 {
1029 int ioaddr = dev->base_addr;
1030 struct lance_private *lp = (struct lance_private *)dev->priv;
1031
1032 dev->start = 0;
1033 dev->tbusy = 1;
1034
1035 if (chip_table[lp->chip_version].flags & LANCE_HAS_MISSED_FRAME) {
1036 outw(112, ioaddr+LANCE_ADDR);
1037 lp->stats.rx_missed_errors = inw(ioaddr+LANCE_DATA);
1038 }
1039 outw(0, ioaddr+LANCE_ADDR);
1040
1041 if (lance_debug > 1)
1042 printk("%s: Shutting down ethercard, status was %2.2x.\n",
1043 dev->name, inw(ioaddr+LANCE_DATA));
1044
1045 /* We stop the LANCE here -- it occasionally polls
1046 memory if we don't. */
1047 outw(0x0004, ioaddr+LANCE_DATA);
1048
1049 if (dev->dma != 4)
1050 disable_dma(dev->dma);
1051
1052 free_irq(dev->irq);
1053
1054 irq2dev_map[dev->irq] = 0;
1055
1056 return 0;
1057 }
1058
1059 static struct enet_statistics *
1060 lance_get_stats(struct device *dev)
/* */
1061 {
1062 struct lance_private *lp = (struct lance_private *)dev->priv;
1063 short ioaddr = dev->base_addr;
1064 short saved_addr;
1065 unsigned long flags;
1066
1067 if (chip_table[lp->chip_version].flags & LANCE_HAS_MISSED_FRAME) {
1068 save_flags(flags);
1069 cli();
1070 saved_addr = inw(ioaddr+LANCE_ADDR);
1071 outw(112, ioaddr+LANCE_ADDR);
1072 lp->stats.rx_missed_errors = inw(ioaddr+LANCE_DATA);
1073 outw(saved_addr, ioaddr+LANCE_ADDR);
1074 restore_flags(flags);
1075 }
1076
1077 return &lp->stats;
1078 }
1079
1080 /* Set or clear the multicast filter for this adaptor.
1081 num_addrs == -1 Promiscuous mode, receive all packets
1082 num_addrs == 0 Normal mode, clear multicast list
1083 num_addrs > 0 Multicast mode, receive normal and MC packets, and do
1084 best-effort filtering.
1085 */
1086 static void
1087 set_multicast_list(struct device *dev, int num_addrs, void *addrs)
/* ![[last]](../icons/n_last.png)
*/
1088 {
1089 short ioaddr = dev->base_addr;
1090
1091 outw(0, ioaddr+LANCE_ADDR);
1092 outw(0x0004, ioaddr+LANCE_DATA); /* Temporarily stop the lance. */
1093
1094 if (num_addrs >= 0) {
1095 short multicast_table[4];
1096 int i;
1097 /* We don't use the multicast table, but rely on upper-layer filtering. */
1098 memset(multicast_table, (num_addrs == 0) ? 0 : -1, sizeof(multicast_table));
1099 for (i = 0; i < 4; i++) {
1100 outw(8 + i, ioaddr+LANCE_ADDR);
1101 outw(multicast_table[i], ioaddr+LANCE_DATA);
1102 }
1103 outw(15, ioaddr+LANCE_ADDR);
1104 outw(0x0000, ioaddr+LANCE_DATA); /* Unset promiscuous mode */
1105 } else {
1106 /* Log any net taps. */
1107 printk("%s: Promiscuous mode enabled.\n", dev->name);
1108 outw(15, ioaddr+LANCE_ADDR);
1109 outw(0x8000, ioaddr+LANCE_DATA); /* Set promiscuous mode */
1110 }
1111
1112 lance_restart(dev, 0x0142, 0); /* Resume normal operation */
1113
1114 }
1115
1116
1117 /*
1118 * Local variables:
1119 * compile-command: "gcc -D__KERNEL__ -I/usr/src/linux/net/inet -Wall -Wstrict-prototypes -O6 -m486 -c lance.c"
1120 * c-indent-level: 4
1121 * tab-width: 4
1122 * End:
1123 */
![[bottom]](../icons/n_bottom.png){kind=icon}
*/