![[first]](../icons/first.png){kind=icon}
![[previous]](../icons/n_left.png){kind=icon}
![[next]](../icons/n_right.png){kind=icon}
![[last]](../icons/last.png){kind=icon}
![[top]](../icons/n_top.png){kind=icon}
![[bottom]](../icons/bottom.png){kind=icon}
![[index]](../icons/index.png){kind=icon}
![[help]](../icons/help.png){kind=icon}
*/
1 /*
2 * linux/drivers/block/triton.c Version 1.01 Aug 28, 1995
3 *
4 * Copyright (c) 1995 Mark Lord
5 * May be copied or modified under the terms of the GNU General Public License
6 */
7
8 /*
9 * This module provides support for the Bus Master IDE DMA function
10 * of the Intel PCI Triton chipset (82371FB).
11 *
12 * DMA is currently supported only for hard disk drives (not cdroms).
13 *
14 * Support for cdroms will likely be added at a later date,
15 * after broader experience has been obtained with hard disks.
16 *
17 * Up to four drives may be enabled for DMA, and the Triton chipset will
18 * (hopefully) arbitrate the PCI bus among them. Note that the 82371FB chip
19 * provides a single "line buffer" for the BM IDE function, so performance of
20 * multiple (two) drives doing DMA simultaneously will suffer somewhat,
21 * as they contest for that resource bottleneck. This is handled transparently
22 * inside the 82371FB chip.
23 *
24 * By default, DMA support is prepared for use, but is currently enabled only
25 * for drives which support multi-word DMA mode2 (mword2), or which are
26 * recognized as "good" (see table below). Drives with only mode0 or mode1
27 * (single or multi) DMA should also work with this chipset/driver (eg. MC2112A)
28 * but are not enabled by default. Use "hdparm -i" to view modes supported
29 * by a given drive.
30 *
31 * The hdparm-2.4 (or later) utility can be used for manually enabling/disabling
32 * DMA support, but must be (re-)compiled against this kernel version or later.
33 *
34 * To enable DMA, use "hdparm -d1 /dev/hd?" on a per-drive basis after booting.
35 * If problems arise, ide.c will disable DMA operation after a few retries.
36 * This error recovery mechanism works and has been extremely well exercised.
37 *
38 * IDE drives, depending on their vintage, may support several different modes
39 * of DMA operation. The boot-time modes are indicated with a "*" in
40 * the "hdparm -i" listing, and can be changed with *knowledgeable* use of
41 * the "hdparm -X" feature. There is seldom a need to do this, as drives
42 * normally power-up with their "best" PIO/DMA modes enabled.
43 *
44 * Testing was done with an ASUS P55TP4XE/100 system and the following drives:
45 *
46 * Quantum Fireball 1080A (1Gig w/83kB buffer), DMA mode2, PIO mode4.
47 * - DMA mode2 works fine (7.4MB/sec), despite the tiny on-drive buffer.
48 * - This drive also does PIO mode4, at about the same speed as DMA mode2.
49 *
50 * Micropolis MC2112A (1Gig w/508kB buffer), drive pre-dates EIDE and ATA2.
51 * - DMA works fine (2.2MB/sec), probably due to the large on-drive buffer.
52 * - This older drive can also be tweaked for fastPIO (3.7MB/sec) by using
53 * maximum clock settings (5,4) and setting all flags except prefetch.
54 *
55 * Western Digital AC31000H (1Gig w/128kB buffer), DMA mode1, PIO mode3.
56 * - DMA does not work reliably. The drive appears to be somewhat tardy
57 * in deasserting DMARQ at the end of a sector. This is evident in
58 * the observation that WRITEs work most of the time, depending on
59 * cache-buffer occupancy, but multi-sector reads seldom work.
60 *
61 * Drives like the AC31000H could likely be made to work if all DMA were done
62 * one sector at a time, but that would likely negate any advantage over PIO.
63 *
64 * If you have any drive models to add, email your results to: mlord@bnr.ca
65 * Keep an eye on /var/adm/messages for "DMA disabled" messages.
66 */
67 #define _TRITON_C
68 #include <linux/config.h>
69 #ifndef CONFIG_BLK_DEV_TRITON
70 #define CONFIG_BLK_DEV_TRITON y
71 #endif
72 #include <linux/types.h>
73 #include <linux/kernel.h>
74 #include <linux/timer.h>
75 #include <linux/mm.h>
76 #include <linux/ioport.h>
77 #include <linux/interrupt.h>
78 #include <linux/blkdev.h>
79 #include <linux/hdreg.h>
80 #include <linux/pci.h>
81 #include <linux/bios32.h>
82 #include <asm/io.h>
83
84 #include "ide.h"
85
86 /*
87 * good_dma_drives() lists the model names (from "hdparm -i")
88 * of drives which do not support mword2 DMA but which are
89 * known to work fine with this interface under Linux.
90 */
91 const char *good_dma_drives[] = {"Micropolis 2112A"};
92
93 /*
94 * Our Physical Region Descriptor (PRD) table should be large enough
95 * to handle the biggest I/O request we are likely to see. Since requests
96 * can have no more than 256 sectors, and since the typical blocksize is
97 * two sectors, we can get by with a limit of 128 entries here for the
98 * usual worst case. Most requests seem to include some contiguous blocks,
99 * further reducing the number of table entries required.
100 *
101 * Note that the driver reverts to PIO mode for individual requests that exceed
102 * this limit (possible with 512 byte blocksizes, eg. MSDOS f/s), so handling
103 * 100% of all crazy scenarios here is not necessary.
104 */
105 #define PRD_ENTRIES 128 /* max memory area count per DMA */
106
107 /*
108 * dma_intr() is the handler for disk read/write DMA interrupts
109 */
110 static void dma_intr (ide_drive_t *drive)
/* ![[next]](../icons/right.png)
![[first]](../icons/n_first.png)
![[top]](../icons/top.png)
*/
111 {
112 byte stat, dma_stat;
113 int i;
114 struct request *rq = HWGROUP(drive)->rq;
115 unsigned short dma_base = HWIF(drive)->dma_base;
116
117 dma_stat = inb(dma_base+2); /* get DMA status */
118 outb(inb(dma_base)&~1, dma_base); /* stop DMA operation */
119 stat = GET_STAT(); /* get drive status */
120 if (OK_STAT(stat,DRIVE_READY,drive->bad_wstat|DRQ_STAT)) {
121 if ((dma_stat & 7) == 4) { /* verify good DMA status */
122 rq = HWGROUP(drive)->rq;
123 for (i = rq->nr_sectors; i > 0;) {
124 i -= rq->current_nr_sectors;
125 ide_end_request(1, HWGROUP(drive));
126 }
127 IDE_DO_REQUEST;
128 return;
129 }
130 printk("%s: bad DMA status: 0x%02x\n", drive->name, dma_stat);
131 }
132 sti();
133 if (!ide_error(drive, "dma_intr", stat))
134 IDE_DO_REQUEST;
135 }
136
137 /*
138 * build_dmatable() prepares a dma request.
139 * Returns 0 if all went okay, returns 1 otherwise.
140 */
141 static int build_dmatable (ide_drive_t *drive)
/* ![[previous]](../icons/left.png)
*/
142 {
143 struct request *rq = HWGROUP(drive)->rq;
144 struct buffer_head *bh = rq->bh;
145 unsigned long size, addr, *table = HWIF(drive)->dmatable;
146 unsigned int count = 0;
147
148 do {
149 /*
150 * Determine addr and size of next buffer area. We assume that
151 * individual virtual buffers are always composed linearly in
152 * physical memory. For example, we assume that any 8kB buffer
153 * is always composed of two adjacent physical 4kB pages rather
154 * than two possibly non-adjacent physical 4kB pages.
155 */
156 if (bh == NULL) { /* paging requests have (rq->bh == NULL) */
157 addr = virt_to_bus (rq->buffer);
158 size = rq->nr_sectors << 9;
159 } else {
160 /* group sequential buffers into one large buffer */
161 addr = virt_to_bus (bh->b_data);
162 size = bh->b_size;
163 while ((bh = bh->b_reqnext) != NULL) {
164 if ((addr + size) != virt_to_bus (bh->b_data))
165 break;
166 size += bh->b_size;
167 }
168 }
169
170 /*
171 * Fill in the dma table, without crossing any 64kB boundaries.
172 * We assume 16-bit alignment of all blocks.
173 */
174 while (size) {
175 if (++count >= PRD_ENTRIES) {
176 printk("%s: DMA table too small\n", drive->name);
177 return 1; /* revert to PIO for this request */
178 } else {
179 unsigned long bcount = 0x10000 - (addr & 0xffff);
180 if (bcount > size)
181 bcount = size;
182 *table++ = addr;
183 *table++ = bcount;
184 addr += bcount;
185 size -= bcount;
186 }
187 }
188 } while (bh != NULL);
189 if (count) {
190 *--table |= 0x80000000; /* set End-Of-Table (EOT) bit */
191 return 0;
192 }
193 printk("%s: empty DMA table?\n", drive->name);
194 return 1; /* let the PIO routines handle this weirdness */
195 }
196
197 /*
198 * triton_dmaproc() initiates/aborts DMA read/write operations on a drive.
199 *
200 * The caller is assumed to have selected the drive and programmed the drive's
201 * sector address using CHS or LBA. All that remains is to prepare for DMA
202 * and then issue the actual read/write DMA/PIO command to the drive.
203 *
204 * Returns 0 if all went well.
205 * Returns 1 if DMA read/write could not be started, in which case
206 * the caller should revert to PIO for the current request.
207 */
208 static int triton_dmaproc (ide_dma_action_t func, ide_drive_t *drive)
/* */
209 {
210 const char **list;
211 unsigned long dma_base = HWIF(drive)->dma_base;
212
213 if (func == ide_dma_abort) {
214 outb(inb(dma_base)&~1, dma_base); /* stop DMA */
215 return 0;
216 }
217 if (func == ide_dma_check) {
218 struct hd_driveid *id = drive->id;
219 if (id && (id->capability & 1)) {
220 /* Enable DMA on any drive that supports mword2 DMA */
221 if ((id->field_valid & 2) && (id->dma_mword & 0x404) == 0x404) {
222 drive->using_dma = 1;
223 return 0; /* DMA enabled */
224 }
225 /* Consult the list of known "good" drives */
226 list = good_dma_drives;
227 while (*list) {
228 if (!strcmp(*list++,id->model)) {
229 drive->using_dma = 1;
230 return 0; /* DMA enabled */
231 }
232 }
233 }
234 return 1; /* DMA not enabled */
235 }
236 if (build_dmatable (drive))
237 return 1;
238 outl(virt_to_bus (HWIF(drive)->dmatable), dma_base + 4); /* PRD table */
239 outb((!func) << 3, dma_base); /* specify r/w */
240 outb(0x26, dma_base+2); /* clear status bits */
241 ide_set_handler (drive, &dma_intr); /* issue cmd to drive */
242 OUT_BYTE(func ? WIN_WRITEDMA : WIN_READDMA, IDE_COMMAND_REG);
243 outb(inb(dma_base)|1, dma_base); /* begin DMA */
244 return 0;
245 }
246
247 /*
248 * print_triton_drive_flags() displays the currently programmed options
249 * in the Triton chipset for a given drive.
250 *
251 * If fastDMA is "no", then slow ISA timings are used for DMA data xfers.
252 * If fastPIO is "no", then slow ISA timings are used for PIO data xfers.
253 * If IORDY is "no", then IORDY is assumed to always be asserted.
254 * If PreFetch is "no", then data pre-fetch/post are not used.
255 *
256 * When "fastPIO" and/or "fastDMA" are "yes", then faster PCI timings and
257 * back-to-back 16-bit data transfers are enabled, using the sample_CLKs
258 * and recovery_CLKs (PCI clock cycles) timing parameters for that interface.
259 */
260 static void print_triton_drive_flags (unsigned int unit, byte flags)
/* */
261 {
262 printk(" %s ", unit ? "slave :" : "master:");
263 printk( "fastDMA=%s", (flags&9) ? "on " : "off");
264 printk(" PreFetch=%s", (flags&4) ? "on " : "off");
265 printk(" IORDY=%s", (flags&2) ? "on " : "off");
266 printk(" fastPIO=%s\n", ((flags&9)==1) ? "on " : "off");
267 }
268
269 /*
270 * ide_init_triton() prepares the IDE driver for DMA operation.
271 * This routine is called once, from ide.c during driver initialization,
272 * for each triton chipset which is found (unlikely to be more than one).
273 */
274 void ide_init_triton (byte bus, byte fn)
/* ![[last]](../icons/n_last.png)
*/
275 {
276 int rc = 0, h;
277 unsigned short bmiba, pcicmd;
278 unsigned int timings;
279 extern ide_hwif_t ide_hwifs[];
280
281 ++fn; /* IDE interface is 2nd function on this device */
282 /*
283 * See if IDE and BM-DMA features are enabled:
284 */
285 if ((rc = pcibios_read_config_word(bus, fn, 0x04, &pcicmd)))
286 goto quit;
287 if ((pcicmd & 5) != 5) {
288 if ((pcicmd & 1) == 0)
289 printk("ide: Triton IDE ports are not enabled\n");
290 else
291 printk("ide: Triton BM-DMA feature is not enabled\n");
292 goto quit;
293 }
294 #if 0
295 (void) pcibios_write_config_word(bus, fn, 0x42, 0x8037); /* for my MC2112A */
296 #endif
297 /*
298 * See if ide port(s) are enabled
299 */
300 if ((rc = pcibios_read_config_dword(bus, fn, 0x40, &timings)))
301 goto quit;
302 if (!(timings & 0x80008000)) {
303 printk("ide: Triton IDE ports are not enabled\n");
304 goto quit;
305 }
306 printk("ide: Triton BM-IDE on PCI bus %d function %d\n", bus, fn);
307
308 /*
309 * Get the bmiba base address
310 */
311 if ((rc = pcibios_read_config_word(bus, fn, 0x20, &bmiba)))
312 goto quit;
313 bmiba &= 0xfff0; /* extract port base address */
314
315 /*
316 * Save the dma_base port addr for each interface
317 */
318 for (h = 0; h < MAX_HWIFS; ++h) {
319 ide_hwif_t *hwif = &ide_hwifs[h];
320 unsigned short base, time;
321 if (hwif->io_base == 0x1f0 && (timings & 0x8000)) {
322 time = timings & 0xffff;
323 base = bmiba;
324 } else if (hwif->io_base == 0x170 && (timings & 0x80000000)) {
325 time = timings >> 16;
326 base = bmiba + 8;
327 } else
328 continue;
329 printk(" %s: BusMaster DMA at 0x%04x-0x%04x", hwif->name, base, base+5);
330 if (check_region(base, 6)) {
331 printk(" -- ERROR, PORTS ALREADY IN USE");
332 } else {
333 unsigned long *table;
334 request_region(base, 8, hwif->name);
335 hwif->dma_base = base;
336 table = ide_alloc(2 * PRD_ENTRIES * sizeof(long), 4096);
337 hwif->dmatable = table;
338 outl((unsigned long) table, base + 4);
339 hwif->dmaproc = &triton_dmaproc;
340 }
341 printk("\n %s timing: (0x%04x) sample_CLKs=%d, recovery_CLKs=%d\n",
342 hwif->name, time, ((~time>>12)&3)+2, ((~time>>8)&3)+1);
343 print_triton_drive_flags (0, time & 0xf);
344 print_triton_drive_flags (1, (time >> 4) & 0xf);
345 }
346
347 quit: if (rc) printk("ide: pcibios access failed - %s\n", pcibios_strerror(rc));
348 }
349
![[bottom]](../icons/n_bottom.png){kind=icon}
*/