drivers/scsi/aic7xxx.c

/* */
This source file includes following definitions.
debug
debug_config
aic7xxx_setup
aic7xxx_loadseq
aic7xxx_delay
rcs_version
aic7xxx_info
aic7xxx_putscb
aic7xxx_putdmascb
aic7xxx_getscb
aic7xxx_length
aic7xxx_scsirate
aic7xxx_isr
aic7xxx_probe
read_seeprom
detect_maxscb
aic7xxx_register
aic7xxx_detect
aic7xxx_buildscb
aic7xxx_queue
aic7xxx_kill
aic7xxx_abort
aic7xxx_reset
aic7xxx_biosparam
   1 /*+M*************************************************************************
   2  * Adaptec 274x/284x/294x device driver for Linux.
   3  *
   4  * Copyright (c) 1994 John Aycock
   5  *   The University of Calgary Department of Computer Science.
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2, or (at your option)
  10  * any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; see the file COPYING.  If not, write to
  19  * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
  20  *
  21  * Sources include the Adaptec 1740 driver (aha1740.c), the Ultrastor 24F
  22  * driver (ultrastor.c), various Linux kernel source, the Adaptec EISA
  23  * config file (!adp7771.cfg), the Adaptec AHA-2740A Series User's Guide,
  24  * the Linux Kernel Hacker's Guide, Writing a SCSI Device Driver for Linux,
  25  * the Adaptec 1542 driver (aha1542.c), the Adaptec EISA overlay file
  26  * (adp7770.ovl), the Adaptec AHA-2740 Series Technical Reference Manual,
  27  * the Adaptec AIC-7770 Data Book, the ANSI SCSI specification, the
  28  * ANSI SCSI-2 specification (draft 10c), ...
  29  *
  30  * ----------------------------------------------------------------
  31  *  Modified to include support for wide and twin bus adapters,
  32  *  DMAing of SCBs, tagged queueing, IRQ sharing, bug fixes,
  33  *  and other rework of the code.
  34  *
  35  *  Parts of this driver are based on the FreeBSD driver by Justin
  36  *  T. Gibbs.
  37  *
  38  *  A Boot time option was also added for not resetting the scsi bus.
  39  *
  40  *    Form:  aic7xxx=extended,no_reset
  41  *
  42  *    -- Daniel M. Eischen, deischen@iworks.InterWorks.org, 04/03/95
  43  *
  44  *  $Id: aic7xxx.c,v 2.0 1995/08/02 05:28:42 deang Exp $
  45  *-M*************************************************************************/
  46 
  47 #ifdef MODULE
  48 #include <linux/module.h>
  49 #endif
  50 
  51 #include <stdarg.h>
  52 #include <asm/io.h>
  53 #include <linux/string.h>
  54 #include <linux/errno.h>
  55 #include <linux/kernel.h>
  56 #include <linux/ioport.h>
  57 #include <linux/bios32.h>
  58 #include <linux/delay.h>
  59 #include <linux/sched.h>
  60 #include <linux/pci.h>
  61 #include <linux/proc_fs.h>
  62 #include "../block/blk.h"
  63 #include "sd.h"
  64 #include "scsi.h"
  65 #include "hosts.h"
  66 #include "aic7xxx.h"
  67 
  68 #define AIC7XXX_C_VERSION  "$Revision: 2.0 $"
  69 
  70 #define NUMBER(arr)     (sizeof(arr) / sizeof(arr[0]))
  71 #define MIN(a,b)        ((a < b) ? a : b)
  72 #ifndef TRUE
  73 #  define TRUE 1
  74 #endif
  75 #ifndef FALSE
  76 #  define FALSE 0
  77 #endif
  78 
  79 /*
  80  * Defines for PCI bus support, testing twin bus support, DMAing of
  81  * SCBs, and tagged queueing.
  82  *
  83  *   o PCI bus support - this has been implemented and working since
  84  *     the December 1, 1994 release of this driver. If you don't have
  85  *     a PCI bus and do not wish to configure your kernel with PCI
  86  *     support, then make sure this define is set to the cprrect
  87  *     define for PCI support (CONFIG_PCI) and configure your kernel
  88  *     without PCI support (make config).
  89  *
  90  *   o Twin bus support - this has been tested and does work.
  91  *
  92  *   o DMAing of SCBs - thanks to Kai Makisara, this now works
  93  *
  94  *   o Tagged queueing - this driver is capable of tagged queueing
  95  *     but I am unsure as to how well the higher level driver implements
  96  *     tagged queueing. Therefore, the maximum commands per lun is
  97  *     set to 2. If you want to implement tagged queueing, ensure
  98  *     this define is not commented out.
  99  *
 100  *   o Sharing IRQs - allowed for sharing of IRQs. This will allow
 101  *     for multiple aic7xxx host adapters sharing the same IRQ, but
 102  *     not for sharing IRQs with other devices. The higher level
 103  *     PCI code and interrupt handling needs to be modified to
 104  *     support this.
 105  *
 106  *  Daniel M. Eischen, deischen@iworks.InterWorks.org, 03/11/95
 107  */
 108 
 109 /* Uncomment this for testing twin bus support. */
 110 #define AIC7XXX_TWIN_SUPPORT
 111 
 112 /* Uncomment this for DMAing of SCBs. */
 113 #define AIC7XXX_USE_DMA
 114 
 115 /* Uncomment this for tagged queueing. */
 116 /* #define AIC7XXX_TAGGED_QUEUEING */
 117 
 118 /* Uncomment this for allowing sharing of IRQs. */
 119 #define AIC7XXX_SHARE_IRQS
 120 
 121 /* Set this to the delay in seconds after SCSI bus reset. */
 122 #define AIC7XXX_RESET_DELAY 15
 123 
 124 /*
 125  * Uncomment this to always use scatter/gather lists.
 126  * *NOTE: The sequencer must be changed also!
 127  */
 128 #define AIC7XXX_USE_SG
 129 
 130 /*
 131  * Controller type and options
 132  */
 133 typedef enum {
 134   AIC_NONE,
 135   AIC_274x,    /* EISA aic7770 */
 136   AIC_284x,    /* VLB  aic7770 */
 137   AIC_7870,    /* PCI  aic7870 */
 138   AIC_7850,    /* PCI  aic7850 */
 139   AIC_7872     /* PCI  aic7870 on 394x */
 140 } aha_type;
 141 
 142 typedef enum {
 143   AIC_SINGLE,  /* Single Channel */
 144   AIC_TWIN,    /* Twin Channel */
 145   AIC_WIDE     /* Wide Channel */
 146 } aha_bus_type;
 147 
 148 typedef enum {
 149   AIC_UNKNOWN,
 150   AIC_ENABLED,
 151   AIC_DISABLED
 152 } aha_status_type;
 153 
 154 /*
 155  * There should be a specific return value for this in scsi.h, but
 156  * it seems that most drivers ignore it.
 157  */
 158 #define DID_UNDERFLOW   DID_ERROR
 159 
 160 /*
 161  *  What we want to do is have the higher level scsi driver requeue
 162  *  the command to us. There is no specific driver status for this
 163  *  condition, but the higher level scsi driver will requeue the
 164  *  command on a DID_BUS_BUSY error.
 165  */
 166 #define DID_RETRY_COMMAND DID_BUS_BUSY
 167 
 168 /*
 169  * EISA/VL-bus stuff
 170  */
 171 #define MINSLOT         1
 172 #define MAXSLOT         15
 173 #define SLOTBASE(x)     ((x) << 12)
 174 #define MAXIRQ          15
 175 
 176 /*
 177  * Standard EISA Host ID regs  (Offset from slot base)
 178  */
 179 #define HID0(x)         ((x) + 0xC80)   /* 0,1: msb of ID2, 2-7: ID1      */
 180 #define HID1(x)         ((x) + 0xC81)   /* 0-4: ID3, 5-7: LSB ID2         */
 181 #define HID2(x)         ((x) + 0xC82)   /* product                        */
 182 #define HID3(x)         ((x) + 0xC83)   /* firmware revision              */
 183 
 184 /*
 185  * AIC-7770 I/O range to reserve for a card
 186  */
 187 #define MINREG(x)       ((x) + 0xC00ul)
 188 #define MAXREG(x)       ((x) + 0xCBFul)
 189 
 190 /* -------------------- AIC-7770 offset definitions ----------------------- */
 191 
 192 /*
 193  * SCSI Sequence Control (p. 3-11).
 194  * Each bit, when set starts a specific SCSI sequence on the bus
 195  */
 196 #define SCSISEQ(x)              ((x) + 0xC00ul)
 197 #define         TEMODEO         0x80
 198 #define         ENSELO          0x40
 199 #define         ENSELI          0x20
 200 #define         ENRSELI         0x10
 201 #define         ENAUTOATNO      0x08
 202 #define         ENAUTOATNI      0x04
 203 #define         ENAUTOATNP      0x02
 204 #define         SCSIRSTO        0x01
 205 
 206 /*
 207  * SCSI Transfer Control 1 Register (pp. 3-14,15).
 208  * Controls the SCSI module data path.
 209  */
 210 #define SXFRCTL1(x)             ((x) + 0xC02ul)
 211 #define         BITBUCKET       0x80
 212 #define         SWRAPEN         0x40
 213 #define         ENSPCHK         0x20
 214 #define         STIMESEL        0x18
 215 #define         ENSTIMER        0x04
 216 #define         ACTNEGEN        0x02
 217 #define         STPWEN          0x01            /* Powered Termination */
 218 
 219 /*
 220  * SCSI Control Signal Read Register (p. 3-15).
 221  * Reads the actual state of the SCSI bus pins
 222  */
 223 #define SCSISIGI(x)             ((x) + 0xC03ul)
 224 #define         CDI             0x80
 225 #define         IOI             0x40
 226 #define         MSGI            0x20
 227 #define         ATNI            0x10
 228 #define         SELI            0x08
 229 #define         BSYI            0x04
 230 #define         REQI            0x02
 231 #define         ACKI            0x01
 232 
 233 /*
 234  * SCSI Contol Signal Write Register (p. 3-16).
 235  * Writing to this register modifies the control signals on the bus. Only
 236  * those signals that are allowed in the current mode (Initiator/Target) are
 237  * asserted.
 238  */
 239 #define SCSISIGO(x)             ((x) + 0xC03ul)
 240 #define         CDO             0x80
 241 #define         IOO             0x40
 242 #define         MSGO            0x20
 243 #define         ATNO            0x10
 244 #define         SELO            0x08
 245 #define         BSYO            0x04
 246 #define         REQO            0x02
 247 #define         ACKO            0x01
 248 
 249 /*
 250  * SCSI Rate
 251  */
 252 #define SCSIRATE(x)             ((x) + 0xC04ul)
 253 
 254 /*
 255  * SCSI ID (p. 3-18).
 256  * Contains the ID of the board and the current target on the
 257  * selected channel
 258  */
 259 #define SCSIID(x)               ((x) + 0xC05ul)
 260 #define         TID             0xF0            /* Target ID mask */
 261 #define         OID             0x0F            /* Our ID mask */
 262 
 263 /*
 264  * SCSI Status 0 (p. 3-21)
 265  * Contains one set of SCSI Interrupt codes
 266  * These are most likely of interest to the sequencer
 267  */
 268 #define SSTAT0(x)               ((x) + 0xC0Bul)
 269 #define         TARGET          0x80            /* Board is a target */
 270 #define         SELDO           0x40            /* Selection Done */
 271 #define         SELDI           0x20            /* Board has been selected */
 272 #define         SELINGO         0x10            /* Selection In Progress */
 273 #define         SWRAP           0x08            /* 24bit counter wrap */
 274 #define         SDONE           0x04            /* STCNT = 0x000000 */
 275 #define         SPIORDY         0x02            /* SCSI PIO Ready */
 276 #define         DMADONE         0x01            /* DMA transfer completed */
 277 
 278 /*
 279  * Clear SCSI Interrupt 1 (p. 3-23)
 280  * Writing a 1 to a bit clears the associated SCSI Interrupt in SSTAT1.
 281  */
 282 #define CLRSINT1(x)             ((x) + 0xC0Cul)
 283 #define         CLRSELTIMEO     0x80
 284 #define         CLRATNO         0x40
 285 #define         CLRSCSIRSTI     0x20
 286 /*  UNUSED                      0x10 */
 287 #define         CLRBUSFREE      0x08
 288 #define         CLRSCSIPERR     0x04
 289 #define         CLRPHASECHG     0x02
 290 #define         CLRREQINIT      0x01
 291 
 292 /*
 293  * SCSI Status 1 (p. 3-24)
 294  * These interrupt bits are of interest to the kernel driver
 295  */
 296 #define SSTAT1(x)               ((x) + 0xC0Cul)
 297 #define         SELTO           0x80
 298 #define         ATNTARG         0x40
 299 #define         SCSIRSTI        0x20
 300 #define         PHASEMIS        0x10
 301 #define         BUSFREE         0x08
 302 #define         SCSIPERR        0x04
 303 #define         PHASECHG        0x02
 304 #define         REQINIT         0x01
 305 
 306 /*
 307  * SCSI Interrrupt Mode 1 (pp. 3-28,29).
 308  * Set bits in this register enable the corresponding
 309  * interrupt source.
 310  */
 311 #define SIMODE1(x)              ((x) + 0xC11ul)
 312 #define         ENSELTIMO       0x80
 313 #define         ENATNTARG       0x40
 314 #define         ENSCSIRST       0x20
 315 #define         ENPHASEMIS      0x10
 316 #define         ENBUSFREE       0x08
 317 #define         ENSCSIPERR      0x04
 318 #define         ENPHASECHG      0x02
 319 #define         ENREQINIT       0x01
 320 
 321 /*
 322  * Selection/Reselection ID (p. 3-31)
 323  * Upper four bits are the device id. The ONEBIT is set when the re/selecting
 324  * device did not set its own ID.
 325  */
 326 #define SELID(x)                ((x) + 0xC19ul)
 327 #define         SELID_MASK      0xF0
 328 #define         ONEBIT          0x08
 329 /*  UNUSED                      0x07 */
 330 
 331 /*
 332  * Serial EEPROM Control (p. 4-92 in 7870 Databook)
 333  * Controls the reading and writing of an external serial 1-bit
 334  * EEPROM Device.  In order to access the serial EEPROM, you must
 335  * first set the SEEMS bit that generates a request to the memory
 336  * port for access to the serial EEPROM device.  When the memory
 337  * port is not busy servicing another request, it reconfigures
 338  * to allow access to the serial EEPROM.  When this happens, SEERDY
 339  * gets set high to verify that the memory port access has been
 340  * granted.  See aic7xxx_read_eprom for detailed information on
 341  * the protocol necessary to read the serial EEPROM.
 342  */
 343 #define SEECTL(x)               ((x) + 0xC1Eul)
 344 #define         EXTARBACK       0x80
 345 #define         EXTARBREQ       0x40
 346 #define         SEEMS           0x20
 347 #define         SEERDY          0x10
 348 #define         SEECS           0x08
 349 #define         SEECK           0x04
 350 #define         SEEDO           0x02
 351 #define         SEEDI           0x01
 352 
 353 /*
 354  * SCSI Block Control (p. 3-32)
 355  * Controls Bus type and channel selection. In a twin channel configuration
 356  * addresses 0x00-0x1E are gated to the appropriate channel based on this
 357  * register. SELWIDE allows for the coexistence of 8bit and 16bit devices
 358  * on a wide bus.
 359  */
 360 #define SBLKCTL(x)              ((x) + 0xC1Ful)
 361 /*  UNUSED                      0xC0 */
 362 #define         AUTOFLUSHDIS    0x20            /* used for Rev C check */
 363 /*  UNUSED                      0x10 */
 364 #define         SELBUSB         0x08
 365 /*  UNUSED                      0x04 */
 366 #define         SELWIDE         0x02
 367 /*  UNUSED                      0x01 */
 368 #define         SELSINGLE       0x00
 369 
 370 /*
 371  * Sequencer Control (p. 3-33)
 372  * Error detection mode and speed configuration
 373  */
 374 #define SEQCTL(x)               ((x) + 0xC60ul)
 375 #define         PERRORDIS       0x80
 376 #define         PAUSEDIS        0x40
 377 #define         FAILDIS         0x20
 378 #define         FASTMODE        0x10
 379 #define         BRKADRINTEN     0x08
 380 #define         STEP            0x04
 381 #define         SEQRESET        0x02
 382 #define         LOADRAM         0x01
 383 
 384 /*
 385  * Sequencer RAM Data (p. 3-34)
 386  * Single byte window into the Scratch Ram area starting at the address
 387  * specified by SEQADDR0 and SEQADDR1. To write a full word, simply write
 388  * four bytes in sucessesion. The SEQADDRs will increment after the most
 389  * significant byte is written
 390  */
 391 #define SEQRAM(x)               ((x) + 0xC61ul)
 392 
 393 /*
 394  * Sequencer Address Registers (p. 3-35)
 395  * Only the first bit of SEQADDR1 holds addressing information
 396  */
 397 #define SEQADDR0(x)             ((x) + 0xC62ul)
 398 #define SEQADDR1(x)             ((x) + 0xC63ul)
 399 
 400 #define ACCUM(x)                ((x) + 0xC64ul)         /* accumulator */
 401 
 402 /*
 403  * Board Control (p. 3-43)
 404  */
 405 #define BCTL(x)                 ((x) + 0xC84ul)
 406 /*   RSVD                       0xF0 */
 407 #define         ACE             0x08    /* Support for external processors */
 408 /*   RSVD                       0x06 */
 409 #define         ENABLE          0x01
 410 
 411 /*
 412  * Bus On/Off Time (p. 3-44)
 413  */
 414 #define BUSTIME(x)              ((x) + 0xC85ul)
 415 #define         BOFF            0xF0
 416 #define         BON             0x0F
 417 
 418 /*
 419  * Bus Speed (p. 3-45)
 420  */
 421 #define BUSSPD(x)               ((x) + 0xC86ul)
 422 #define         DFTHRSH         0xC0
 423 #define         STBOFF          0x38
 424 #define         STBON           0x07
 425 
 426 /*
 427  * Host Control (p. 3-47) R/W
 428  * Overal host control of the device.
 429  */
 430 #define HCNTRL(x)               ((x) + 0xC87ul)
 431 /*    UNUSED                    0x80 */
 432 #define         POWRDN          0x40
 433 /*    UNUSED                    0x20 */
 434 #define         SWINT           0x10
 435 #define         IRQMS           0x08
 436 #define         PAUSE           0x04
 437 #define         INTEN           0x02
 438 #define         CHIPRST         0x01
 439 #define         REQ_PAUSE       IRQMS | PAUSE | INTEN
 440 #define         UNPAUSE_274X    IRQMS | INTEN
 441 #define         UNPAUSE_284X    INTEN
 442 #define         UNPAUSE_294X    IRQMS | INTEN
 443 
 444 /*
 445  * SCB Pointer (p. 3-49)
 446  * Gate one of the four SCBs into the SCBARRAY window.
 447  */
 448 #define SCBPTR(x)               ((x) + 0xC90ul)
 449 
 450 /*
 451  * Interrupt Status (p. 3-50)
 452  * Status for system interrupts
 453  */
 454 #define INTSTAT(x)              ((x) + 0xC91ul)
 455 #define         SEQINT_MASK     0xF0            /* SEQINT Status Codes */
 456 #define                 BAD_PHASE       0x00
 457 #define                 SEND_REJECT     0x10
 458 #define                 NO_IDENT        0x20
 459 #define                 NO_MATCH        0x30
 460 #define                 MSG_SDTR        0x40
 461 #define                 MSG_WDTR        0x50
 462 #define                 MSG_REJECT      0x60
 463 #define                 BAD_STATUS      0x70
 464 #define                 RESIDUAL        0x80
 465 #define                 ABORT_TAG       0x90
 466 #define                 AWAITING_MSG    0xa0
 467 #define         BRKADRINT 0x08
 468 #define         SCSIINT   0x04
 469 #define         CMDCMPLT  0x02
 470 #define         SEQINT    0x01
 471 #define         INT_PEND  (BRKADRINT | SEQINT | SCSIINT | CMDCMPLT)
 472 
 473 /*
 474  * Hard Error (p. 3-53)
 475  * Reporting of catastrophic errors. You usually cannot recover from
 476  * these without a full board reset.
 477  */
 478 #define ERROR(x)                ((x) + 0xC92ul)
 479 /*    UNUSED                    0xF0 */
 480 #define         PARERR          0x08
 481 #define         ILLOPCODE       0x04
 482 #define         ILLSADDR        0x02
 483 #define         ILLHADDR        0x01
 484 
 485 /*
 486  * Clear Interrupt Status (p. 3-52)
 487  */
 488 #define CLRINT(x)               ((x) + 0xC92ul)
 489 #define         CLRBRKADRINT    0x08
 490 #define         CLRSCSIINT      0x04
 491 #define         CLRCMDINT       0x02
 492 #define         CLRSEQINT       0x01
 493 
 494 /*
 495  * SCB Auto Increment (p. 3-59)
 496  * Byte offset into the SCB Array and an optional bit to allow auto
 497  * incrementing of the address during download and upload operations
 498  */
 499 #define SCBCNT(x)               ((x) + 0xC9Aul)
 500 #define         SCBAUTO         0x80
 501 #define         SCBCNT_MASK     0x1F
 502 
 503 /*
 504  * Queue In FIFO (p. 3-60)
 505  * Input queue for queued SCBs (commands that the seqencer has yet to start)
 506  */
 507 #define QINFIFO(x)              ((x) + 0xC9Bul)
 508 
 509 /*
 510  * Queue In Count (p. 3-60)
 511  * Number of queued SCBs
 512  */
 513 #define QINCNT(x)               ((x) + 0xC9Cul)
 514 
 515 /*
 516  * Queue Out FIFO (p. 3-61)
 517  * Queue of SCBs that have completed and await the host
 518  */
 519 #define QOUTFIFO(x)             ((x) + 0xC9Dul)
 520 
 521 /*
 522  * Queue Out Count (p. 3-61)
 523  * Number of queued SCBs in the Out FIFO
 524  */
 525 #define QOUTCNT(x)              ((x) + 0xC9Eul)
 526 
 527 #define SCBARRAY(x)             ((x) + 0xCA0ul)
 528 
 529 /* ---------------- END AIC-7770 Register Definitions ----------------- */
 530 
 531 /* --------------------- AIC-7870-only definitions -------------------- */
 532 
 533 #define DSPCISTATUS(x)          ((x) + 0xC86ul)
 534 #define         DFTHRESH        0xC0
 535 
 536 /* Scratch RAM offset definitions */
 537 
 538 /* ---------------------- Scratch RAM Offsets ------------------------- */
 539 /* These offsets are either to values that are initialized by the board's
 540  * BIOS or are specified by the Linux sequencer code. If I can figure out
 541  * how to read the EISA configuration info at probe time, the cards could
 542  * be run without BIOS support installed
 543  */
 544 
 545 /*
 546  * 1 byte per target starting at this address for configuration values
 547  */
 548 #define HA_TARG_SCRATCH(x)      ((x) + 0xC20ul)
 549 
 550 /*
 551  * The sequencer will stick the first byte of any rejected message here so
 552  * we can see what is getting thrown away.
 553  */
 554 #define HA_REJBYTE(x)           ((x) + 0xC31ul)
 555 
 556 /*
 557  * Bit vector of targets that have disconnection disabled.
 558  */
 559 #define HA_DISC_DSB             ((x) + 0xc32ul)
 560 
 561 /*
 562  * Length of pending message
 563  */
 564 #define HA_MSG_LEN(x)           ((x) + 0xC34ul)
 565 
 566 /*
 567  * Outgoing Message Body
 568  */
 569 #define HA_MSG_START(x)         ((x) + 0xC35ul)
 570 
 571 /*
 572  * These are offsets into the card's scratch ram. Some of the values are
 573  * specified in the AHA2742 technical reference manual and are initialized
 574  * by the BIOS at boot time.
 575  */
 576 #define HA_ARG_1(x)             ((x) + 0xC4Aul) /* sdtr <-> rate parameters */
 577 #define HA_RETURN_1(x)          ((x) + 0xC4Aul)
 578 #define         SEND_SENSE      0x80
 579 #define         SEND_SDTR       0x80
 580 #define         SEND_WDTR       0x80
 581 #define         SEND_REJ        0x40
 582 
 583 #define HA_SIGSTATE(x)          ((x) + 0xC4Bul) /* value in SCSISIGO */
 584 #define HA_SCBCOUNT(x)          ((x) + 0xC52ul) /* number of hardware SCBs */
 585 
 586 #define HA_FLAGS(x)             ((x) + 0xC53ul) /* TWIN and WIDE bus flags */
 587 #define         SINGLE_BUS      0x00
 588 #define         TWIN_BUS        0x01
 589 #define         WIDE_BUS        0x02
 590 #define         ACTIVE_MSG      0x20
 591 #define         IDENTIFY_SEEN   0x40
 592 #define         RESELECTING     0x80
 593 
 594 #define HA_ACTIVE0(x)           ((x) + 0xC54ul) /* Active bits; targets 0-7 */
 595 #define HA_ACTIVE1(x)           ((x) + 0xC55ul) /* Active bits; targets 8-15 */
 596 #define SAVED_TCL(x)            ((x) + 0xC56ul) /* Saved target, channel, LUN */
 597 #define WAITING_SCBH(x)         ((x) + 0xC57ul) /* Head of disconnected targets list. */
 598 #define WAITING_SCBT(x)         ((x) + 0xC58ul) /* Tail of disconnected targets list. */
 599 
 600 #define HA_SCSICONF(x)          ((x) + 0xC5Aul) /* SCSI config register */
 601 #define HA_INTDEF(x)            ((x) + 0xC5Cul) /* interrupt def'n register */
 602 #define HA_HOSTCONF(x)          ((x) + 0xC5Dul) /* host config def'n register */
 603 
 604 #define MSG_ABORT               0x06
 605 #define MSG_BUS_DEVICE_RESET    0x0c
 606 #define BUS_8_BIT               0x00
 607 #define BUS_16_BIT              0x01
 608 #define BUS_32_BIT              0x02
 609 
 610 
 611 /*
 612  *
 613  * Define the format of the SEEPROM registers (16 bits).
 614  *
 615  */
 616 struct seeprom_config {
 617 
 618 /*
 619  * SCSI ID Configuration Flags
 620  */
 621 #define CFXFER          0x0007          /* synchronous transfer rate */
 622 #define CFSYNCH         0x0008          /* enable synchronous transfer */
 623 #define CFDISC          0x0010          /* enable disconnection */
 624 #define CFWIDEB         0x0020          /* wide bus device */
 625 /* UNUSED               0x00C0 */
 626 #define CFSTART         0x0100          /* send start unit SCSI command */
 627 #define CFINCBIOS       0x0200          /* include in BIOS scan */
 628 #define CFRNFOUND       0x0400          /* report even if not found */
 629 /* UNUSED               0xF800 */
 630   unsigned short device_flags[16];      /* words 0-15 */
 631 
 632 /*
 633  * BIOS Control Bits
 634  */
 635 #define CFSUPREM        0x0001          /* support all removeable drives */
 636 #define CFSUPREMB       0x0002          /* support removeable drives for boot only */
 637 #define CFBIOSEN        0x0004          /* BIOS enabled */
 638 /* UNUSED               0x0008 */
 639 #define CFSM2DRV        0x0010          /* support more than two drives */
 640 /* UNUSED               0x0060 */
 641 #define CFEXTEND        0x0080          /* extended translation enabled */
 642 /* UNUSED               0xFF00 */
 643   unsigned short bios_control;          /* word 16 */
 644 
 645 /*
 646  * Host Adapter Control Bits
 647  */
 648 /* UNUSED               0x0003 */
 649 #define CFWSTERM        0x0008          /* SCSI high byte termination (wide card) */
 650 #define CFSTERM         0x0004          /* SCSI low byte termination (non-wide cards) */
 651 #define CFSPARITY       0x0010          /* SCSI parity */
 652 /* UNUSED               0x0020 */
 653 #define CFRESETB        0x0040          /* reset SCSI bus at IC initialization */
 654 /* UNUSED               0xFF80 */
 655   unsigned short adapter_control;       /* word 17 */
 656 
 657 /*
 658  * Bus Release, Host Adapter ID
 659  */
 660 #define CFSCSIID        0x000F          /* host adapter SCSI ID */
 661 /* UNUSED               0x00F0 */
 662 #define CFBRTIME        0xFF00          /* bus release time */
 663   unsigned short brtime_id;             /* word 18 */
 664 
 665 /*
 666  * Maximum targets
 667  */
 668 #define CFMAXTARG       0x00FF  /* maximum targets */
 669 /* UNUSED               0xFF00 */
 670   unsigned short max_targets;           /* word 19 */
 671 
 672   unsigned short res_1[11];             /* words 20-30 */
 673   unsigned short checksum;              /* word 31 */
 674 
 675 };
 676 
 677 
 678 #define AIC7XXX_DEBUG
 679 
 680 /*
 681  * Pause the sequencer and wait for it to actually stop - this
 682  * is important since the sequencer can disable pausing for critical
 683  * sections.
 684  */
 685 #define PAUSE_SEQUENCER(p) \
 686   outb(p->pause, HCNTRL(p->base));                      \
 687   while ((inb(HCNTRL(p->base)) & PAUSE) == 0)           \
 688     ;                                                   \
 689 
 690 /*
 691  * Unpause the sequencer. Unremarkable, yet done often enough to
 692  * warrant an easy way to do it.
 693  */
 694 #define UNPAUSE_SEQUENCER(p) \
 695   outb(p->unpause, HCNTRL(p->base))
 696 
 697 /*
 698  * Restart the sequencer program from address zero
 699  */
 700 #define RESTART_SEQUENCER(p) \
 701   do {                                                  \
 702     outb(SEQRESET | FASTMODE, SEQCTL(p->base)); \
 703   } while (inb(SEQADDR0(p->base)) != 0 &&               \
 704            inb(SEQADDR1(p->base)) != 0);                \
 705   UNPAUSE_SEQUENCER(p);
 706 
 707 /*
 708  * If an error occurs during a data transfer phase, run the comand
 709  * to completion - it's easier that way - making a note of the error
 710  * condition in this location. This then will modify a DID_OK status
 711  * into an appropriate error for the higher-level SCSI code.
 712  */
 713 #define aic7xxx_error(cmd)      ((cmd)->SCp.Status)
 714 
 715 /*
 716  * Keep track of the targets returned status.
 717  */
 718 #define aic7xxx_status(cmd)     ((cmd)->SCp.sent_command)
 719 
 720 /*
 721  * The position of the SCSI commands scb within the scb array.
 722  */
 723 #define aic7xxx_position(cmd)   ((cmd)->SCp.have_data_in)
 724 
 725 /*
 726  * Since the sequencer code DMAs the scatter-gather structures
 727  * directly from memory, we use this macro to assert that the
 728  * kernel structure hasn't changed.
 729  */
 730 #define SG_STRUCT_CHECK(sg) \
 731   ((char *)&(sg).address - (char *)&(sg) != 0 ||  \
 732    (char *)&(sg).length  - (char *)&(sg) != 8 ||  \
 733    sizeof((sg).address) != 4 ||                   \
 734    sizeof((sg).length)  != 4 ||                   \
 735    sizeof(sg)           != 12)
 736 
 737 /*
 738  * "Static" structures. Note that these are NOT initialized
 739  * to zero inside the kernel - we have to initialize them all
 740  * explicitly.
 741  *
 742  * We support multiple adapter cards per interrupt, but keep a
 743  * linked list of Scsi_Host structures for each IRQ.  On an interrupt,
 744  * use the IRQ as an index into aic7xxx_boards[] to locate the card
 745  * information.
 746  */
 747 static struct Scsi_Host *aic7xxx_boards[MAXIRQ + 1];
 748 
 749 /*
 750  * When we detect and register the card, it is possible to
 751  * have the card raise a spurious interrupt.  Because we need
 752  * to support multiple cards, we cannot tell which card caused
 753  * the spurious interrupt.  And, we might not even have added
 754  * the card info to the linked list at the time the spurious
 755  * interrupt gets raised.  This variable is suppose to keep track
 756  * of when we are registering a card and how many spurious
 757  * interrupts we have encountered.
 758  *
 759  *   0 - do not allow spurious interrupts.
 760  *   1 - allow 1 spurious interrupt
 761  *   2 - have 1 spurious interrupt, do not allow any more.
 762  *
 763  * I've made it an integer instead of a boolean in case we
 764  * want to allow more than one spurious interrupt for debugging
 765  * purposes.  Otherwise, it could just go from true to false to
 766  * true (or something like that).
 767  *
 768  * When the driver detects the cards, we'll set the count to 1
 769  * for each card detection and registration.  After the registration
 770  * of a card completes, we'll set the count back to 0.  So far, it
 771  * seems to be enough to allow a spurious interrupt only during
 772  * card registration; if a spurious interrupt is going to occur,
 773  * this is where it happens.
 774  *
 775  * We should be able to find a way to avoid getting the spurious
 776  * interrupt.  But until we do, we have to keep this ugly code.
 777  */
 778 static int aic7xxx_spurious_count;
 779 
 780 /*
 781  * The driver keeps up to four scb structures per card in memory. Only the
 782  * first 26 bytes of the structure are valid for the hardware, the rest used
 783  * for driver level bookeeping. The driver is further optimized
 784  * so that we only have to download the first 19 bytes since as long
 785  * as we always use S/G, the last fields should be zero anyway.
 786  */
 787 #ifdef AIC7XXX_USE_SG
 788 #define SCB_DOWNLOAD_SIZE       19      /* amount to actually download */
 789 #else
 790 #define SCB_DOWNLOAD_SIZE       26
 791 #endif
 792 
 793 #define SCB_UPLOAD_SIZE         19      /* amount to actually upload */
 794 
 795 struct aic7xxx_scb {
 796 /* ------------    Begin hardware supported fields    ---------------- */
 797 /*1 */  unsigned char control;
 798 #define SCB_NEEDWDTR 0x80                       /* Initiate Wide Negotiation */
 799 #define SCB_NEEDSDTR 0x40                       /* Initiate Sync Negotiation */
 800 #define SCB_NEEDDMA  0x08                       /* SCB needs to be DMA'd from
 801                                                  * from host memory
 802                                                  */
 803 #define SCB_REJ_MDP      0x80                   /* Reject MDP message */
 804 #define SCB_DISEN        0x40                   /* SCB Disconnect enable */
 805 #define SCB_TE           0x20                   /* Tag enable */
 806 /*      RESERVED         0x10 */
 807 #define SCB_WAITING      0x08                   /* Waiting */
 808 #define SCB_DIS          0x04                   /* Disconnected */
 809 #define SCB_TAG_TYPE     0x03
 810 #define         SIMPLE_QUEUE 0x00               /* Simple Queue */
 811 #define         HEAD_QUEUE   0x01               /* Head of Queue */
 812 #define         ORD_QUEUE    0x02               /* Ordered Queue */
 813 /*              ILLEGAL      0x03 */
 814 /*2 */  unsigned char target_channel_lun;       /* 4/1/3 bits */
 815 /*3 */  unsigned char SG_segment_count;
 816 /*7 */  unsigned char SG_list_pointer[4] __attribute__ ((packed));
 817 /*11*/  unsigned char SCSI_cmd_pointer[4] __attribute__ ((packed));
 818 /*12*/  unsigned char SCSI_cmd_length;
 819 /*14*/  unsigned char RESERVED[2];              /* must be zero */
 820 /*15*/  unsigned char target_status;
 821 /*18*/  unsigned char residual_data_count[3];
 822 /*19*/  unsigned char residual_SG_segment_count;
 823 /*23*/  unsigned char data_pointer[4] __attribute__ ((packed));
 824 /*26*/  unsigned char data_count[3];
 825 /*30*/  unsigned char host_scb[4] __attribute__ ((packed));
 826 /*31*/  u_char next_waiting;            /* Used to thread SCBs awaiting selection. */
 827 #define SCB_LIST_NULL 0x10              /* SCB list equivelent to NULL */
 828 #if 0
 829         /*
 830          *  No real point in transferring this to the
 831          *  SCB registers.
 832          */
 833         unsigned char RESERVED[1];
 834 #endif
 835 
 836         /*-----------------end of hardware supported fields----------------*/
 837         struct aic7xxx_scb *next;       /* next ptr when in free list */
 838         Scsi_Cmnd          *cmd;        /* Scsi_Cmnd for this scb */
 839         int                 state;      /* current state of scb */
 840 #define SCB_FREE               0x00
 841 #define SCB_ACTIVE             0x01
 842 #define SCB_ABORTED            0x02
 843 #define SCB_DEVICE_RESET       0x04
 844 #define SCB_IMMED              0x08
 845 #define SCB_SENSE              0x10
 846         unsigned int        position;       /* Position in scb array */
 847 #ifdef AIC7XXX_USE_SG
 848         struct scatterlist  sg;
 849         struct scatterlist  sense_sg;
 850 #endif
 851         unsigned char       sense_cmd[6];   /* Allocate 6 characters for sense command */
 852 };
 853 
 854 static struct {
 855   unsigned char errno;
 856   const char *errmesg;
 857 } hard_error[] = {
 858   { ILLHADDR,  "Illegal Host Access" },
 859   { ILLSADDR,  "Illegal Sequencer Address referrenced" },
 860   { ILLOPCODE, "Illegal Opcode in sequencer program" },
 861   { PARERR,    "Sequencer Ram Parity Error" }
 862 };
 863 
 864 static unsigned char
 865 generic_sense[] = { REQUEST_SENSE, 0, 0, 0, 255, 0 };
 866 
 867 /*
 868  * The maximum number of SCBs we could have for ANY type
 869  * of card. DON'T FORGET TO CHANGE THE SCB MASK IN THE
 870  * SEQUENCER CODE IF THIS IS MODIFIED!
 871  */
 872 #define AIC7XXX_MAXSCB  16
 873 
 874 /*
 875  * Define a structure used for each host adapter, only one per IRQ.
 876  */
 877 struct aic7xxx_host {
 878   int                      base;             /* card base address */
 879   int                      maxscb;           /* hardware SCBs */
 880   int                      numscb;           /* current number of scbs */
 881   int                      extended;         /* extended xlate? */
 882   aha_type                 type;             /* card type */
 883   aha_bus_type             bus_type;         /* normal/twin/wide bus */
 884   unsigned char            a_scanned;        /* 0 not scanned, 1 scanned */
 885   unsigned char            b_scanned;        /* 0 not scanned, 1 scanned */
 886   unsigned int             isr_count;        /* Interrupt count */
 887   volatile unsigned char   unpause;          /* unpause value for HCNTRL */
 888   volatile unsigned char   pause;            /* pause value for HCNTRL */
 889   volatile unsigned short  needsdtr_copy;    /* default config */
 890   volatile unsigned short  needsdtr;
 891   volatile unsigned short  sdtr_pending;
 892   volatile unsigned short  needwdtr_copy;    /* default config */
 893   volatile unsigned short  needwdtr;
 894   volatile unsigned short  wdtr_pending;
 895   struct seeprom_config    seeprom;
 896   int                      have_seeprom;
 897   struct Scsi_Host        *next;             /* allow for multiple IRQs */
 898   struct aic7xxx_scb       scb_array[AIC7XXX_MAXSCB];  /* active commands */
 899   struct aic7xxx_scb      *free_scb;         /* list of free SCBs */
 900 };
 901 
 902 struct aic7xxx_host_config {
 903   int              irq;        /* IRQ number */
 904   int              base;       /* I/O base */
 905   int              maxscb;     /* hardware SCBs */
 906   int              unpause;    /* unpause value for HCNTRL */
 907   int              pause;      /* pause value for HCNTRL */
 908   int              scsi_id;    /* host SCSI ID */
 909   int              scsi_id_b;  /* host SCSI ID B channel for twin cards */
 910   int              extended;   /* extended xlate? */
 911   int              busrtime;   /* bus release time */
 912   aha_type         type;       /* card type */
 913   aha_bus_type     bus_type;   /* normal/twin/wide bus */
 914   aha_status_type  parity;     /* bus parity enabled/disabled */
 915   aha_status_type  low_term;   /* bus termination low byte */
 916   aha_status_type  high_term;  /* bus termination high byte (wide cards only) */
 917 };
 918 
 919 /*
 920  * Valid SCSIRATE values. (p. 3-17)
 921  * Provides a mapping of tranfer periods in ns to the proper value to
 922  * stick in the scsiscfr reg to use that transfer rate.
 923  */
 924 static struct {
 925   short period;
 926   short rate;
 927   const char *english;
 928 } aic7xxx_syncrates[] = {
 929   { 100,   0,  "10.0" },
 930   { 125,   1,  "8.0"  },
 931   { 150,   2,  "6.67" },
 932   { 175,   3,  "5.7"  },
 933   { 200,   4,  "5.0"  },
 934   { 225,   5,  "4.4"  },
 935   { 250,   6,  "4.0"  },
 936   { 275,   7,  "3.6"  }
 937 };
 938 
 939 static int num_aic7xxx_syncrates =
 940     sizeof(aic7xxx_syncrates) / sizeof(aic7xxx_syncrates[0]);
 941 
 942 #ifdef AIC7XXX_DEBUG
 943 
 944 static void
 945 debug(const char *fmt, ...)
     /*  */
 946 {
 947   va_list ap;
 948   char buf[256];
 949 
 950   va_start(ap, fmt);
 951   vsprintf(buf, fmt, ap);
 952   printk(buf);
 953   va_end(ap);
 954 }
 955 
 956 static void
 957 debug_config(struct aic7xxx_host_config *p)
     /*  */
 958 {
 959   int host_conf, scsi_conf;
 960   unsigned char brelease;
 961   unsigned char dfthresh;
 962 
 963   static int DFT[] = { 0, 50, 75, 100 };
 964   static int SST[] = { 256, 128, 64, 32 };
 965   static const char *BUSW[] = { "", "-TWIN", "-WIDE" };
 966 
 967   host_conf = inb(HA_HOSTCONF(p->base));
 968   scsi_conf = inb(HA_SCSICONF(p->base));
 969 
 970   /*
 971    * The 7870 gets the bus release time and data FIFO threshold
 972    * from the serial EEPROM (stored in the config structure) and
 973    * scsi_conf register respectively.  The 7770 gets the bus
 974    * release time and data FIFO threshold from the scsi_conf and
 975    * host_conf registers respectively.
 976    */
 977   if ((p->type == AIC_274x) || (p->type == AIC_284x))
 978   {
 979     dfthresh = host_conf >> 6;
 980   }
 981   else
 982   {
 983     dfthresh = scsi_conf >> 6;
 984   }
 985 
 986   brelease = p->busrtime;
 987   if (brelease == 0)
 988   {
 989     brelease = 2;
 990   }
 991 
 992   switch (p->type)
 993   {
 994     case AIC_274x:
 995       printk("AIC7770%s AT EISA SLOT %d:\n", BUSW[p->bus_type], p->base >> 12);
 996       break;
 997 
 998     case AIC_284x:
 999       printk("AIC7770%s AT VLB SLOT %d:\n", BUSW[p->bus_type], p->base >> 12);
1000       break;
1001 
1002     case AIC_7870:
1003       printk("AIC7870%s (PCI-bus):\n", BUSW[p->bus_type]);
1004       break;
1005 
1006     case AIC_7850:
1007       printk("AIC7850%s (PCI-bus):\n", BUSW[p->bus_type]);
1008       break;
1009 
1010     case AIC_7872:
1011       printk("AIC7872%s (PCI-bus):\n", BUSW[p->bus_type]);
1012       break;
1013 
1014     default:
1015       panic("aic7xxx debug_config: internal error\n");
1016   }
1017 
1018   printk("    irq %d\n"
1019          "    bus release time %d bclks\n"
1020          "    data fifo threshold %d%%\n",
1021          p->irq,
1022          brelease,
1023          DFT[dfthresh]);
1024 
1025   printk("    SCSI CHANNEL A:\n"
1026          "        scsi id %d\n"
1027          "        scsi selection timeout %d ms\n"
1028          "        scsi bus reset at power-on %sabled\n",
1029          scsi_conf & 0x07,
1030          SST[(scsi_conf >> 3) & 0x03],
1031          (scsi_conf & 0x40) ? "en" : "dis");
1032 
1033   if (((p->type == AIC_274x) || (p->type == AIC_284x)) && p->parity == AIC_UNKNOWN)
1034   { /* Set the parity for 7770 based cards. */
1035     p->parity = (scsi_conf & 0x20) ? AIC_ENABLED : AIC_DISABLED;
1036   }
1037   if (p->parity != AIC_UNKNOWN)
1038   {
1039     printk("        scsi bus parity %sabled\n",
1040            (p->parity == AIC_ENABLED) ? "en" : "dis");
1041   }
1042 
1043   if (p->type == AIC_274x)
1044   {
1045     p->low_term = (scsi_conf & 0x80) ? AIC_ENABLED : AIC_DISABLED;
1046   }
1047   if (p->low_term != AIC_UNKNOWN)
1048   {
1049     printk("        scsi bus termination (low byte) %sabled\n",
1050           (p->low_term == AIC_ENABLED) ? "en" : "dis");
1051   }
1052   if ((p->bus_type == AIC_WIDE) && (p->high_term != AIC_UNKNOWN))
1053   {
1054     printk("        scsi bus termination (high byte) %sabled\n",
1055           (p->high_term == AIC_ENABLED) ? "en" : "dis");
1056   }
1057 }
1058 #else
1059 #  define debug(fmt, args...)
1060 #  define debug_config(x)
1061 #endif AIC7XXX_DEBUG
1062 
1063 /*
1064  * XXX - these options apply unilaterally to _all_ 274x/284x/294x
1065  *       cards in the system. This should be fixed, but then,
1066  *       does anyone really have more than one in a machine?
1067  */
1068 static int aic7xxx_extended = 0;        /* extended translation on? */
1069 static int aic7xxx_no_reset = 0;        /* no resetting of SCSI bus */
1070 
1071 /*+F*************************************************************************
1072  * Function:
1073  *   aic7xxx_setup
1074  *
1075  * Description:
1076  *   Handle Linux boot parameters.
1077  *-F*************************************************************************/
1078 void
1079 aic7xxx_setup(char *s, int *dummy)
     /*  */
1080 {
1081   int   i;
1082   char *p;
1083 
1084   static struct {
1085     const char *name;
1086     int *flag;
1087   } options[] = {
1088     { "extended",    &aic7xxx_extended },
1089     { "no_reset",    &aic7xxx_no_reset },
1090     { NULL,          NULL}
1091   };
1092 
1093   for (p = strtok(s, ","); p; p = strtok(NULL, ","))
1094   {
1095     for (i = 0; options[i].name; i++)
1096     {
1097       if (!strcmp(options[i].name, p))
1098       {
1099         *(options[i].flag) = !0;
1100       }
1101     }
1102   }
1103 }
1104 
1105 /*+F*************************************************************************
1106  * Function:
1107  *   aic7xxx_loadseq
1108  *
1109  * Description:
1110  *   Load the sequencer code into the controller memory.
1111  *-F*************************************************************************/
1112 static void
1113 aic7xxx_loadseq(int base)
     /*  */
1114 {
1115   static unsigned char seqprog[] = {
1116     /*
1117      * Each sequencer instruction is 29 bits
1118      * long (fill in the excess with zeroes)
1119      * and has to be loaded from least -> most
1120      * significant byte, so this table has the
1121      * byte ordering reversed.
1122      */
1123 #   include "aic7xxx_seq.h"
1124   };
1125 
1126   /*
1127    * When the AIC-7770 is paused (as on chip reset), the
1128    * sequencer address can be altered and a sequencer
1129    * program can be loaded by writing it, byte by byte, to
1130    * the sequencer RAM port - the Adaptec documentation
1131    * recommends using REP OUTSB to do this, hence the inline
1132    * assembly. Since the address autoincrements as we load
1133    * the program, reset it back to zero afterward. Disable
1134    * sequencer RAM parity error detection while loading, and
1135    * make sure the LOADRAM bit is enabled for loading.
1136    */
1137   outb(PERRORDIS | SEQRESET | LOADRAM, SEQCTL(base));
1138 
1139   asm volatile("cld\n\t"
1140                "rep\n\t"
1141                "outsb"
1142                : /* no output */
1143                :"S" (seqprog), "c" (sizeof(seqprog)), "d" (SEQRAM(base))
1144                :"si", "cx", "dx");
1145 
1146   /*
1147    * WARNING!  This is a magic sequence!  After extensive
1148    * experimentation, it seems that you MUST turn off the
1149    * LOADRAM bit before you play with SEQADDR again, else
1150    * you will end up with parity errors being flagged on
1151    * your sequencer program. (You would also think that
1152    * turning off LOADRAM and setting SEQRESET to reset the
1153    * address to zero would work, but you need to do it twice
1154    * for it to take effect on the address. Timing problem?)
1155    */
1156   do {
1157     /*
1158      * Actually, reset it until
1159      * the address shows up as
1160      * zero just to be safe..
1161      */
1162     outb(SEQRESET | FASTMODE, SEQCTL(base));
1163   } while ((inb(SEQADDR0(base)) != 0) && (inb(SEQADDR1(base)) != 0));
1164 }
1165 
1166 /*+F*************************************************************************
1167  * Function:
1168  *   aic7xxx_delay
1169  *
1170  * Description:
1171  *   Delay for specified amount of time.
1172  *-F*************************************************************************/
1173 static void
1174 aic7xxx_delay(int seconds)
     /*  */
1175 {
1176   unsigned long i;
1177 
1178   i = jiffies + (seconds * HZ);  /* compute time to stop */
1179 
1180   while (jiffies < i)
1181   {
1182     ;  /* Do nothing! */
1183   }
1184 }
1185 
1186 /*+F*************************************************************************
1187  * Function:
1188  *   rcs_version
1189  *
1190  * Description:
1191  *   Return a string containing just the RCS version number from either
1192  *   an Id or Revison RCS clause.
1193  *-F*************************************************************************/
1194 const char *
1195 rcs_version(const char *version_info)
     /*  */
1196 {
1197   static char buf[10];
1198   char *bp, *ep;
1199 
1200   bp = NULL;
1201   strcpy(buf, "????");
1202   if (!strncmp(version_info, "$Id: ", 5))
1203   {
1204     if ((bp = strchr(version_info, ' ')) != NULL)
1205     {
1206       bp++;
1207       if ((bp = strchr(bp, ' ')) != NULL)
1208       {
1209         bp++;
1210       }
1211     }
1212   }
1213   else
1214   {
1215     if (!strncmp(version_info, "$Revision: ", 11))
1216     {
1217       if ((bp = strchr(version_info, ' ')) != NULL)
1218       {
1219         bp++;
1220       }
1221     }
1222   }
1223 
1224   if (bp != NULL)
1225   {
1226     if ((ep = strchr(bp, ' ')) != NULL)
1227     {
1228       register int len = ep - bp;
1229 
1230       strncpy(buf, bp, len);
1231       buf[len] = '\0';
1232     }
1233   }
1234 
1235   return buf;
1236 }
1237 
1238 /*+F*************************************************************************
1239  * Function:
1240  *   aic7xxx_info
1241  *
1242  * Description:
1243  *   Return a string describing the driver.
1244  *-F*************************************************************************/
1245 const char *
1246 aic7xxx_info(struct Scsi_Host *notused)
     /*  */
1247 {
1248   static char buffer[128];
1249 
1250   strcpy(buffer, "Adaptec AHA274x/284x/294x (EISA/VLB/PCI-Fast SCSI) ");
1251   strcat(buffer, rcs_version(AIC7XXX_C_VERSION));
1252   strcat(buffer, "/");
1253   strcat(buffer, rcs_version(AIC7XXX_H_VERSION));
1254   strcat(buffer, "/");
1255   strcat(buffer, rcs_version(AIC7XXX_SEQ_VER));
1256 
1257   return buffer;
1258 }
1259 
1260 /*+F*************************************************************************
1261  * Function:
1262  *   aic7xxx_putscb
1263  *
1264  * Description:
1265  *   Transfer a SCB to the controller.
1266  *-F*************************************************************************/
1267 static void
1268 aic7xxx_putscb(int base, struct aic7xxx_scb *scb)
     /*  */
1269 {
1270 #ifdef AIC7XXX_USE_DMA
1271   /*
1272    * All we need to do, is to output the position
1273    * of the SCB in the SCBARRAY to the QINFIFO
1274    * of the host adapter.
1275    */
1276   outb(scb->position, QINFIFO(base));
1277 #else
1278   /*
1279    * By turning on the SCB auto increment, any reference
1280    * to the SCB I/O space postincrements the SCB address
1281    * we're looking at. So turn this on and dump the relevant
1282    * portion of the SCB to the card.
1283    */
1284   outb(SCBAUTO, SCBCNT(base));
1285 
1286   asm volatile("cld\n\t"
1287                "rep\n\t"
1288                "outsb"
1289                : /* no output */
1290                :"S" (scb), "c" (SCB_DOWNLOAD_SIZE), "d" (SCBARRAY(base))
1291                :"si", "cx", "dx");
1292 
1293   outb(0, SCBCNT(base));
1294 #endif
1295 }
1296 
1297 /*+F*************************************************************************
1298  * Function:
1299  *   aic7xxx_putdmascb
1300  *
1301  * Description:
1302  *   DMA a SCB to the controller.
1303  *-F*************************************************************************/
1304 static void
1305 aic7xxx_putdmascb(int base, struct aic7xxx_scb *scb)
     /*  */
1306 {
1307   /*
1308    * By turning on the SCB auto increment, any reference
1309    * to the SCB I/O space postincrements the SCB address
1310    * we're looking at. So turn this on and dump the relevant
1311    * portion of the SCB to the card.
1312    */
1313   outb(SCBAUTO, SCBCNT(base));
1314 
1315   asm volatile("cld\n\t"
1316                "rep\n\t"
1317                "outsb"
1318                : /* no output */
1319                :"S" (scb), "c" (31), "d" (SCBARRAY(base))
1320                :"si", "cx", "dx");
1321 
1322   outb(0, SCBCNT(base));
1323 }
1324 
1325 /*+F*************************************************************************
1326  * Function:
1327  *   aic7xxx_getscb
1328  *
1329  * Description:
1330  *   Get a SCB from the controller.
1331  *-F*************************************************************************/
1332 static void
1333 aic7xxx_getscb(int base, struct aic7xxx_scb *scb)
     /*  */
1334 {
1335   /*
1336    * This is almost identical to aic7xxx_putscb().
1337    */
1338   outb(SCBAUTO, SCBCNT(base));
1339 
1340   asm volatile("cld\n\t"
1341                "rep\n\t"
1342                "insb"
1343                : /* no output */
1344                :"D" (scb), "c" (SCB_UPLOAD_SIZE), "d" (SCBARRAY(base))
1345                :"di", "cx", "dx");
1346 
1347   outb(0, SCBCNT(base));
1348 }
1349 
1350 /*+F*************************************************************************
1351  * Function:
1352  *   aic7xxx_length
1353  *
1354  * Description:
1355  *   How much data should be transferred for this SCSI command? Stop
1356  *   at segment sg_last if it's a scatter-gather command so we can
1357  *   compute underflow easily.
1358  *-F*************************************************************************/
1359 static unsigned
1360 aic7xxx_length(Scsi_Cmnd *cmd, int sg_last)
     /*  */
1361 {
1362   int i, segments;
1363   unsigned length;
1364   struct scatterlist *sg;
1365 
1366   segments = cmd->use_sg - sg_last;
1367   sg = (struct scatterlist *) cmd->buffer;
1368 
1369   if (cmd->use_sg)
1370   {
1371     for (i = length = 0; i < cmd->use_sg && i < segments; i++)
1372     {
1373       length += sg[i].length;
1374     }
1375   }
1376   else
1377   {
1378     length = cmd->request_bufflen;
1379   }
1380 
1381   return (length);
1382 }
1383 
1384 /*+F*************************************************************************
1385  * Function:
1386  *   aic7xxx_scsirate
1387  *
1388  * Description:
1389  *   Look up the valid period to SCSIRATE conversion in our table
1390  *-F*************************************************************************/
1391 static void
1392 aic7xxx_scsirate(unsigned char *scsirate, unsigned char period,
     /*  */
1393                  unsigned char offset, int target)
1394 {
1395   int i;
1396 
1397   for (i = 0; i < num_aic7xxx_syncrates; i++)
1398   {
1399     if ((aic7xxx_syncrates[i].period - period) >= 0)
1400     {
1401       *scsirate = (aic7xxx_syncrates[i].rate << 4) | (offset & 0x0F);
1402       printk("aic7xxx: target %d now synchronous at %sMb/s, offset = 0x%x\n",
1403              target, aic7xxx_syncrates[i].english, offset);
1404       return;
1405     }
1406   }
1407 
1408   /*
1409    * Default to asyncronous transfer
1410    */
1411   *scsirate = 0;
1412   printk("aic7xxx: target %d using asynchronous transfers\n", target);
1413 }
1414 
1415 /*+F*************************************************************************
1416  * Function:
1417  *   aic7xxx_isr
1418  *
1419  * Description:
1420  *   SCSI controller interrupt handler.
1421  *
1422  *   NOTE: Since we declared this using SA_INTERRUPT, interrupts should
1423  *         be disabled all through this function unless we say otherwise.
1424  *-F*************************************************************************/
1425 static void
1426 aic7xxx_isr(int irq, struct pt_regs * regs)
     /*  */
1427 {
1428   int base, intstat;
1429   struct aic7xxx_host *p;
1430   struct aic7xxx_scb *scb;
1431   unsigned char active, ha_flags, transfer;
1432   unsigned char scsi_id, bus_width;
1433   unsigned char offset, rate, scratch;
1434   unsigned char max_offset, rej_byte;
1435   unsigned char head, tail;
1436   unsigned short target_mask;
1437   long flags;
1438   void *addr;
1439   int actual;
1440   int target, tcl;
1441   int scbptr;
1442   Scsi_Cmnd *cmd;
1443 
1444   p = (struct aic7xxx_host *) aic7xxx_boards[irq]->hostdata;
1445 
1446   /*
1447    * Search for the host with a pending interrupt.  If we can't find
1448    * one, then we've encountered a spurious interrupt.
1449    */
1450   while ((p != NULL) && !(inb(INTSTAT(p->base)) & INT_PEND))
1451   {
1452     if (p->next == NULL)
1453     {
1454       p = NULL;
1455     }
1456     else
1457     {
1458       p = (struct aic7xxx_host *) p->next->hostdata;
1459     }
1460   }
1461 
1462   if (p == NULL)
1463   {
1464     if (aic7xxx_spurious_count == 1)
1465     {
1466       aic7xxx_spurious_count = 2;
1467       printk("aic7xxx_isr: Encountered spurious interrupt.\n");
1468       return;
1469     }
1470     else
1471     {
1472       /*
1473        * The best we can do is to set p back to head of list and process
1474        * the erroneous interrupt - most likely a BRKADRINT.
1475        */
1476       p = (struct aic7xxx_host *) aic7xxx_boards[irq]->hostdata;
1477     }
1478   }
1479 
1480   p->isr_count++; /* Keep track of interrupts for /proc/scsi */
1481 
1482   if ((p->a_scanned == 0) && (p->isr_count == 1))
1483   {
1484     /*
1485      * We must only have one card at this IRQ and it must have been
1486      * added to the board data before the spurious interrupt occurred.
1487      * It is sufficient that we check isr_count and not the spurious
1488      * interrupt count.
1489      */
1490     printk("aic7xxx_isr: Encountered spurious interrupt.\n");
1491     return;
1492   }
1493 
1494   base = p->base;
1495   /*
1496    * Handle all the interrupt sources - especially for SCSI
1497    * interrupts, we won't get a second chance at them.
1498    */
1499   intstat = inb(INTSTAT(base));
1500 
1501   if (intstat & BRKADRINT)
1502   {
1503     int i;
1504     unsigned char errno = inb(ERROR(base));
1505 
1506     printk("aic7xxx_isr: brkadrint (0x%x):\n", errno);
1507     for (i = 0; i < NUMBER(hard_error); i++)
1508     {
1509       if (errno & hard_error[i].errno)
1510       {
1511         printk("  %s\n", hard_error[i].errmesg);
1512       }
1513     }
1514 
1515     panic("aic7xxx_isr: brkadrint, error = 0x%x, seqaddr = 0x%x\n",
1516           inb(ERROR(base)),
1517           inb(SEQADDR1(base)) << 8 | inb(SEQADDR0(base)));
1518   }
1519 
1520   if (intstat & SEQINT)
1521   {
1522     /*
1523      * Although the sequencer is paused immediately on
1524      * a SEQINT, an interrupt for a SCSIINT or a CMDCMPLT
1525      * condition will have unpaused the sequencer before
1526      * this point.
1527      */
1528     PAUSE_SEQUENCER(p);
1529 
1530     switch (intstat & SEQINT_MASK)
1531     {
1532       case BAD_PHASE:
1533         panic("aic7xxx_isr: unknown scsi bus phase\n");
1534         break;
1535 
1536       case SEND_REJECT:
1537         rej_byte = inb(HA_REJBYTE(base));
1538         scsi_id = inb(SCSIID(base)) >> 0x04;
1539         scbptr = inb(SCBPTR(base));
1540         scb = &(p->scb_array[scbptr]);
1541         if (rej_byte != 0x20)
1542         {
1543           debug("aic7xxx_isr warning: issuing message reject, 1st byte 0x%x\n",
1544                 rej_byte);
1545         }
1546         else
1547         {
1548           printk("aic7xxx_isr warning: Tagged message rejected for target %d,"
1549                  " channel %c.\n",
1550                  scsi_id, (inb(SBLKCTL(base)) & SELBUSB ? 'B': 'A'));
1551           scb->cmd->device->tagged_supported = 0;
1552           scb->cmd->device->tagged_queue = 0;
1553         }
1554         break;
1555 
1556       case NO_IDENT:
1557         panic("aic7xxx_isr: reconnecting target %d at seqaddr 0x%x "
1558               "didn't issue IDENTIFY message\n",
1559               (inb(SELID(base)) >> 4) & 0x0F,
1560               (inb(SEQADDR1(base)) << 8) | inb(SEQADDR0(base)));
1561         break;
1562 
1563       case NO_MATCH:
1564         tcl = inb(SCBARRAY(base) + 1);
1565         target = (tcl >> 4) & 0x0F;
1566         /* Purposefully mask off the top bit of targets 8-15. */
1567         target_mask = 0x01 << (target & 0x07);
1568 
1569         debug("aic7xxx_isr: sequencer couldn't find match "
1570               "for reconnecting target %d, channel %d, lun %d - "
1571               "issuing ABORT\n", target, (tcl & 0x08) >> 3, tcl & 0x07);
1572         if (tcl & 0x88)
1573         {
1574           /* Second channel stores its info in byte
1575            * two of HA_ACTIVE
1576            */
1577           active = inb(HA_ACTIVE1(base));
1578           active = active & ~(target_mask);
1579           outb(active, HA_ACTIVE1(base));
1580         }
1581         else
1582         {
1583           active = inb(HA_ACTIVE0(base));
1584           active = active & ~(target_mask);
1585           outb(active, HA_ACTIVE0(base));
1586         }
1587 #ifdef AIC7XXX_USE_DMA
1588         outb(SCB_NEEDDMA, SCBARRAY(base));
1589 #endif
1590 
1591         /*
1592          * Check out why this use to be outb(0x80, CLRINT(base))
1593          * clear the timeout
1594          */
1595         outb(CLRSELTIMEO, CLRSINT1(base));
1596         RESTART_SEQUENCER(p);
1597         break;
1598 
1599       case MSG_SDTR:
1600         /*
1601          * Help the sequencer to translate the negotiated
1602          * transfer rate. Transfer is 1/4 the period
1603          * in ns as is returned by the sync negotiation
1604          * message. So, we must multiply by four.
1605          */
1606         transfer = (inb(HA_ARG_1(base)) << 2);
1607         offset = inb(ACCUM(base));
1608         scsi_id = inb(SCSIID(base)) >> 0x04;
1609         if (inb(SBLKCTL(base)) & 0x08)
1610         {
1611           scsi_id = scsi_id + 8;  /* B channel */
1612         }
1613         target_mask = (0x01 << scsi_id);
1614         scratch = inb(HA_TARG_SCRATCH(base) + scsi_id);
1615         /*
1616          * The maximum offset for a wide device is 0x08; for a
1617          * 8-bit bus device the maximum offset is 0x0f.
1618          */
1619         if (scratch & 0x80)
1620         {
1621           max_offset = 0x08;
1622         }
1623         else
1624         {
1625           max_offset = 0x0f;
1626         }
1627         aic7xxx_scsirate(&rate, transfer, MIN(offset, max_offset), scsi_id);
1628         /*
1629          * Preserve the wide transfer flag.
1630          */
1631         rate = rate | (scratch & 0x80);
1632         outb(rate, HA_TARG_SCRATCH(base) + scsi_id);
1633         outb(rate, SCSIRATE(base));
1634         if ((rate & 0xf) == 0)
1635         { /*
1636            * The requested rate was so low that asynchronous transfers
1637            * are faster (not to mention the controller won't support
1638            * them), so we issue a reject to ensure we go to asynchronous
1639            * transfers.
1640            */
1641            outb(SEND_REJ, HA_RETURN_1(base));
1642         }
1643         else
1644         {
1645           /*
1646            * See if we initiated Sync Negotiation
1647            */
1648           if (p->sdtr_pending & target_mask)
1649           {
1650             /*
1651              * Don't send an SDTR back to the target.
1652              */
1653             outb(0, HA_RETURN_1(base));
1654           }
1655           else
1656           {
1657             /*
1658              * Send our own SDTR in reply.
1659              */
1660             printk("aic7xxx_isr: Sending SDTR!!\n");
1661             outb(SEND_SDTR, HA_RETURN_1(base));
1662           }
1663         }
1664         /*
1665          * Clear the flags.
1666          */
1667         p->needsdtr = p->needsdtr & ~target_mask;
1668         p->sdtr_pending = p->sdtr_pending & ~target_mask;
1669         break;
1670 
1671       case MSG_WDTR:
1672       {
1673         bus_width = inb(ACCUM(base));
1674         scsi_id = inb(SCSIID(base)) >> 0x04;
1675         if (inb(SBLKCTL(base)) & 0x08)
1676         {
1677           scsi_id = scsi_id + 8;  /* B channel */
1678         }
1679         printk("aic7xxx_isr: Received MSG_WDTR, scsi_id = %d, "
1680                "needwdtr = 0x%x\n", scsi_id, p->needwdtr);
1681         scratch = inb(HA_TARG_SCRATCH(base) + scsi_id);
1682 
1683         target_mask = (0x01 << scsi_id);
1684         if (p->wdtr_pending & target_mask)
1685         {
1686           /*
1687            * Don't send an WDTR back to the target, since we asked first.
1688            */
1689           outb(0, HA_RETURN_1(base));
1690           switch (bus_width)
1691           {
1692             case BUS_8_BIT:
1693               scratch = scratch & 0x7F;
1694               break;
1695 
1696             case BUS_16_BIT:
1697               printk("aic7xxx_isr: target %d using 16 bit transfers\n",
1698                      scsi_id);
1699               scratch = scratch | 0x80;
1700               break;
1701           }
1702         }
1703         else
1704         {
1705           /*
1706            * Send our own WDTR in reply.
1707            */
1708           printk("aic7xxx_isr: Will send WDTR!!\n");
1709           switch (bus_width)
1710           {
1711             case BUS_8_BIT:
1712               scratch = scratch & 0x7F;
1713               break;
1714 
1715             case BUS_32_BIT:
1716               /* Negotiate 16 bits. */
1717               bus_width = BUS_16_BIT;
1718               /* Yes, we mean to fall thru here */
1719 
1720             case BUS_16_BIT:
1721               printk("aic7xxx_isr: target %d using 16 bit transfers\n",
1722                      scsi_id);
1723               scratch = scratch | 0x80;
1724               break;
1725           }
1726           outb(bus_width | SEND_WDTR, HA_RETURN_1(base));
1727         }
1728         p->needwdtr = p->needwdtr & ~target_mask;
1729         p->wdtr_pending = p->wdtr_pending & ~target_mask;
1730         outb(scratch, HA_TARG_SCRATCH(base) + scsi_id);
1731         outb(scratch, SCSIRATE(base));
1732         break;
1733       }
1734 
1735       case MSG_REJECT:
1736       {
1737         /*
1738          * What we care about here is if we had an
1739          * outstanding SDTR or WDTR message for this
1740          * target. If we did, this is a signal that
1741          * the target is refusing negotiation.
1742          */
1743 
1744         unsigned char targ_scratch, scsi_id;
1745         unsigned short mask;
1746 
1747         scsi_id = inb(SCSIID(base)) >> 0x04;
1748         if (inb(SBLKCTL(base)) & 0x08)
1749         {
1750           scsi_id = scsi_id + 8;
1751         }
1752 
1753         mask = (0x01 << scsi_id);
1754 
1755         targ_scratch = inb(HA_TARG_SCRATCH(base) + scsi_id);
1756 
1757         if (p->wdtr_pending & mask)
1758         {
1759           /*
1760            * note 8bit xfers and clear flag
1761            */
1762           targ_scratch = targ_scratch & 0x7F;
1763           p->needwdtr = p->needwdtr & ~mask;
1764           p->wdtr_pending = p->wdtr_pending & ~mask;
1765           outb(targ_scratch, HA_TARG_SCRATCH(base) + scsi_id);
1766           printk("aic7xxx: target %d refusing WIDE negotiation. Using "
1767                  "8 bit transfers\n", scsi_id);
1768         }
1769         else
1770         {
1771           if (p->sdtr_pending & mask)
1772           {
1773             /*
1774              * note asynch xfers and clear flag
1775              */
1776             targ_scratch = targ_scratch & 0xF0;
1777             p->needsdtr = p->needsdtr & ~mask;
1778             p->sdtr_pending = p->sdtr_pending & ~mask;
1779             outb(targ_scratch, HA_TARG_SCRATCH(base) + scsi_id);
1780             printk("aic7xxx: target %d refusing syncronous negotiation. Using "
1781                    "asyncronous transfers\n", scsi_id);
1782           }
1783           /*
1784            * Otherwise, we ignore it.
1785            */
1786         }
1787         outb(targ_scratch, HA_TARG_SCRATCH(base) + scsi_id);
1788         outb(targ_scratch, SCSIRATE(base));
1789         break;
1790       }
1791 
1792       case BAD_STATUS:
1793         scsi_id = inb(SCSIID(base)) >> 0x04;
1794         scbptr = inb(SCBPTR(base));
1795         scb = &(p->scb_array[scbptr]);
1796         outb(0, HA_RETURN_1(base));   /* CHECK_CONDITION may change this */
1797         if ((scb->state != SCB_ACTIVE) || (scb->cmd == NULL))
1798         {
1799           printk("aic7xxx_isr: referenced scb not valid "
1800                  "during seqint 0x%x scb(%d) state(%x), cmd(%x)\n",
1801                  intstat, scbptr, scb->state, (unsigned int) scb->cmd);
1802         }
1803         else
1804         {
1805           cmd = scb->cmd;
1806           aic7xxx_getscb(base, scb);
1807           aic7xxx_status(cmd) = scb->target_status;
1808 
1809           cmd->result = cmd->result | scb->target_status;
1810 
1811           /*
1812            * This test is just here for debugging purposes.
1813            * It will go away when the timeout problem is resolved.
1814            */
1815           switch (status_byte(scb->target_status))
1816           {
1817             case GOOD:
1818               break;
1819 
1820             case CHECK_CONDITION:
1821               if ((aic7xxx_error(cmd) == 0) && !(cmd->flags & WAS_SENSE))
1822               {
1823                 void         *req_buf;
1824 #ifndef AIC7XXX_USE_SG
1825                 unsigned int  req_buflen;
1826 #endif
1827 
1828                 /* Update the timeout for the SCSI command. */
1829 /*                update_timeout(cmd, SENSE_TIMEOUT); */
1830 
1831                 /* Send a sense command to the requesting target. */
1832                 cmd->flags = cmd->flags | WAS_SENSE;
1833                 memcpy((void *) scb->sense_cmd, (void *) generic_sense,
1834                        sizeof(generic_sense));
1835 
1836                 scb->sense_cmd[1] = cmd->lun << 5;
1837                 scb->sense_cmd[4] = sizeof(cmd->sense_buffer);
1838 
1839 #ifdef AIC7XXX_USE_SG
1840                 scb->sense_sg.address = (char *) &cmd->sense_buffer;
1841                 scb->sense_sg.length = sizeof(cmd->sense_buffer);
1842                 req_buf = &scb->sense_sg;
1843 #else
1844                 req_buf = &cmd->sense_buffer;
1845                 req_buflen = sizeof(cmd->sense_buffer);
1846 #endif
1847                 cmd->cmd_len = COMMAND_SIZE(cmd->cmnd[0]);
1848                 memset(scb, 0, SCB_DOWNLOAD_SIZE);
1849                 scb->target_channel_lun = ((cmd->target << 4) & 0xF0) |
1850                     ((cmd->channel & 0x01) << 3) | (cmd->lun & 0x07);
1851                 addr = scb->sense_cmd;
1852                 scb->SCSI_cmd_length = COMMAND_SIZE(scb->sense_cmd[0]);
1853                 memcpy(scb->SCSI_cmd_pointer, &addr,
1854                        sizeof(scb->SCSI_cmd_pointer));
1855 #ifdef AIC7XXX_USE_SG
1856                 scb->SG_segment_count = 1;
1857                 memcpy(scb->SG_list_pointer, &req_buf,
1858                         sizeof(scb->SG_list_pointer));
1859 #else
1860                 scb->SG_segment_count = 0;
1861                 memcpy(scb->data_pointer, &req_buf,
1862                         sizeof(scb->data_pointer));
1863                 memcpy(scb->data_count, &req_buflen, 3);
1864 #endif
1865 
1866                 outb(SCBAUTO, SCBCNT(base));
1867                 asm volatile("cld\n\t"
1868                              "rep\n\t"
1869                              "outsb"
1870                              : /* no output */
1871                              :"S" (scb), "c" (SCB_DOWNLOAD_SIZE), "d" (SCBARRAY(base))
1872                              :"si", "cx", "dx");
1873                 outb(0, SCBCNT(base));
1874                 outb(SCB_LIST_NULL, (SCBARRAY(base) + 30));
1875 
1876                 /*
1877                  * Add this SCB to the "waiting for selection" list.
1878                  */
1879                 head = inb(WAITING_SCBH(base));
1880                 tail = inb(WAITING_SCBT(base));
1881                 if (head & SCB_LIST_NULL)
1882                 { /* list is empty */
1883                   head = scb->position;
1884                   tail = SCB_LIST_NULL;
1885                 }
1886                 else
1887                 {
1888                   if (tail & SCB_LIST_NULL)
1889                   { /* list has one element */
1890                     tail = scb->position;
1891                     outb(head, SCBPTR(base));
1892                     outb(tail, (SCBARRAY(base) + 30));
1893                   }
1894                   else
1895                   { /* list has more than one element */
1896                     outb(tail, SCBPTR(base));
1897                     tail = scb->position;
1898                     outb(tail, (SCBARRAY(base) + 30));
1899                   }
1900                 }
1901                 outb(head, WAITING_SCBH(base));
1902                 outb(tail, WAITING_SCBT(base));
1903                 outb(SEND_SENSE, HA_RETURN_1(base));
1904               }  /* first time sense, no errors */
1905               else
1906               {
1907                 /*
1908                  * Indicate that we asked for sense, have the sequencer do
1909                  * a normal command complete, and have the scsi driver handle
1910                  * this condition.
1911                  */
1912                 cmd->flags = cmd->flags | ASKED_FOR_SENSE;
1913               }
1914               break;
1915 
1916             case BUSY:
1917               printk("aic7xxx_isr: Target busy\n");
1918               if (!aic7xxx_error(cmd))
1919               {
1920                 aic7xxx_error(cmd) = DID_BUS_BUSY;
1921               }
1922               break;
1923 
1924             case QUEUE_FULL:
1925               printk("aic7xxx_isr: Queue full\n");
1926               if (!aic7xxx_error(cmd))
1927               {
1928                 aic7xxx_error(cmd) = DID_RETRY_COMMAND;
1929               }
1930               break;
1931 
1932             default:
1933               printk("aic7xxx_isr: Unexpected target status 0x%x\n",
1934                      scb->target_status);
1935               if (!aic7xxx_error(cmd))
1936               {
1937                 aic7xxx_error(cmd) = DID_RETRY_COMMAND;
1938               }
1939               break;
1940           }  /* end switch */
1941         }  /* end else of */
1942         break;
1943 
1944       case RESIDUAL:
1945         scbptr = inb(SCBPTR(base));
1946         scb = &(p->scb_array[scbptr]);
1947         if ((scb->state != SCB_ACTIVE) || (scb->cmd == NULL))
1948         {
1949           printk("aic7xxx_isr: referenced scb not valid "
1950                  "during seqint 0x%x scb(%d) state(%x), cmd(%x)\n",
1951                  intstat, scbptr, scb->state, (unsigned int) scb->cmd);
1952         }
1953         else
1954         {
1955           cmd = scb->cmd;
1956           /*
1957            *  Don't destroy valid residual information with
1958            *  residual coming from a check sense operation.
1959            */
1960           if (!(cmd->flags & WAS_SENSE))
1961           {
1962             /*
1963              *  We had an underflow. At this time, there's only
1964              *  one other driver that bothers to check for this,
1965              *  and cmd->underflow seems to be set rather half-
1966              *  heartedly in the higher-level SCSI code.
1967              */
1968             actual = aic7xxx_length(cmd, scb->residual_SG_segment_count);
1969 
1970             actual -= ((inb(SCBARRAY(base + 17)) << 16) |
1971                        (inb(SCBARRAY(base + 16)) <<  8) |
1972                        inb(SCBARRAY(base + 15)));
1973 
1974             if (actual < cmd->underflow)
1975             {
1976               printk("aic7xxx: target %d underflow - "
1977                      "wanted (at least) %u, got %u\n",
1978                      cmd->target, cmd->underflow, actual);
1979 
1980               aic7xxx_error(cmd) = DID_RETRY_COMMAND;
1981               aic7xxx_status(cmd) = scb->target_status;
1982             }
1983           }
1984         }
1985         break;
1986 
1987       case ABORT_TAG:
1988         scbptr = inb(SCBPTR(base));
1989         scb = &(p->scb_array[scbptr]);
1990         if ((scb->state != SCB_ACTIVE) || (scb->cmd == NULL))
1991         {
1992           printk("aic7xxx_isr: referenced scb not valid "
1993                  "during seqint 0x%x scb(%d) state(%x), cmd(%x)\n",
1994                  intstat, scbptr, scb->state, (unsigned int) scb->cmd);
1995         }
1996         else
1997         {
1998           cmd = scb->cmd;
1999           /*
2000            * We didn't recieve a valid tag back from the target
2001            * on a reconnect.
2002            */
2003           printk("aic7xxx_isr: invalid tag recieved on channel %c "
2004                  "target %d, lun %d -- sending ABORT_TAG\n",
2005                   (cmd->channel & 0x01) ? 'B':'A',
2006                   cmd->target, cmd->lun & 0x07);
2007           /*
2008            *  This is a critical section, since we don't want the
2009            *  queue routine mucking with the host data.
2010            */
2011           save_flags(flags);
2012           cli();
2013 
2014           /*
2015            *  Process the command after marking the scb as free
2016            *  and adding it to the free list.
2017            */
2018           scb->state = SCB_FREE;
2019           scb->cmd = NULL;
2020           scb->next = p->free_scb;      /* preserve next pointer */
2021           p->free_scb = scb;            /* add at head of list */
2022 
2023           restore_flags(flags);
2024           cmd->result = (DID_RETRY_COMMAND << 16);
2025           cmd->scsi_done(cmd);
2026         }
2027         break;
2028 
2029       case AWAITING_MSG:
2030         scbptr = inb(SCBPTR(base));
2031         scb = &(p->scb_array[scbptr]);
2032         if ((scb->state != SCB_ACTIVE) || (scb->cmd == NULL))
2033         {
2034           printk("aic7xxx_isr: referenced scb not valid "
2035                  "during seqint 0x%x scb(%d) state(%x), cmd(%x)\n",
2036                  intstat, scbptr, scb->state, (unsigned int) scb->cmd);
2037         }
2038         else
2039         {
2040           /*
2041            * This SCB had a zero length command, informing the sequencer
2042            * that we wanted to send a special message to this target.
2043            * We only do this for BUS_DEVICE_RESET messages currently.
2044            */
2045            if (scb->state & SCB_DEVICE_RESET)
2046            {
2047              outb(MSG_BUS_DEVICE_RESET, HA_MSG_START(base));
2048              outb(1, HA_MSG_LEN(base));
2049            }
2050            else
2051            {
2052              panic("aic7xxx_isr: AWAITING_SCB for an SCB that does "
2053                    "not have a waiting message");
2054            }
2055         }
2056         break;
2057 
2058       default:               /* unknown */
2059         debug("aic7xxx_isr: seqint, intstat = 0x%x, scsisigi = 0x%x\n",
2060               intstat, inb(SCSISIGI(base)));
2061         break;
2062     }
2063     outb(CLRSEQINT, CLRINT(base));
2064     UNPAUSE_SEQUENCER(p);
2065   }
2066 
2067   if (intstat & SCSIINT)
2068   {
2069     int status = inb(SSTAT1(base));
2070 
2071     scbptr = inb(SCBPTR(base));
2072     scb = &p->scb_array[scbptr];
2073     if ((scb->state != SCB_ACTIVE) || (scb->cmd == NULL))
2074     {
2075       printk("aic7xxx_isr: no command for scb (scsiint)\n");
2076       /*
2077        * Turn off the interrupt and set status
2078        * to zero, so that it falls through the
2079        * reset of the SCSIINT code.
2080        */
2081       outb(status, CLRSINT1(base));
2082       UNPAUSE_SEQUENCER(p);
2083       outb(CLRSCSIINT, CLRINT(base));
2084       status = 0;
2085       scb = NULL;
2086     }
2087     else
2088     {
2089       cmd = scb->cmd;
2090 
2091       /*
2092        * Only the SCSI Status 1 register has information
2093        * about exceptional conditions that we'd have a
2094        * SCSIINT about; anything in SSTAT0 will be handled
2095        * by the sequencer. Note that there can be multiple
2096        * bits set.
2097        */
2098       if (status & SELTO)
2099       {
2100         unsigned char target_mask = (1 << (cmd->target & 0x07));
2101         unsigned char waiting;
2102 
2103         /*
2104          * Hardware selection timer has expired. Turn
2105          * off SCSI selection sequence.
2106          */
2107         outb(ENRSELI, SCSISEQ(base));
2108         cmd->result = (DID_TIME_OUT << 16);
2109         /*
2110          * Clear an pending messages for the timed out
2111          * target and mark the target as free.
2112          */
2113         ha_flags = inb(HA_FLAGS(base));
2114         outb(ha_flags & ~ACTIVE_MSG, HA_FLAGS(base));
2115 
2116         if (scb->target_channel_lun & 0x88)
2117         {
2118           active = inb(HA_ACTIVE1(base));
2119           active = active & ~(target_mask);
2120           outb(active, HA_ACTIVE1(base));
2121         }
2122         else
2123         {
2124           active = inb(HA_ACTIVE0(base));
2125           active = active & ~(target_mask);
2126           outb(active, HA_ACTIVE0(base));
2127         }
2128 
2129 #ifdef AIC7XXX_USE_DMA
2130         outb(SCB_NEEDDMA, SCBARRAY(base));
2131 #endif
2132 
2133         /*
2134          * Shut off the offending interrupt sources, reset
2135          * the sequencer address to zero and unpause it,
2136          * then call the high-level SCSI completion routine.
2137          *
2138          * WARNING!  This is a magic sequence!  After many
2139          * hours of guesswork, turning off the SCSI interrupts
2140          * in CLRSINT? does NOT clear the SCSIINT bit in
2141          * INTSTAT. By writing to the (undocumented, unused
2142          * according to the AIC-7770 manual) third bit of
2143          * CLRINT, you can clear INTSTAT. But, if you do it
2144          * while the sequencer is paused, you get a BRKADRINT
2145          * with an Illegal Host Address status, so the
2146          * sequencer has to be restarted first.
2147          */
2148         outb(CLRSELTIMEO, CLRSINT1(base));
2149 
2150         outb(CLRSCSIINT, CLRINT(base));
2151 
2152         /* Shift the waiting for selection queue forward */
2153         waiting = inb(WAITING_SCBH(base));
2154         outb(waiting, SCBPTR(base));
2155         waiting = inb(SCBARRAY(base) + 30);
2156         outb(waiting, WAITING_SCBH(base));
2157 
2158         RESTART_SEQUENCER(p);
2159         /*
2160          * This is a critical section, since we don't want the
2161          * queue routine mucking with the host data.
2162          */
2163         save_flags(flags);
2164         cli();
2165 
2166         /*
2167          * Process the command after marking the scb as free
2168          * and adding it to the free list.
2169          */
2170         scb->state = SCB_FREE;
2171         scb->cmd = NULL;
2172         scb->next = p->free_scb;        /* preserve next pointer */
2173         p->free_scb = scb;              /* add at head of list */
2174 
2175         restore_flags(flags);
2176 
2177         cmd->scsi_done(cmd);
2178 #if 0
2179   printk("aic7xxx_isr: SELTO scb(%d) state(%x), cmd(%x)\n",
2180          scb->position, scb->state, (unsigned int) scb->cmd);
2181 #endif
2182       }
2183       else
2184       {
2185         if (status & SCSIPERR)
2186         {
2187           /*
2188            * A parity error has occurred during a data
2189            * transfer phase. Flag it and continue.
2190            */
2191           printk("aic7xxx: parity error on target %d, "
2192                  "channel %d, lun %d\n",
2193                  cmd->target,
2194                  cmd->channel & 0x01,
2195                  cmd->lun & 0x07);
2196           aic7xxx_error(cmd) = DID_PARITY;
2197 
2198           /*
2199            * Clear interrupt and resume as above.
2200            */
2201           outb(CLRSCSIPERR, CLRSINT1(base));
2202           UNPAUSE_SEQUENCER(p);
2203 
2204           outb(CLRSCSIINT, CLRINT(base));
2205           scb = NULL;
2206         }
2207         else
2208         {
2209           if (!(status & BUSFREE))
2210           {
2211              /*
2212               * We don't know what's going on. Turn off the
2213               * interrupt source and try to continue.
2214               */
2215              printk("aic7xxx_isr: sstat1 = 0x%x\n", status);
2216              outb(status, CLRSINT1(base));
2217              UNPAUSE_SEQUENCER(p);
2218              outb(CLRSCSIINT, CLRINT(base));
2219              scb = NULL;
2220           }
2221         }
2222       }
2223     }  /* else */
2224   }
2225 
2226   if (intstat & CMDCMPLT)
2227   {
2228     int complete;
2229 
2230     /*
2231      * The sequencer will continue running when it
2232      * issues this interrupt. There may be >1 commands
2233      * finished, so loop until we've processed them all.
2234      */
2235     do {
2236       complete = inb(QOUTFIFO(base));
2237 
2238       scb = &(p->scb_array[complete]);
2239       if ((scb->state != SCB_ACTIVE) || (scb->cmd == NULL))
2240       {
2241         printk("aic7xxx warning: "
2242                "no command for scb %d (cmdcmplt)\n"
2243                "QOUTCNT = %d, SCB state = 0x%x, CMD = 0x%x\n",
2244                complete, inb(QOUTFIFO(base)),
2245                scb->state, (unsigned int) scb->cmd);
2246         outb(CLRCMDINT, CLRINT(base));
2247         continue;
2248       }
2249       cmd = scb->cmd;
2250 
2251       cmd->result = (aic7xxx_error(cmd) << 16) | aic7xxx_status(cmd);
2252       if ((cmd->flags & WAS_SENSE) && !(cmd->flags & ASKED_FOR_SENSE))
2253       { /* Got sense information. */
2254         cmd->flags = cmd->flags & ASKED_FOR_SENSE;
2255       }
2256 #if 0
2257       printk("aic7xxx_intr: (complete) state = %d, cmd = 0x%x, free = 0x%x\n",
2258              scb->state, (unsigned int) scb->cmd, (unsigned int) p->free_scb);
2259 #endif
2260       /*
2261        * This is a critical section, since we don't want the
2262        * queue routine mucking with the host data.
2263        */
2264       save_flags(flags);
2265       cli();
2266 
2267       scb->state = SCB_FREE;
2268       scb->next = p->free_scb;
2269       scb->cmd = NULL;
2270       p->free_scb = &(p->scb_array[scb->position]);
2271 
2272       restore_flags(flags);
2273 #if 0
2274   if (scb != &p->scb_array[scb->position])
2275   {
2276     printk("aic7xxx_isr: (complete) address mismatch, pos %d\n", scb->position);
2277   }
2278   printk("aic7xxx_isr: (complete) state = %d, cmd = 0x%x, free = 0x%x\n",
2279          scb->state, (unsigned int) scb->cmd, (unsigned int) p->free_scb);
2280 #endif
2281 
2282       cmd->scsi_done(cmd);
2283 
2284       /*
2285        * Clear interrupt status before checking
2286        * the output queue again. This eliminates
2287        * a race condition whereby a command could
2288        * complete between the queue poll and the
2289        * interrupt clearing, so notification of the
2290        * command being complete never made it back
2291        * up to the kernel.
2292        */
2293       outb(CLRCMDINT, CLRINT(base));
2294     } while (inb(QOUTCNT(base)));
2295   }
2296 }
2297 
2298 /*+F*************************************************************************
2299  * Function:
2300  *   aic7xxx_probe
2301  *
2302  * Description:
2303  *   Probing for EISA boards: it looks like the first two bytes
2304  *   are a manufacturer code - three characters, five bits each:
2305  *
2306  *               BYTE 0   BYTE 1   BYTE 2   BYTE 3
2307  *              ?1111122 22233333 PPPPPPPP RRRRRRRR
2308  *
2309  *   The characters are baselined off ASCII '@', so add that value
2310  *   to each to get the real ASCII code for it. The next two bytes
2311  *   appear to be a product and revision number, probably vendor-
2312  *   specific. This is what is being searched for at each port,
2313  *   and what should probably correspond to the ID= field in the
2314  *   ECU's .cfg file for the card - if your card is not detected,
2315  *   make sure your signature is listed in the array.
2316  *
2317  *   The fourth byte's lowest bit seems to be an enabled/disabled
2318  *   flag (rest of the bits are reserved?).
2319  *-F*************************************************************************/
2320 static aha_type
2321 aic7xxx_probe(int slot, int base)
     /*  */
2322 {
2323   int i;
2324   unsigned char buf[4];
2325 
2326   static struct {
2327     int n;
2328     unsigned char signature[sizeof(buf)];
2329     aha_type type;
2330   } AIC7xxx[] = {
2331     { 4, { 0x04, 0x90, 0x77, 0x71 }, AIC_274x },  /* host adapter 274x */
2332     { 4, { 0x04, 0x90, 0x77, 0x70 }, AIC_274x },  /* motherboard 274x  */
2333     { 4, { 0x04, 0x90, 0x77, 0x56 }, AIC_284x },  /* 284x, BIOS enabled */
2334     { 4, { 0x04, 0x90, 0x77, 0x57 }, AIC_284x }   /* 284x, BIOS disabled */
2335   };
2336 
2337   /*
2338    * The VL-bus cards need to be primed by
2339    * writing before a signature check.
2340    */
2341   for (i = 0; i < sizeof(buf); i++)
2342   {
2343     outb(0x80 + i, base);
2344     buf[i] = inb(base + i);
2345   }
2346 
2347   for (i = 0; i < NUMBER(AIC7xxx); i++)
2348   {
2349     /*
2350      * Signature match on enabled card?
2351      */
2352     if (!memcmp(buf, AIC7xxx[i].signature, AIC7xxx[i].n))
2353     {
2354       if (inb(base + 4) & 1)
2355       {
2356         return (AIC7xxx[i].type);
2357       }
2358 
2359       printk("aic7xxx disabled at slot %d, ignored\n", slot);
2360     }
2361   }
2362 
2363   return (AIC_NONE);
2364 }
2365 
2366 /*+F*************************************************************************
2367  * Function:
2368  *   read_seeprom
2369  *
2370  * Description:
2371  *   Reads the serial EEPROM and returns 1 if successful and 0 if
2372  *   not successful.
2373  *
2374  *   The instruction set of the 93C46 chip is as follows:
2375  *
2376  *               Start  OP
2377  *     Function   Bit  Code  Address    Data     Description
2378  *     -------------------------------------------------------------------
2379  *     READ        1    10   A5 - A0             Reads data stored in memory,
2380  *                                               starting at specified address
2381  *     EWEN        1    00   11XXXX              Write enable must preceed
2382  *                                               all programming modes
2383  *     ERASE       1    11   A5 - A0             Erase register A5A4A3A2A1A0
2384  *     WRITE       1    01   A5 - A0   D15 - D0  Writes register
2385  *     ERAL        1    00   10XXXX              Erase all registers
2386  *     WRAL        1    00   01XXXX    D15 - D0  Writes to all registers
2387  *     EWDS        1    00   00XXXX              Disables all programming
2388  *                                               instructions
2389  *     *Note: A value of X for address is a don't care condition.
2390  *
2391  *   The 93C46 has a four wire interface: clock, chip select, data in, and
2392  *   data out.  In order to perform one of the above functions, you need
2393  *   to enable the chip select for a clock period (typically a minimum of
2394  *   1 usec, with the clock high and low a minimum of 750 and 250 nsec
2395  *   respectively.  While the chip select remains high, you can clock in
2396  *   the instructions (above) starting with the start bit, followed by the
2397  *   OP code, Address, and Data (if needed).  For the READ instruction, the
2398  *   requested 16-bit register contents is read from the data out line but
2399  *   is preceded by an initial zero (leading 0, followed by 16-bits, MSB
2400  *   first).  The clock cycling from low to high initiates the next data
2401  *   bit to be sent from the chip.
2402  *
2403  *   The 7870 interface to the 93C46 serial EEPROM is through the SEECTL
2404  *   register.  After successful arbitration for the memory port, the
2405  *   SEECS bit of the SEECTL register is connected to the chip select.
2406  *   The SEECK, SEEDO, and SEEDI are connected to the clock, data out,
2407  *   and data in lines respectively.  The SEERDY bit of SEECTL is useful
2408  *   in that it gives us an 800 nsec timer.  After a write to the SEECTL
2409  *   register, the SEERDY goes high 800 nsec later.  The one exception
2410  *   to this is when we first request access to the memory port.  The
2411  *   SEERDY goes high to signify that access has been granted and, for
2412  *   this case, has no implied timing.
2413  *
2414  *-F*************************************************************************/
2415 static int
2416 read_seeprom(int base, struct seeprom_config *sc)
     /*  */
2417 {
2418   int i = 0, k = 0;
2419   unsigned long timeout;
2420   unsigned char temp;
2421   unsigned short checksum = 0;
2422   unsigned short *seeprom = (unsigned short *) sc;
2423   struct seeprom_cmd {
2424     unsigned char len;
2425     unsigned char bits[3];
2426   };
2427   struct seeprom_cmd seeprom_read = {3, {1, 1, 0}};
2428 
2429 #define CLOCK_PULSE(p) \
2430   while ((inb(SEECTL(base)) & SEERDY) == 0)     \
2431   {                                             \
2432     ;  /* Do nothing */                         \
2433   }
2434 
2435   /*
2436    * Request access of the memory port.  When access is
2437    * granted, SEERDY will go high.  We use a 1 second
2438    * timeout which should be near 1 second more than
2439    * is needed.  Reason: after the 7870 chip reset, there
2440    * should be no contention.
2441    */
2442   outb(SEEMS, SEECTL(base));
2443   timeout = jiffies + 100;  /* 1 second timeout */
2444   while ((jiffies < timeout) && ((inb(SEECTL(base)) & SEERDY) == 0))
2445   {
2446     ;  /* Do nothing!  Wait for access to be granted. */
2447   }
2448   if ((inb(SEECTL(base)) & SEERDY) == 0)
2449   {
2450     outb(0, SEECTL(base));
2451     return (0);
2452   }
2453 
2454   /*
2455    * Read the first 32 registers of the seeprom.  For the 7870,
2456    * the 93C46 SEEPROM is a 1024-bit device with 64 16-bit registers
2457    * but only the first 32 are used by Adaptec BIOS.  The loop
2458    * will range from 0 to 31.
2459    */
2460   for (k = 0; k < (sizeof(*sc) / 2); k++)
2461   {
2462     /* Send chip select for one clock cycle. */
2463     outb(SEEMS | SEECK | SEECS, SEECTL(base));
2464     CLOCK_PULSE(base);
2465 
2466     /*
2467      * Now we're ready to send the read command followed by the
2468      * address of the 16-bit register we want to read.
2469      */
2470     for (i = 0; i < seeprom_read.len; i++)
2471     {
2472       temp = SEEMS | SEECS | (seeprom_read.bits[i] << 1);
2473       outb(temp, SEECTL(base));
2474       CLOCK_PULSE(base);
2475       temp = temp ^ SEECK;
2476       outb(temp, SEECTL(base));
2477       CLOCK_PULSE(base);
2478     }
2479     /* Send the 6 bit address (MSB first, LSB last). */
2480     for (i = 5; i >= 0; i--)
2481     {
2482       temp = k;
2483       temp = (temp >> i) & 1;  /* Mask out all but lower bit. */
2484       temp = SEEMS | SEECS | (temp << 1);
2485       outb(temp, SEECTL(base));
2486       CLOCK_PULSE(base);
2487       temp = temp ^ SEECK;
2488       outb(temp, SEECTL(base));
2489       CLOCK_PULSE(base);
2490     }
2491 
2492     /*
2493      * Now read the 16 bit register.  An initial 0 precedes the
2494      * register contents which begins with bit 15 (MSB) and ends
2495      * with bit 0 (LSB).  The initial 0 will be shifted off the
2496      * top of our word as we let the loop run from 0 to 16.
2497      */
2498     for (i = 0; i <= 16; i++)
2499     {
2500       temp = SEEMS | SEECS;
2501       outb(temp, SEECTL(base));
2502       CLOCK_PULSE(base);
2503       temp = temp ^ SEECK;
2504       seeprom[k] = (seeprom[k] << 1) | (inb(SEECTL(base)) & SEEDI);
2505       outb(temp, SEECTL(base));
2506       CLOCK_PULSE(base);
2507     }
2508 
2509     /*
2510      * The serial EEPROM has a checksum in the last word.  Keep a
2511      * running checksum for all words read except for the last
2512      * word.  We'll verify the checksum after all words have been
2513      * read.
2514      */
2515     if (k < (sizeof(*sc) / 2) - 1)
2516     {
2517       checksum = checksum + seeprom[k];
2518     }
2519 
2520     /* Reset the chip select for the next command cycle. */
2521     outb(SEEMS, SEECTL(base));
2522     CLOCK_PULSE(base);
2523     outb(SEEMS | SEECK, SEECTL(base));
2524     CLOCK_PULSE(base);
2525     outb(SEEMS, SEECTL(base));
2526     CLOCK_PULSE(base);
2527   }
2528 
2529   if (checksum != sc->checksum)
2530   {
2531     printk("aic7xxx: SEEPROM checksum error, ignoring SEEPROM settings.\n");
2532     return (0);
2533   }
2534 
2535 #if 0
2536   printk("Computed checksum 0x%x, checksum read 0x%x\n", checksum, sc->checksum);
2537   printk("Serial EEPROM:");
2538   for (k = 0; k < (sizeof(*sc) / 2); k++)
2539   {
2540     if (((k % 8) == 0) && (k != 0))
2541     {
2542       printk("\n              ");
2543     }
2544     printk(" 0x%x", seeprom[k]);
2545   }
2546   printk("\n");
2547 #endif
2548 
2549   /* Release access to the memory port and the serial EEPROM. */
2550   outb(0, SEECTL(base));
2551   return (1);
2552 }
2553 
2554 /*+F*************************************************************************
2555  * Function:
2556  *   detect_maxscb
2557  *
2558  * Description:
2559  *   Return the maximum number of SCB's allowed for a given controller.
2560  *-F*************************************************************************/
2561 static int
2562 detect_maxscb(aha_type type, int base)
     /*  */
2563 {
2564   unsigned char sblkctl_reg;
2565   int maxscb = 0;
2566 
2567   switch (type)
2568   {
2569     case AIC_274x:
2570     case AIC_284x:
2571       /*
2572        * Check for Rev C or E boards. Rev E boards can supposedly have
2573        * more than 4 SCBs, while the Rev C boards are limited to 4 SCBs.
2574        * Until we know how to access more than 4 SCBs for the Rev E chips,
2575        * we limit them, along with the Rev C chips, to 4 SCBs.
2576        *
2577        * The Rev E boards have a read/write autoflush bit in the
2578        * SBLKCTL registor, while in the Rev C boards it is read only.
2579        */
2580       sblkctl_reg = inb(SBLKCTL(base)) ^ AUTOFLUSHDIS;
2581       outb(sblkctl_reg, SBLKCTL(base));
2582       if (inb(SBLKCTL(base)) == sblkctl_reg)
2583       {  /* We detected a Rev E board. */
2584         printk("aic7770: Rev E and subsequent; using 4 SCB's\n");
2585         outb(sblkctl_reg ^ AUTOFLUSHDIS, SBLKCTL(base));
2586         maxscb = 4;
2587       }
2588       else
2589       {
2590         printk("aic7770: Rev C and previous; using 4 SCB's\n");
2591         maxscb = 4;
2592       }
2593       break;
2594 
2595     case AIC_7850:
2596       maxscb = 3;
2597       break;
2598 
2599     case AIC_7870:
2600       maxscb = 16;
2601       break;
2602 
2603     case AIC_7872:
2604       /*
2605        * Really has 255, but we'll wait to verify that we access
2606        * them the same way and do not have to set the card to
2607        * use the memory port to access external SCB RAM.
2608        */
2609       maxscb = 16;
2610       break;
2611 
2612     case AIC_NONE:
2613       /*
2614        * This should never happen... But just in case.
2615        */
2616       break;
2617   }
2618 
2619   return (maxscb);
2620 }
2621 
2622 /*+F*************************************************************************
2623  * Function:
2624  *   aic7xxx_register
2625  *
2626  * Description:
2627  *   Register a Adaptec aic7xxx chip SCSI controller with the kernel.
2628  *-F*************************************************************************/
2629 static int
2630 aic7xxx_register(Scsi_Host_Template *template, aha_type type,
     /*  */
2631                  int base, unsigned char irq)
2632 {
2633   static const char * board_name[] = {"", "274x", "284x", "7870", "7850", "7872"};
2634   int i;
2635   unsigned char sblkctl;
2636   int max_targets;
2637   int found = 1;
2638   unsigned char target_settings;
2639   unsigned char scsi_conf, host_conf;
2640   int have_seeprom = 0;
2641   struct Scsi_Host *host;
2642   struct aic7xxx_host *p;
2643   struct aic7xxx_host_config config;
2644   struct seeprom_config sc;
2645 
2646   config.type = type;
2647   config.base = base;
2648   config.irq = irq;
2649   config.parity = AIC_UNKNOWN;
2650   config.low_term = AIC_UNKNOWN;
2651   config.high_term = AIC_UNKNOWN;
2652   config.busrtime = 0;
2653 
2654   /*
2655    * Lock out other contenders for our i/o space.
2656    */
2657   request_region(MINREG(base), MAXREG(base) - MINREG(base), "aic7xxx");
2658 
2659   switch (type)
2660   {
2661     case AIC_274x:
2662 #if 0
2663       printk("aha274x: aic7770 hcntrl=0x%x\n", inb(HCNTRL(config.base)));
2664 #endif
2665       /*
2666        * For some 274x boards, we must clear the CHIPRST bit
2667        * and pause the sequencer. For some reason, this makes
2668        * the driver work. For 284x boards, we give it a
2669        * CHIPRST just like the 294x boards.
2670        *
2671        * Use the BIOS settings to determine the interrupt
2672        * trigger type (level or edge) and use this value
2673        * for pausing and unpausing the sequencer.
2674        */
2675       config.unpause = (inb(HCNTRL(config.base)) & IRQMS) | INTEN;
2676       config.pause = config.unpause | PAUSE;
2677       config.extended = aic7xxx_extended;
2678 
2679       /*
2680        * I don't think we need to kick the reset again, the initial probe
2681        * does a reset, it seems that this is kicking a dead horse here.
2682        * So... I will try to just verify that the chip has come out of the
2683        * reset state and continue the same as the 284x.
2684        * In the Calgary version of the driver:
2685        *   1) Chip Reset
2686        *   2) Set unpause to IRQMS | INTEN
2687        *   3) If an interrupt occured without any commands queued, the
2688        *      unpause was set to just INTEN
2689        * I changed the initial reset code to just mask in the CHIPRST bit
2690        * and try to leave the other settings alone.
2691        *
2692        * I don't think we need the warning about chip reset not being clear.
2693        * On both my test machines (2842 & 2940), they work just fine with a
2694        * HCNTRL() of 0x5 (PAUSE | CHIPRST). Notice though, the 274x also
2695        * adds the INTEN flag, where neither the 284x or 294x do.
2696        */
2697       outb(config.pause | CHIPRST, HCNTRL(config.base));
2698       aic7xxx_delay(1);
2699       if (inb(HCNTRL(config.base)) & CHIPRST)
2700       {
2701         printk("aic7xxx_register: Chip reset not cleared; clearing manually.\n");
2702       }
2703       outb(config.pause, HCNTRL(config.base));
2704 
2705       /*
2706        * Just to be on the safe side with the 274x, we will re-read the irq
2707        * since there was some issue about reseting the board.
2708        */
2709       config.irq = inb(HA_INTDEF(config.base)) & 0x0F;
2710       host_conf = inb(HA_HOSTCONF(config.base));
2711       config.busrtime = host_conf & 0x3C;
2712       /* XXX Is this valid for motherboard based controllers? */
2713       /* Setup the FIFO threshold and the bus off time */
2714       outb(host_conf & DFTHRSH, BUSSPD(config.base));
2715       outb((host_conf << 2) & BOFF, BUSTIME(config.base));
2716 
2717       /*
2718        * A reminder until this can be detected automatically.
2719        */
2720       printk("aha274x: extended translation %sabled\n",
2721              config.extended ? "en" : "dis");
2722       break;
2723 
2724     case AIC_284x:
2725 #if 0
2726       printk("aha284x: aic7770 hcntrl=0x%x\n", inb(HCNTRL(config.base)));
2727 #endif
2728       outb(CHIPRST, HCNTRL(config.base));
2729       config.unpause = UNPAUSE_284X;
2730       config.pause = REQ_PAUSE; /* DWG would like to be like the rest */
2731       config.extended = aic7xxx_extended;
2732       config.irq = inb(HA_INTDEF(config.base)) & 0x0F;
2733       host_conf = inb(HA_HOSTCONF(config.base));
2734       config.busrtime = host_conf & 0x3C;
2735       /* XXX Is this valid for motherboard based controllers? */
2736       /* Setup the FIFO threshold and the bus off time */
2737       outb(host_conf & DFTHRSH, BUSSPD(config.base));
2738       outb((host_conf << 2) & BOFF, BUSTIME(config.base));
2739 
2740       /*
2741        * A reminder until this can be detected automatically.
2742        */
2743       printk("aha284x: extended translation %sabled\n",
2744              config.extended ? "en" : "dis");
2745       break;
2746 
2747     case AIC_7850:
2748     case AIC_7870:
2749     case AIC_7872:
2750 #if 0
2751       printk("aic%s hcntrl=0x%x\n", board_name[type], inb(HCNTRL(config.base)));
2752 #endif
2753 
2754       outb(CHIPRST, HCNTRL(config.base));
2755       config.unpause = UNPAUSE_294X;
2756       config.pause = config.unpause | PAUSE;
2757       config.extended = aic7xxx_extended;
2758       config.scsi_id = 7;
2759 
2760       printk("aic78xx: Reading SEEPROM... ");
2761       have_seeprom = read_seeprom(base, &sc);
2762       if (!have_seeprom)
2763       {
2764         printk("aic78xx: unable to read SEEPROM\n");
2765       }
2766       else
2767       {
2768         printk("done\n");
2769         config.extended = (sc.bios_control & CFEXTEND) >> 7;
2770         config.scsi_id = (sc.brtime_id & CFSCSIID);
2771         config.parity = (sc.adapter_control & CFSPARITY) ?
2772                          AIC_ENABLED : AIC_DISABLED;
2773         config.low_term = (sc.adapter_control & CFSTERM) ?
2774                               AIC_ENABLED : AIC_DISABLED;
2775         config.high_term = (sc.adapter_control & CFWSTERM) ?
2776                               AIC_ENABLED : AIC_DISABLED;
2777         config.busrtime = (sc.brtime_id & CFBRTIME) >> 8;
2778       }
2779 
2780       /*
2781        * XXX - force data fifo threshold to 100%. Why does this
2782        *       need to be done?
2783        */
2784       outb(inb(DSPCISTATUS(config.base)) | DFTHRESH, DSPCISTATUS(config.base));
2785       outb(config.scsi_id | DFTHRESH, HA_SCSICONF(config.base));
2786 
2787       /*
2788        * In case we are a wide card, place scsi ID in second conf byte.
2789        */
2790       outb(config.scsi_id, (HA_SCSICONF(config.base) + 1));
2791 
2792       /*
2793        * A reminder until this can be detected automatically.
2794        */
2795       printk("aic%s: extended translation %sabled\n", board_name[type],
2796              config.extended ? "en" : "dis");
2797       break;
2798 
2799     default:
2800       panic("aic7xxx_register: internal error\n");
2801   }
2802 
2803   config.maxscb = detect_maxscb(type, base);
2804 
2805   if ((config.type == AIC_274x) || (config.type == AIC_284x))
2806   {
2807     if (config.pause & IRQMS)
2808     {
2809       printk("aic7xxx: Using Level Sensitive Interrupts\n");
2810     }
2811     else
2812     {
2813       printk("aic7xxx: Using Edge Triggered Interrupts\n");
2814     }
2815   }
2816 
2817   /*
2818    * Read the bus type from the SBLKCTL register. Set the FLAGS
2819    * register in the sequencer for twin and wide bus cards.
2820    */
2821   sblkctl = inb(SBLKCTL(base)) & 0x0F;  /* mask out upper two bits */
2822   switch (sblkctl)
2823   {
2824     case 0:     /* narrow/normal bus */
2825       config.scsi_id = inb(HA_SCSICONF(base)) & 0x07;
2826       config.bus_type = AIC_SINGLE;
2827       outb(0, HA_FLAGS(base));
2828       break;
2829 
2830     case 2:     /* Wide bus */
2831       config.scsi_id = inb(HA_SCSICONF(base) + 1) & 0x0F;
2832       config.bus_type = AIC_WIDE;
2833       printk("aic7xxx: Enabling wide channel of %s-Wide\n",
2834              board_name[config.type]);
2835       outb(WIDE_BUS, HA_FLAGS(base));
2836       break;
2837 
2838     case 8:     /* Twin bus */
2839       config.scsi_id = inb(HA_SCSICONF(base)) & 0x07;
2840 #ifdef AIC7XXX_TWIN_SUPPORT
2841       config.scsi_id_b = inb(HA_SCSICONF(base) + 1) & 0x07;
2842       config.bus_type = AIC_TWIN;
2843       printk("aic7xxx: Enabled channel B of %s-Twin\n",
2844              board_name[config.type]);
2845       outb(TWIN_BUS, HA_FLAGS(base));
2846 #else
2847       config.bus_type = AIC_SINGLE;
2848       printk("aic7xxx: Channel B of %s-Twin will be ignored\n",
2849              board_name[config.type]);
2850       outb(0, HA_FLAGS(base));
2851 #endif
2852       break;
2853 
2854     default:
2855       printk("aic7xxx is an unsupported type 0x%x, please "
2856              "mail deang@ims.com\n", inb(SBLKCTL(base)));
2857       outb(0, HA_FLAGS(base));
2858       return (0);
2859   }
2860 
2861   /*
2862    * Clear the upper two bits. For the 294x cards, clearing the
2863    * upper two bits, will take the card out of diagnostic mode
2864    * and make the host adatper LED follow bus activity (will not
2865    * always be on).
2866    */
2867   outb(sblkctl, SBLKCTL(base));
2868 
2869   /*
2870    * The IRQ level in i/o port 4 maps directly onto the real
2871    * IRQ number. If it's ok, register it with the kernel.
2872    *
2873    * NB. the Adaptec documentation says the IRQ number is only
2874    *     in the lower four bits; the ECU information shows the
2875    *     high bit being used as well. Which is correct?
2876    *
2877    * The 294x cards (PCI) get their interrupt from PCI BIOS.
2878    */
2879   if (((config.type == AIC_274x) || (config.type == AIC_284x))
2880       && (config.irq < 9 || config.irq > 15))
2881   {
2882     printk("aic7xxx uses unsupported IRQ level, ignoring\n");
2883     return (0);
2884   }
2885 
2886   /*
2887    * Check the IRQ to see if it is shared by another aic7xxx
2888    * controller. If it is and sharing of IRQs is not defined,
2889    * then return 0 hosts found. If sharing of IRQs is allowed
2890    * or the IRQ is not shared by another host adapter, then
2891    * proceed.
2892    */
2893 #ifndef AIC7XXX_SHARE_IRQS
2894    if (aic7xxx_boards[config.irq] != NULL)
2895    {
2896      printk("aic7xxx_register: Sharing of IRQs is not configured.\n");
2897      return (0);
2898    }
2899 #endif
2900 
2901   /*
2902    * Print out debugging information before re-enabling
2903    * the card - a lot of registers on it can't be read
2904    * when the sequencer is active.
2905    */
2906   debug_config(&config);
2907 
2908   /*
2909    * Before registry, make sure that the offsets of the
2910    * struct scatterlist are what the sequencer will expect,
2911    * otherwise disable scatter-gather altogether until someone
2912    * can fix it. This is important since the sequencer will
2913    * DMA elements of the SG array in while executing commands.
2914    */
2915   if (template->sg_tablesize != SG_NONE)
2916   {
2917     struct scatterlist sg;
2918 
2919     if (SG_STRUCT_CHECK(sg))
2920     {
2921       printk("aic7xxx warning: kernel scatter-gather "
2922              "structures changed, disabling it\n");
2923       template->sg_tablesize = SG_NONE;
2924     }
2925   }
2926 
2927   /*
2928    * Register each "host" and fill in the returned Scsi_Host
2929    * structure as best we can. Some of the parameters aren't
2930    * really relevant for bus types beyond ISA, and none of the
2931    * high-level SCSI code looks at it anyway. Why are the fields
2932    * there? Also save the pointer so that we can find the
2933    * information when an IRQ is triggered.
2934    */
2935   host = scsi_register(template, sizeof(struct aic7xxx_host));
2936   host->can_queue = config.maxscb;
2937 #ifdef AIC7XXX_TAGGED_QUEUEING
2938   host->cmd_per_lun = 2;
2939 #else
2940   host->cmd_per_lun = 1;
2941 #endif
2942   host->this_id = config.scsi_id;
2943   host->irq = config.irq;
2944   if (config.bus_type == AIC_WIDE)
2945   {
2946     host->max_id = 16;
2947   }
2948   if (config.bus_type == AIC_TWIN)
2949   {
2950     host->max_channel = 1;
2951   }
2952 
2953   p = (struct aic7xxx_host *) host->hostdata;
2954 
2955   /* Initialize the scb array by setting the state to free. */
2956   for (i = 0; i < AIC7XXX_MAXSCB; i++)
2957   {
2958     p->scb_array[i].state = SCB_FREE;
2959     p->scb_array[i].next = NULL;
2960     p->scb_array[i].cmd = NULL;
2961   }
2962 
2963   p->isr_count = 0;
2964   p->a_scanned = 0;
2965   p->b_scanned = 0;
2966   p->base = config.base;
2967   p->maxscb = config.maxscb;
2968   p->numscb = 0;
2969   p->extended = config.extended;
2970   p->type = config.type;
2971   p->bus_type = config.bus_type;
2972   p->have_seeprom = have_seeprom;
2973   p->seeprom = sc;
2974   p->free_scb = NULL;
2975   p->next = NULL;
2976 
2977   p->unpause = config.unpause;
2978   p->pause = config.pause;
2979 
2980   if (aic7xxx_boards[config.irq] == NULL)
2981   {
2982     /*
2983      * Warning! This must be done before requesting the irq.  It is
2984      * possible for some boards to raise an interrupt as soon as
2985      * they are enabled.  So when we request the irq from the Linux
2986      * kernel, an interrupt is triggered immediately.  Therefore, we
2987      * must ensure the board data is correctly set before the request.
2988      */
2989     aic7xxx_boards[config.irq] = host;
2990 
2991     /*
2992      * Register IRQ with the kernel.
2993      */
2994     if (request_irq(config.irq, aic7xxx_isr, SA_INTERRUPT, "aic7xxx"))
2995     {
2996       printk("aic7xxx couldn't register irq %d, ignoring\n", config.irq);
2997       aic7xxx_boards[config.irq] = NULL;
2998       return (0);
2999     }
3000   }
3001   else
3002   {
3003     /*
3004      * We have found a host adapter sharing an IRQ of a previously
3005      * registered host adapter. Add this host adapter's Scsi_Host
3006      * to the beginning of the linked list of hosts at the same IRQ.
3007      */
3008     p->next = aic7xxx_boards[config.irq];
3009     aic7xxx_boards[config.irq] = host;
3010   }
3011 
3012   /*
3013    * Load the sequencer program, then re-enable the board -
3014    * resetting the AIC-7770 disables it, leaving the lights
3015    * on with nobody home. On the PCI bus you *may* be home,
3016    * but then your mailing address is dynamically assigned
3017    * so no one can find you anyway :-)
3018    */
3019   printk("aic7xxx: Downloading sequencer code..");
3020   aic7xxx_loadseq(base);
3021 
3022   /* Set Fast Mode and Enable the board */
3023   outb(FASTMODE, SEQCTL(base));
3024 
3025   if ((p->type == AIC_274x || p->type == AIC_284x))
3026   {
3027     outb(ENABLE, BCTL(base));
3028   }
3029 
3030   printk("done.\n");
3031 
3032   /*
3033    * Set the SCSI Id, SXFRCTL1, and SIMODE1, for both channels
3034    */
3035   if (p->bus_type == AIC_TWIN)
3036   {
3037     /*
3038      * The device is gated to channel B after a chip reset,
3039      * so set those values first.
3040      */
3041     outb(config.scsi_id_b, SCSIID(base));
3042     scsi_conf = inb(HA_SCSICONF(base) + 1) & (ENSPCHK | STIMESEL);
3043     scsi_conf = scsi_conf | ENSTIMER | ACTNEGEN | STPWEN;
3044     outb(scsi_conf, SXFRCTL1(base));
3045     outb(ENSELTIMO | ENSCSIPERR, SIMODE1(base));
3046     /* Select Channel A */
3047     outb(0, SBLKCTL(base));
3048   }
3049   outb(config.scsi_id, SCSIID(base));
3050   scsi_conf = inb(HA_SCSICONF(base)) & (ENSPCHK | STIMESEL);
3051   outb(scsi_conf | ENSTIMER | ACTNEGEN | STPWEN, SXFRCTL1(base));
3052   outb(ENSELTIMO | ENSCSIPERR, SIMODE1(base));
3053 
3054   /* Look at the information that board initialization or the board
3055    * BIOS has left us. In the lower four bits of each target's
3056    * scratch space any value other than 0 indicates that we should
3057    * initiate synchronous transfers. If it's zero, the user or the
3058    * BIOS has decided to disable synchronous negotiation to that
3059    * target so we don't activate the needsdtr flag.
3060    */
3061   p->needsdtr_copy = 0;
3062   p->sdtr_pending = 0;
3063   p->needwdtr_copy = 0;
3064   p->wdtr_pending = 0;
3065   if (p->bus_type == AIC_SINGLE)
3066   {
3067     max_targets = 8;
3068   }
3069   else
3070   {
3071     max_targets = 16;
3072   }
3073 
3074   for (i = 0; i < max_targets; i++)
3075   {
3076     if (have_seeprom)
3077     {
3078       target_settings = (sc.device_flags[i] & CFXFER) << 4;
3079       if (sc.device_flags[i] & CFSYNCH)
3080       {
3081         p->needsdtr_copy = p->needsdtr_copy | (0x01 << i);
3082       }
3083       if ((sc.device_flags[i] & CFWIDEB) && (p->bus_type == AIC_WIDE))
3084       {
3085         p->needwdtr_copy = p->needwdtr_copy | (0x01 << i);
3086       }
3087     }
3088     else
3089     {
3090       target_settings = inb(HA_TARG_SCRATCH(base) + i);
3091       if (target_settings & 0x0F)
3092       {
3093         p->needsdtr_copy = p->needsdtr_copy | (0x01 << i);
3094         /*
3095          * Default to asynchronous transfers (0 offset)
3096          */
3097         target_settings = target_settings & 0xF0;
3098       }
3099       /*
3100        * If we are not wide, forget WDTR. This makes the driver
3101        * work on some cards that don't leave these fields cleared
3102        * when BIOS is not installed.
3103        */
3104       if ((target_settings & 0x80) && (p->bus_type == AIC_WIDE))
3105       {
3106         p->needwdtr_copy = p->needwdtr_copy | (0x01 << i);
3107         target_settings = target_settings & 0x7F;
3108       }
3109     }
3110     outb(target_settings, (HA_TARG_SCRATCH(base) + i));
3111   }
3112 
3113   p->needsdtr = p->needsdtr_copy;
3114   p->needwdtr = p->needwdtr_copy;
3115 #if 0
3116   printk("NeedSdtr = 0x%x, 0x%x\n", p->needsdtr_copy, p->needsdtr);
3117   printk("NeedWdtr = 0x%x, 0x%x\n", p->needwdtr_copy, p->needwdtr);
3118 #endif 0
3119 
3120   /*
3121    * Clear the control byte for every SCB so that the sequencer
3122    * doesn't get confused and think that one of them is valid
3123    */
3124   for (i = 0; i < config.maxscb; i++)
3125   {
3126     outb(i, SCBPTR(base));
3127     outb(0, SCBARRAY(base));
3128   }
3129 
3130   /*
3131    * For reconnecting targets, the sequencer code needs to
3132    * know how many SCBs it has to search through.
3133    */
3134   outb(config.maxscb, HA_SCBCOUNT(base));
3135 
3136   /*
3137    * Clear the active flags - no targets are busy.
3138    */
3139   outb(0, HA_ACTIVE0(base));
3140   outb(0, HA_ACTIVE1(base));
3141 
3142   /* We don't have any waiting selections */
3143   outb (SCB_LIST_NULL, WAITING_SCBH(base));
3144   outb (SCB_LIST_NULL, WAITING_SCBT(base));
3145 
3146   /*
3147    * Reset the SCSI bus. Is this necessary?
3148    *   There may be problems for a warm boot without resetting
3149    *   the SCSI bus. Either BIOS settings in scratch RAM
3150    *   will not get reinitialized, or devices may stay at
3151    *   previous negotiated settings (SDTR and WDTR) while
3152    *   the driver will think that no negotiations have been
3153    *   performed.
3154    *
3155    * Some devices need a long time to "settle" after a SCSI
3156    * bus reset.
3157    */
3158 
3159   if (!aic7xxx_no_reset)
3160   {
3161     printk("Resetting the SCSI bus...\n");
3162     if (p->bus_type == AIC_TWIN)
3163     {
3164       /*
3165        * Select channel B.
3166        */
3167       outb(2, SBLKCTL(base));
3168       outb(SCSIRSTO, SCSISEQ(base));
3169       udelay(1000);
3170       outb(0, SCSISEQ(base));
3171       /*
3172        * Select channel A.
3173        */
3174       outb(0, SBLKCTL(base));
3175     }
3176 
3177     outb(SCSIRSTO, SCSISEQ(base));
3178     udelay(1000);
3179     outb(0, SCSISEQ(base));
3180     aic7xxx_delay(AIC7XXX_RESET_DELAY);
3181   }
3182 
3183   /*
3184    * Unpause the sequencer before returning and enable
3185    * interrupts - we shouldn't get any until the first
3186    * command is sent to us by the high-level SCSI code.
3187    */
3188   UNPAUSE_SEQUENCER(p);
3189   return (found);
3190 }
3191 
3192 /*+F*************************************************************************
3193  * Function:
3194  *   aic7xxx_detect
3195  *
3196  * Description:
3197  *   Try to detect and register an Adaptec 7770 or 7870 SCSI controller.
3198  *-F*************************************************************************/
3199 int
3200 aic7xxx_detect(Scsi_Host_Template *template)
     /*  */
3201 {
3202   aha_type type = AIC_NONE;
3203   int found = 0, slot, base;
3204   unsigned char irq = 0;
3205   int i;
3206 
3207   /*
3208    * Since we may allow sharing of IRQs, it is imperative
3209    * that we "null-out" the aic7xxx_boards array. It is
3210    * not guaranteed to be initialized to 0 (NULL). We use
3211    * a NULL entry to indicate that no prior hosts have
3212    * been found/registered for that IRQ.
3213    */
3214   for (i = 0; i <= MAXIRQ; i++)
3215   {
3216     aic7xxx_boards[i] = NULL;
3217   }
3218 
3219   /*
3220    * Initialize the spurious count to 0.
3221    */
3222   aic7xxx_spurious_count = 0;
3223 
3224   /*
3225    * EISA/VL-bus card signature probe.
3226    */
3227   for (slot = MINSLOT; slot <= MAXSLOT; slot++)
3228   {
3229     base = SLOTBASE(slot);
3230 
3231     if (check_region(MINREG(base), MAXREG(base) - MINREG(base)))
3232     {
3233       /*
3234        * Some other driver has staked a
3235        * claim to this i/o region already.
3236        */
3237       continue;
3238     }
3239 
3240     type = aic7xxx_probe(slot, HID0(base));
3241     if (type != AIC_NONE)
3242     {
3243       /*
3244        * We found a card, allow 1 spurious interrupt.
3245        */
3246       aic7xxx_spurious_count = 1;
3247 
3248 #if 0
3249       printk("aic7xxx: hcntrl=0x%x\n", inb(HCNTRL(base)));
3250       outb(inb(HCNTRL(base)) | CHIPRST, HCNTRL(base));
3251       irq = inb(HA_INTDEF(base)) & 0x0F;
3252 #endif
3253 
3254       /*
3255        * We "find" a AIC-7770 if we locate the card
3256        * signature and we can set it up and register
3257        * it with the kernel without incident.
3258        */
3259       found += aic7xxx_register(template, type, base, irq);
3260 
3261       /*
3262        * Disallow spurious interrupts.
3263        */
3264       aic7xxx_spurious_count = 0;
3265     }
3266   }
3267 
3268 #ifdef CONFIG_PCI
3269 
3270 #define DEVREVID  0x08
3271 #define DEVCONFIG 0x40
3272 #define DEVSTATUS 0x41
3273 #define RAMPSM    0x02
3274 
3275   /*
3276    * PCI-bus probe.
3277    */
3278   if (pcibios_present())
3279   {
3280     int error;
3281     int done = 0;
3282     unsigned int io_port;
3283     unsigned short index = 0;
3284     unsigned char pci_bus, pci_device_fn;
3285     unsigned char devrevid, devconfig, devstatus;
3286     char rev_id[] = {'B', 'C', 'D'};
3287 
3288     while (!done)
3289     {
3290       if ((!pcibios_find_device(PCI_VENDOR_ID_ADAPTEC,
3291                                 PCI_DEVICE_ID_ADAPTEC_294x,
3292                                 index, &pci_bus, &pci_device_fn)) ||
3293            (!pcibios_find_device(PCI_VENDOR_ID_ADAPTEC,
3294                                 PCI_DEVICE_ID_ADAPTEC_2940,
3295                                 index, &pci_bus, &pci_device_fn)))
3296       {
3297         type = AIC_7870;
3298       }
3299       else
3300       {
3301         if (!pcibios_find_device(PCI_VENDOR_ID_ADAPTEC,
3302                                 PCI_DEVICE_ID_ADAPTEC_7850,
3303                                 index, &pci_bus, &pci_device_fn))
3304         {
3305           type = AIC_7850;
3306         }
3307         else
3308         {
3309           if (!pcibios_find_device(PCI_VENDOR_ID_ADAPTEC,
3310                                   PCI_DEVICE_ID_ADAPTEC_7872,
3311                                   index, &pci_bus, &pci_device_fn))
3312           {
3313             type = AIC_7872;
3314           }
3315           else
3316           {
3317             type = AIC_NONE;
3318             done = 1;
3319           }
3320         }
3321       }
3322 
3323       if (!done)
3324       {
3325         /*
3326          * Read esundry information from PCI BIOS.
3327          */
3328         error = pcibios_read_config_dword(pci_bus, pci_device_fn,
3329                                           PCI_BASE_ADDRESS_0, &io_port);
3330 
3331         if (error)
3332         {
3333           panic("aic7xxx_detect: error 0x%x reading i/o port.\n", error);
3334         }
3335 
3336         error = pcibios_read_config_byte(pci_bus, pci_device_fn,
3337                                          PCI_INTERRUPT_LINE, &irq);
3338         if (error)
3339         {
3340           panic("aic7xxx_detect: error %d reading irq.\n", error);
3341         }
3342 
3343         /*
3344          * Make the base I/O register look like EISA and VL-bus.
3345          */
3346         base = io_port - 0xC01;
3347 
3348         /*
3349          * I don't think we need to bother with allowing
3350          * spurious interrupts for the 787x/7850, but what
3351          * the hey.
3352          */
3353         aic7xxx_spurious_count = 1;
3354 
3355 #if 0
3356         printk("aic7xxx: hcntrl=0x%x\n", inb(HCNTRL(base)));
3357 #endif
3358         outb(inb(HCNTRL(base)) | CHIPRST, HCNTRL(base));
3359 
3360         error = pcibios_read_config_byte(pci_bus, pci_device_fn,
3361                                          DEVREVID, &devrevid);
3362         if (devrevid < 3)
3363         {
3364           printk("aic7xxx_detect: AIC-7870 Rev %c\n", rev_id[devrevid]);
3365         }
3366         error = pcibios_read_config_byte(pci_bus, pci_device_fn,
3367                                          DEVCONFIG, &devconfig);
3368         error = pcibios_read_config_byte(pci_bus, pci_device_fn,
3369                                          DEVSTATUS, &devstatus);
3370         printk("aic7xxx_detect: devconfig 0x%x, devstatus 0x%x\n",
3371                devconfig, devstatus);
3372         if (devstatus & RAMPSM)
3373         {
3374           printk("aic7xxx_detect: detected external SCB RAM, "
3375                  "mail deang@ims.com for test patch");
3376         }
3377 
3378         found += aic7xxx_register(template, type, base, irq);
3379 
3380         /*
3381          * Disable spurious interrupts.
3382          */
3383         aic7xxx_spurious_count = 0;
3384 
3385         index += 1;
3386       }
3387     }
3388   }
3389 #endif CONFIG_PCI
3390 
3391   template->name = aic7xxx_info(NULL);
3392   return (found);
3393 }
3394 
3395 
3396 /*+F*************************************************************************
3397  * Function:
3398  *   aic7xxx_buildscb
3399  *
3400  * Description:
3401  *   Build a SCB.
3402  *-F*************************************************************************/
3403 static void
3404 aic7xxx_buildscb(struct aic7xxx_host *p,
     /*  */
3405                  Scsi_Cmnd *cmd,
3406                  struct aic7xxx_scb *scb)
3407 {
3408   void *addr;
3409   unsigned length;
3410   unsigned short mask;
3411 
3412   /*
3413    * Setup the control byte if we need negotiation and have not
3414    * already requested it.
3415    */
3416 #ifdef AIC7XXX_TAGGED_QUEUEING
3417   if (cmd->device->tagged_supported)
3418   {
3419     if (cmd->device->tagged_queue == 0)
3420     {
3421       printk("aic7xxx_buildscb: Enabling tagged queuing for target %d, "
3422              "channel %d\n", cmd->target, cmd->channel);
3423       cmd->device->tagged_queue = 1;
3424       cmd->device->current_tag = 1;  /* enable tagging */
3425     }
3426     cmd->tag = cmd->device->current_tag;
3427     cmd->device->current_tag = cmd->device->current_tag + 1;
3428     scb->control = scb->control | SCB_TE;
3429   }
3430 #endif
3431   mask = (0x01 << cmd->target);
3432   if ((p->needwdtr & mask) && !(p->wdtr_pending & mask))
3433   {
3434     p->wdtr_pending = p->wdtr_pending | mask;
3435     scb->control = scb->control | SCB_NEEDWDTR;
3436 #if 0
3437     printk("Sending WDTR request to target %d.\n", cmd->target);
3438 #endif
3439   }
3440   else
3441   {
3442     if ((p->needsdtr & mask) && !(p->sdtr_pending & mask))
3443     {
3444       p->sdtr_pending = p->sdtr_pending | mask;
3445       scb->control = scb->control | SCB_NEEDSDTR;
3446 #if 0
3447       printk("Sending SDTR request to target %d.\n", cmd->target);
3448 #endif
3449     }
3450   }
3451 
3452 #if 0
3453   printk("aic7xxx_queue: target %d, cmd 0x%x (size %u), wdtr 0x%x, mask 0x%x\n",
3454          cmd->target, cmd->cmnd[0], cmd->cmd_len, p->needwdtr, mask);
3455 #endif
3456   scb->target_channel_lun = ((cmd->target << 4) & 0xF0) |
3457         ((cmd->channel & 0x01) << 3) | (cmd->lun & 0x07);
3458 
3459   /*
3460    * The interpretation of request_buffer and request_bufflen
3461    * changes depending on whether or not use_sg is zero; a
3462    * non-zero use_sg indicates the number of elements in the
3463    * scatter-gather array.
3464    *
3465    * The AIC-7770 can't support transfers of any sort larger
3466    * than 2^24 (three-byte count) without backflips. For what
3467    * the kernel is doing, this shouldn't occur. I hope.
3468    */
3469   length = aic7xxx_length(cmd, 0);
3470 
3471   if (length > 0xFFFFFF)
3472   {
3473     panic("aic7xxx_buildscb: can't transfer > 2^24 - 1 bytes\n");
3474   }
3475 
3476   /*
3477    * XXX - this relies on the host data being stored in a
3478    *       little-endian format.
3479    */
3480   addr = cmd->cmnd;
3481   scb->SCSI_cmd_length = cmd->cmd_len;
3482   memcpy(scb->SCSI_cmd_pointer, &addr, sizeof(scb->SCSI_cmd_pointer));
3483 
3484   if (cmd->use_sg)
3485   {
3486 #if 0
3487     debug("aic7xxx_buildscb: SG used, %d segments, length %u\n",
3488           cmd->use_sg, length);
3489 #endif
3490     scb->SG_segment_count = cmd->use_sg;
3491     memcpy(scb->SG_list_pointer, &cmd->request_buffer,
3492            sizeof(scb->SG_list_pointer));
3493   }
3494   else
3495   {
3496 #if 0
3497     debug("aic7xxx_buildscb: Creating scatterlist, addr=0x%lx, length=%d.\n",
3498           (unsigned long) cmd->request_buffer, cmd->request_bufflen);
3499 #endif
3500 #ifdef AIC7XXX_USE_SG
3501     scb->SG_segment_count = 1;
3502     scb->sg.address = (char *) cmd->request_buffer;
3503     scb->sg.length = cmd->request_bufflen;
3504     addr = &scb->sg;
3505     memcpy(scb->SG_list_pointer, &addr, sizeof(scb->SG_list_pointer));
3506 #else
3507     scb->SG_segment_count = 0;
3508     memcpy(scb->data_pointer, &cmd->request_buffer, sizeof(scb->data_pointer));
3509     memcpy(scb->data_count, &cmd->request_bufflen, 3);
3510 #endif
3511   }
3512 }
3513 
3514 /*+F*************************************************************************
3515  * Function:
3516  *   aic7xxx_queue
3517  *
3518  * Description:
3519  *   Queue a SCB to the controller.
3520  *-F*************************************************************************/
3521 int
3522 aic7xxx_queue(Scsi_Cmnd *cmd, void (*fn)(Scsi_Cmnd *))
     /*  */
3523 {
3524   long flags;
3525 #ifndef AIC7XXX_USE_DMA
3526   int old_scbptr;
3527 #endif
3528   struct aic7xxx_host *p;
3529   struct aic7xxx_scb *scb;
3530   unsigned char curscb;
3531 
3532   p = (struct aic7xxx_host *) cmd->host->hostdata;
3533 
3534   /* Check to see if channel was scanned. */
3535  if (!p->a_scanned && (cmd->channel == 0))
3536   {
3537     printk("aic7xxx: Scanning channel A for devices.\n");
3538     p->a_scanned = 1;
3539   }
3540   else
3541   {
3542     if (!p->b_scanned && (cmd->channel == 1))
3543     {
3544       printk("aic7xxx: Scanning channel B for devices.\n");
3545       p->b_scanned = 1;
3546     }
3547   }
3548 
3549 #if 0
3550   debug("aic7xxx_queue: cmd 0x%x (size %u), target %d, channel %d, lun %d\n",
3551         cmd->cmnd[0], cmd->cmd_len, cmd->target, cmd->channel,
3552         cmd->lun & 0x07);
3553 #endif
3554 
3555   /*
3556    * This is a critical section, since we don't want the
3557    * interrupt routine mucking with the host data or the
3558    * card. Since the kernel documentation is vague on
3559    * whether or not we are in a cli/sti pair already, save
3560    * the flags to be on the safe side.
3561    */
3562   save_flags(flags);
3563   cli();
3564 
3565   /*
3566    * Find a free slot in the SCB array to load this command
3567    * into. Since can_queue is set to the maximum number of
3568    * SCBs for the card, we should always find one.
3569    *
3570    * First try to find an scb in the free list. If there are
3571    * none in the free list, then check the current number of
3572    * of scbs and take an unused one from the scb array.
3573    */
3574   scb = p->free_scb;
3575   if (scb != NULL)
3576   { /* found one in the free list */
3577     p->free_scb = scb->next;   /* remove and update head of list */
3578     /*
3579      * Warning! For some unknown reason, the scb at the head
3580      * of the free list is not the same address that it should
3581      * be. That's why we set the scb pointer taken by the
3582      * position in the array. The scb at the head of the list
3583      * should match this address, but it doesn't.
3584      */
3585     scb = &(p->scb_array[scb->position]);
3586     scb->control = 0;
3587     scb->state = SCB_ACTIVE;
3588   }
3589   else
3590   {
3591     if (p->numscb >= p->maxscb)
3592     {
3593       panic("aic7xxx_queue: couldn't find a free scb\n");
3594     }
3595     else
3596     {
3597       /*
3598        * Initialize the scb within the scb array. The
3599        * position within the array is the position on
3600        * the board that it will be loaded.
3601        */
3602       scb = &(p->scb_array[p->numscb]);
3603       memset(scb, 0, sizeof(*scb));
3604 
3605       scb->position = p->numscb;
3606       p->numscb++;
3607       scb->state = SCB_ACTIVE;
3608       scb->next_waiting = SCB_LIST_NULL;
3609       memcpy(scb->host_scb, &scb, sizeof(scb));
3610 #ifdef AIC7XXX_USE_DMA
3611       scb->control = SCB_NEEDDMA;
3612 #endif
3613       PAUSE_SEQUENCER(p);
3614       curscb = inb(SCBPTR(p->base));
3615       outb(scb->position, SCBPTR(p->base));
3616       aic7xxx_putdmascb(p->base, scb);
3617       outb(curscb, SCBPTR(p->base));
3618       UNPAUSE_SEQUENCER(p);
3619       scb->control = 0;
3620     }
3621   }
3622 
3623   scb->cmd = cmd;
3624   aic7xxx_position(cmd) = scb->position;
3625 
3626   /*
3627    * Construct the SCB beforehand, so the sequencer is
3628    * paused a minimal amount of time.
3629    */
3630   aic7xxx_buildscb(p, cmd, scb);
3631 
3632 #if 0
3633   if (scb != &p->scb_array[scb->position])
3634   {
3635     printk("aic7xxx_queue: address of scb by position does not match scb address\n");
3636   }
3637   printk("aic7xxx_queue: SCB pos=%d, cmdptr=0x%x, state=%d, freescb=0x%x\n",
3638          scb->position, (unsigned int) scb->cmd,
3639          scb->state, (unsigned int) p->free_scb);
3640 #endif
3641   /*
3642    * Pause the sequencer so we can play with its registers -
3643    * wait for it to acknowledge the pause.
3644    *
3645    * XXX - should the interrupts be left on while doing this?
3646    */
3647   PAUSE_SEQUENCER(p);
3648 
3649   /*
3650    * Save the SCB pointer and put our own pointer in - this
3651    * selects one of the four banks of SCB registers. Load
3652    * the SCB, then write its pointer into the queue in FIFO
3653    * and restore the saved SCB pointer.
3654    */
3655 #ifdef AIC7XXX_USE_DMA
3656   aic7xxx_putscb(p->base, scb);
3657 #else
3658   old_scbptr = inb(SCBPTR(p->base));
3659   outb(scb->position, SCBPTR(p->base));
3660 
3661   aic7xxx_putscb(p->base, scb);
3662 
3663   outb(scb->position, QINFIFO(p->base));
3664   outb(old_scbptr, SCBPTR(p->base));
3665 #endif
3666   /*
3667    * Make sure the Scsi_Cmnd pointer is saved, the struct it
3668    * points to is set up properly, and the parity error flag
3669    * is reset, then unpause the sequencer and watch the fun
3670    * begin.
3671    */
3672   cmd->scsi_done = fn;
3673   aic7xxx_error(cmd) = DID_OK;
3674   aic7xxx_status(cmd) = 0;
3675 
3676   cmd->result = 0;
3677   memset(&cmd->sense_buffer, 0, sizeof(cmd->sense_buffer));
3678 
3679   UNPAUSE_SEQUENCER(p);
3680   restore_flags(flags);
3681   return (0);
3682 }
3683 
3684 /* return values from aic7xxx_kill */
3685 typedef enum {
3686   k_ok,             /* scb found and message sent */
3687   k_busy,           /* message already present */
3688   k_absent,         /* couldn't locate scb */
3689   k_disconnect,     /* scb found, but disconnected */
3690 } k_state;
3691 
3692 /*+F*************************************************************************
3693  * Function:
3694  *   aic7xxx_kill
3695  *
3696  * Description:
3697  *   This must be called with interrupts disabled - it's going to
3698  *   be messing around with the host data, and an interrupt being
3699  *   fielded in the middle could get ugly.
3700  *
3701  *   Since so much of the abort and reset code is shared, this
3702  *   function performs more magic than it really should. If the
3703  *   command completes ok, then it will call scsi_done with the
3704  *   result code passed in. The unpause parameter controls whether
3705  *   or not the sequencer gets unpaused - the reset function, for
3706  *   instance, may want to do something more aggressive.
3707  *
3708  *   Note that the command is checked for in our SCB_array first
3709  *   before the sequencer is paused, so if k_absent is returned,
3710  *   then the sequencer is NOT paused.
3711  *-F*************************************************************************/
3712 static k_state
3713 aic7xxx_kill(Scsi_Cmnd *cmd, unsigned char message,
     /*  */
3714              unsigned int result, int unpause)
3715 {
3716   struct aic7xxx_host *p;
3717   struct aic7xxx_scb *scb;
3718   int i, active_scb, found, queued;
3719   unsigned char scbsave[AIC7XXX_MAXSCB];
3720   unsigned char flags;
3721   int scb_control;
3722   k_state status;
3723 
3724   p = (struct aic7xxx_host *) cmd->host->hostdata;
3725   scb = &p->scb_array[aic7xxx_position(cmd)];
3726 
3727 #if 0
3728   printk("aic7xxx_kill: In the kill function...\n");
3729 #endif
3730   PAUSE_SEQUENCER(p);
3731 
3732   /*
3733    * Case 1: In the QINFIFO
3734    *
3735    * This is the best case, really. Check to see if the
3736    * command is still in the sequencer's input queue. If
3737    * so, simply remove it. Reload the queue afterward.
3738    */
3739   queued = inb(QINCNT(p->base));
3740 
3741   for (i = found = 0; i < (queued - found); i++)
3742   {
3743     scbsave[i] = inb(QINFIFO(p->base));
3744 
3745     if (scbsave[i] == scb->position)
3746     {
3747       found = 1;
3748       i--;
3749     }
3750   }
3751 
3752   for (queued = 0; queued < i; queued++)
3753   {
3754     outb(scbsave[queued], QINFIFO(p->base));
3755   }
3756 
3757   if (found)
3758   {
3759     status = k_ok;
3760     goto complete;
3761   }
3762 
3763   active_scb = inb(SCBPTR(p->base));
3764   /*
3765    * Case 2: Not the active command
3766    *
3767    * Check the current SCB bank. If it's not the one belonging
3768    * to the command we want to kill, select the scb we want to
3769    * abort and turn off the disconnected bit. The driver will
3770    * then abort the command and notify us of the abort.
3771    */
3772   if (active_scb != scb->position)
3773   {
3774     outb(scb->position, SCBPTR(p->base));
3775     scb_control = inb(SCBARRAY(p->base));
3776     scb_control = scb_control & ~SCB_DIS;
3777     outb(scb_control, SCBARRAY(p->base));
3778     outb(active_scb, SCBPTR(p->base));
3779     status = k_disconnect;
3780     goto complete;
3781   }
3782 
3783   scb_control = inb(SCBARRAY(p->base));
3784   if (scb_control & SCB_DIS)
3785   {
3786     scb_control = scb_control & ~SCB_DIS;
3787     outb(scb_control, SCBARRAY(p->base));
3788     status = k_disconnect;
3789     goto complete;
3790   }
3791 
3792   /*
3793    * Presumably at this point our target command is active. Check
3794    * to see if there's a message already in effect. If not, place
3795    * our message in and assert ATN so the target goes into MESSAGE
3796    * OUT phase.
3797    */
3798   flags = inb(HA_FLAGS(p->base));
3799   if (flags & ACTIVE_MSG)
3800   {
3801     /*
3802      * If there is a message in progress, reset the bus
3803      * and have all devices renegotiate.
3804      */
3805     if (cmd->channel & 0x01)
3806     {
3807       p->needsdtr = p->needsdtr_copy & 0xFF00;
3808       p->sdtr_pending = p->sdtr_pending & 0x00FF;
3809       outb(0, HA_ACTIVE1(p->base));
3810     }
3811     else
3812     {
3813       if (p->bus_type == AIC_WIDE)
3814       {
3815         p->needsdtr = p->needsdtr_copy;
3816         p->needwdtr = p->needwdtr_copy;
3817         p->sdtr_pending = 0;
3818         p->wdtr_pending = 0;
3819         outb(0, HA_ACTIVE0(p->base));
3820         outb(0, HA_ACTIVE1(p->base));
3821       }
3822       else
3823       {
3824         p->needsdtr = p->needsdtr_copy & 0x00FF;
3825         p->sdtr_pending = p->sdtr_pending & 0xFF00;
3826         outb(0, HA_ACTIVE0(p->base));
3827       }
3828     }
3829     /* Reset the bus. */
3830     outb(SCSIRSTO, SCSISEQ(p->base));
3831     udelay(1000);
3832     outb(0, SCSISEQ(p->base));
3833     aic7xxx_delay(AIC7XXX_RESET_DELAY);
3834 
3835     status = k_busy;
3836     goto complete;
3837   }
3838 
3839   outb(flags | ACTIVE_MSG, HA_FLAGS(p->base));    /* active message */
3840   outb(1, HA_MSG_LEN(p->base));                   /* length = 1 */
3841   outb(message, HA_MSG_START(p->base));           /* message body */
3842 
3843   /*
3844    * Assert ATN. Use the value of SCSISIGO saved by the
3845    * sequencer code so we don't alter its contents radically
3846    * in the middle of something critical.
3847    */
3848   outb(inb(HA_SIGSTATE(p->base)) | 0x10, SCSISIGO(p->base));
3849 
3850   status = k_ok;
3851 
3852   /*
3853    * The command has been killed. Do the bookkeeping, unpause
3854    * the sequencer, and notify the higher-level SCSI code.
3855    */
3856 complete:
3857   if (unpause)
3858   {
3859     UNPAUSE_SEQUENCER(p);
3860   }
3861 
3862   /*
3863    * Mark the scb as free and clear the scbs command pointer.
3864    * Add the scb to the head of the free list being careful
3865    * to preserve the next pointers.
3866    */
3867   scb->state = SCB_FREE;          /* mark the scb as free */
3868   scb->cmd = NULL;                /* clear the command pointer */
3869   scb->next = p->free_scb;        /* preserve next pointer */
3870   p->free_scb = scb;              /* add at head of free list */
3871   cmd->result = cmd->result << 16;
3872   cmd->scsi_done(cmd);
3873   return (status);
3874 }
3875 
3876 /*+F*************************************************************************
3877  * Function:
3878  *   aic7xxx_abort
3879  *
3880  * Description:
3881  *   Abort the current SCSI command(s).
3882  *-F*************************************************************************/
3883 int
3884 aic7xxx_abort(Scsi_Cmnd *cmd)
     /*  */
3885 {
3886   int rv;
3887   long flags;
3888 
3889   save_flags(flags);
3890   cli();
3891 
3892   switch (aic7xxx_kill(cmd, ABORT, DID_ABORT, !0))
3893   {
3894     case k_ok:          rv = SCSI_ABORT_SUCCESS;        break;
3895     case k_busy:        rv = SCSI_ABORT_BUSY;           break;
3896     case k_absent:      rv = SCSI_ABORT_NOT_RUNNING;    break;
3897     case k_disconnect:  rv = SCSI_ABORT_SNOOZE;         break;
3898     default:            panic("aic7xxx_abort: internal error\n");
3899   }
3900 
3901   restore_flags(flags);
3902   return (rv);
3903 }
3904 
3905 /*+F*************************************************************************
3906  * Function:
3907  *   aic7xxx_reset
3908  *
3909  * Description:
3910  *   Resetting the bus always succeeds - is has to, otherwise the
3911  *   kernel will panic! Try a surgical technique - sending a BUS
3912  *   DEVICE RESET message - on the offending target before pulling
3913  *   the SCSI bus reset line.
3914  *-F*************************************************************************/
3915 int
3916 aic7xxx_reset(Scsi_Cmnd *cmd)
     /*  */
3917 {
3918   long flags;
3919   struct aic7xxx_host *p;
3920 
3921   p = (struct aic7xxx_host *) cmd->host->hostdata;
3922   save_flags(flags);
3923   cli();
3924 
3925   switch (aic7xxx_kill(cmd, BUS_DEVICE_RESET, DID_RESET, 0))
3926   {
3927     case k_ok:
3928       /*
3929        * The RESET message was sent to the target
3930        * with no problems. Flag that target as
3931        * needing a SDTR negotiation on the next
3932        * connection and restart the sequencer.
3933        */
3934       p->needsdtr = p->needsdtr & (1 << cmd->target);
3935       UNPAUSE_SEQUENCER(p);
3936       break;
3937 
3938     case k_absent:
3939       /*
3940        * The sequencer will not be paused if aic7xxx_kill()
3941        * couldn't find the command.
3942        */
3943       PAUSE_SEQUENCER(p);
3944       /* falls through */
3945 
3946     case k_busy:
3947       cmd->result = DID_RESET << 16;  /* return reset code */
3948       cmd->scsi_done(cmd);
3949       break;
3950 
3951     case k_disconnect:
3952       /*
3953        * Do a hard reset of the SCSI bus. According to the
3954        * SCSI-2 draft specification, reset has to be asserted
3955        * for at least 25us. I'm invoking the kernel delay
3956        * function for 30us since I'm not totally trusting of
3957        * the busy loop timing.
3958        *
3959        * XXX - I'm not convinced this works. I tried resetting
3960        *       the bus before, trying to get the devices on the
3961        *       bus to revert to asynchronous transfer, and it
3962        *       never seemed to work.
3963        */
3964       debug("aic7xxx: attempting to reset scsi bus and card\n");
3965 
3966       outb(SCSIRSTO, SCSISEQ(p->base));
3967       udelay(1000);
3968       outb(0, SCSISEQ(p->base));
3969       aic7xxx_delay(AIC7XXX_RESET_DELAY);
3970 
3971       UNPAUSE_SEQUENCER(p);
3972 
3973       /*
3974        * Locate the command and return a "reset" status
3975        * for it. This is not completely correct and will
3976        * probably return to haunt me later.
3977        */
3978       cmd->result = DID_RESET << 16;  /* return reset code */
3979       cmd->scsi_done(cmd);
3980       break;
3981 
3982     default:
3983       panic("aic7xxx_reset: internal error\n");
3984   }
3985 
3986   restore_flags(flags);
3987   return (SCSI_RESET_SUCCESS);
3988 }
3989 
3990 /*+F*************************************************************************
3991  * Function:
3992  *   aic7xxx_biosparam
3993  *
3994  * Description:
3995  *   Return the disk geometry for the given SCSI device.
3996  *-F*************************************************************************/
3997 int
3998 aic7xxx_biosparam(Disk *disk, int devno, int geom[])
     /*  */
3999 {
4000   int heads, sectors, cylinders;
4001   struct aic7xxx_host *p;
4002 
4003   p = (struct aic7xxx_host *) disk->device->host->hostdata;
4004 
4005   /*
4006    * XXX - if I could portably find the card's configuration
4007    *       information, then this could be autodetected instead
4008    *       of left to a boot-time switch.
4009    */
4010   heads = 64;
4011   sectors = 32;
4012   cylinders = disk->capacity / (heads * sectors);
4013 
4014   if (p->extended && cylinders > 1024)
4015   {
4016     heads = 255;
4017     sectors = 63;
4018     cylinders = disk->capacity / (255 * 63);
4019   }
4020 
4021   geom[0] = heads;
4022   geom[1] = sectors;
4023   geom[2] = cylinders;
4024 
4025   return (0);
4026 }
4027 
4028 #ifdef MODULE
4029 /* Eventually this will go into an include file, but this will be later */
4030 Scsi_Host_Template driver_template = AIC7XXX;
4031 
4032 #include "scsi_module.c"
4033 #endif
4034 
4035 /*
4036  * Overrides for Emacs so that we almost follow Linus's tabbing style.
4037  * Emacs will notice this stuff at the end of the file and automatically
4038  * adjust the settings for this buffer only.  This must remain at the end
4039  * of the file.
4040  * ---------------------------------------------------------------------------
4041  * Local variables:
4042  * c-indent-level: 2
4043  * c-brace-imaginary-offset: 0
4044  * c-brace-offset: -2
4045  * c-argdecl-indent: 2
4046  * c-label-offset: -2
4047  * c-continued-statement-offset: 2
4048  * c-continued-brace-offset: 0
4049  * indent-tabs-mode: nil
4050  * tab-width: 8
4051  * End:
4052  */
/* */
root/drivers/scsi/aic7xxx.c

DEFINITIONS
