This source file includes following definitions.
- eata_scsi_done
- eata_fake_int_handler
- eata_release
- eata_int_handler
- eata_send_command
- eata_send_immediate
- eata_queue
- eata_abort
- eata_reset
- get_board_data
- check_blink_state
- get_conf_PIO
- print_config
- register_HBA
- find_EISA
- find_ISA
- find_PCI
- eata_detect
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56 #ifdef MODULE
57 #include <linux/module.h>
58 #include <linux/version.h>
59 #endif
60
61 #include <linux/kernel.h>
62 #include <linux/sched.h>
63 #include <linux/string.h>
64 #include <linux/ioport.h>
65 #include <linux/malloc.h>
66 #include <linux/in.h>
67 #include <linux/bios32.h>
68 #include <linux/pci.h>
69 #include <linux/proc_fs.h>
70 #include <asm/byteorder.h>
71 #include <asm/types.h>
72 #include <asm/io.h>
73 #include <asm/dma.h>
74 #include "../block/blk.h"
75 #include "scsi.h"
76 #include "sd.h"
77 #include "hosts.h"
78 #include <linux/scsicam.h>
79 #include "eata_dma.h"
80 #include "eata_dma_proc.h"
81
82
83 static u32 ISAbases[] =
84 {0x1F0, 0x170, 0x330, 0x230};
85 static unchar EISAbases[] =
86 {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1};
87 static uint registered_HBAs = 0;
88 static struct Scsi_Host *last_HBA = NULL;
89 static struct Scsi_Host *first_HBA = NULL;
90 static unchar reg_IRQ[] =
91 {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
92 static unchar reg_IRQL[] =
93 {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
94 static struct eata_sp *status = 0;
95 static void *dma_scratch = 0;
96
97 static u32 fake_int_base;
98 static int fake_int_result;
99 static int fake_int_happened;
100
101 static ulong int_counter = 0;
102 static ulong queue_counter = 0;
103
104 void eata_scsi_done (Scsi_Cmnd * scmd)
105 {
106 scmd->request.dev = 0xfffe;
107
108 if (scmd->request.sem != NULL)
109 up(scmd->request.sem);
110
111 return;
112 }
113
114 void eata_fake_int_handler(s32 irq, struct pt_regs * regs)
115 {
116 fake_int_result = inb(fake_int_base + HA_RSTATUS);
117 fake_int_happened = TRUE;
118 DBG(DBG_INTR3, printk("eata_fake_int_handler called irq%d base %#x"
119 " res %#x\n", irq, fake_int_base, fake_int_result));
120 return;
121 }
122
123 #include "eata_dma_proc.c"
124
125 #ifdef MODULE
126 int eata_release(struct Scsi_Host *sh)
127 {
128 uint i;
129 if (sh->irq && reg_IRQ[sh->irq] == 1) free_irq(sh->irq);
130 else reg_IRQ[sh->irq]--;
131
132 scsi_init_free((void *)status, 512);
133 scsi_init_free((void *)dma_scratch, 512);
134 for (i = 0; i < sh->can_queue; i++){
135 if(SD(sh)->ccb[i].sg_list != NULL)
136 scsi_init_free((void *) SD(sh)->ccb[i].sg_list,
137 sh->sg_tablesize * sizeof(struct eata_sg_list));
138 }
139
140 if (SD(sh)->channel == 0) {
141 if (sh->dma_channel != 0xff) free_dma(sh->dma_channel);
142 if (sh->io_port && sh->n_io_port)
143 release_region(sh->io_port, sh->n_io_port);
144 }
145 return(TRUE);
146 }
147 #endif
148
149
150 void eata_int_handler(int irq, struct pt_regs * regs)
151 {
152 uint i, result = 0;
153 uint hba_stat, scsi_stat, eata_stat;
154 Scsi_Cmnd *cmd;
155 struct eata_ccb *cp;
156 struct eata_sp *sp;
157 uint base;
158 ulong flags;
159 uint x;
160 struct Scsi_Host *sh;
161
162 save_flags(flags);
163 cli();
164
165 for (x = 1, sh = first_HBA; x <= registered_HBAs; x++, sh = SD(sh)->prev) {
166 if (sh->irq != irq)
167 continue;
168 if (!(inb((uint)sh->base + HA_RAUXSTAT) & HA_AIRQ))
169 continue;
170
171 int_counter++;
172
173 sp=&SD(sh)->sp;
174
175 cp = sp->ccb;
176 cmd = cp->cmd;
177 base = (uint) cmd->host->base;
178
179 hba_stat = sp->hba_stat;
180
181 scsi_stat = (sp->scsi_stat >> 1) & 0x1f;
182
183 if (sp->EOC == FALSE) {
184 eata_stat = inb(base + HA_RSTATUS);
185 printk("eata_dma: int_handler, board: %x cmd %lx returned "
186 "unfinished.\nEATA: %x HBA: %x SCSI: %x spadr %lx spadrirq "
187 "%lx, irq%d\n", base, (long)cp, eata_stat, hba_stat,
188 scsi_stat,(long)&status, (long)&status[irq], irq);
189 DBG(DBG_DELAY, DEL2(800));
190 restore_flags(flags);
191 return;
192 }
193
194 if (cp->status == LOCKED) {
195 cp->status = FREE;
196 eata_stat = inb(base + HA_RSTATUS);
197 printk("eata_dma: int_handler, freeing locked queueslot\n");
198 DBG(DBG_INTR && DBG_DELAY, DEL2(800));
199 restore_flags(flags);
200 return;
201 }
202
203 eata_stat = inb(base + HA_RSTATUS);
204 DBG(DBG_INTR, printk("IRQ %d received, base %#.4x, pid %ld, target: "
205 "%x, lun: %x, ea_s: %#.2x, hba_s: %#.2x \n",
206 irq, base, cmd->pid, cmd->target, cmd->lun,
207 eata_stat, hba_stat));
208
209 switch (hba_stat) {
210 case HA_NO_ERROR:
211 if (scsi_stat == CONDITION_GOOD
212 && cmd->device->type == TYPE_DISK
213 && (HD(cmd)->t_state[cp->cp_channel][cp->cp_id] == RESET))
214 result = DID_BUS_BUSY << 16;
215 else if (scsi_stat == GOOD) {
216 HD(cmd)->t_state[cp->cp_channel][cp->cp_id] = OK;
217 if(HD(cmd)->do_latency == TRUE && cp->timestamp) {
218 uint time;
219 time = jiffies - cp->timestamp;
220 if((cp->rw_latency) == TRUE) {
221 if(HD(cmd)->writes_lat[cp->sizeindex][1] > time)
222 HD(cmd)->writes_lat[cp->sizeindex][1] = time;
223 if(HD(cmd)->writes_lat[cp->sizeindex][2] < time)
224 HD(cmd)->writes_lat[cp->sizeindex][2] = time;
225 HD(cmd)->writes_lat[cp->sizeindex][3] += time;
226 HD(cmd)->writes_lat[cp->sizeindex][0]++;
227 } else {
228 if(HD(cmd)->reads_lat[cp->sizeindex][1] > time)
229 HD(cmd)->reads_lat[cp->sizeindex][1] = time;
230 if(HD(cmd)->reads_lat[cp->sizeindex][2] < time)
231 HD(cmd)->reads_lat[cp->sizeindex][2] = time;
232 HD(cmd)->reads_lat[cp->sizeindex][3] += time;
233 HD(cmd)->reads_lat[cp->sizeindex][0]++;
234 }
235 }
236 }
237 else if (scsi_stat == CHECK_CONDITION
238 && cmd->device->type == TYPE_DISK
239 && (cmd->sense_buffer[2] & 0xf) == RECOVERED_ERROR)
240 result = DID_BUS_BUSY << 16;
241 else
242 result = DID_OK << 16;
243 HD(cmd)->t_timeout[cp->cp_channel][cp->cp_id] = OK;
244 break;
245 case HA_ERR_SEL_TO:
246 result = DID_BAD_TARGET << 16;
247 break;
248 case HA_ERR_CMD_TO:
249 if (HD(cmd)->t_timeout[cp->cp_channel][cp->cp_id] > 1)
250 result = DID_ERROR << 16;
251 else {
252 result = DID_TIME_OUT << 16;
253 HD(cmd)->t_timeout[cp->cp_channel][cp->cp_id]++;
254 }
255 break;
256 case HA_ERR_RESET:
257 case HA_INIT_POWERUP:
258 if (cmd->device->type != TYPE_TAPE)
259 result = DID_BUS_BUSY << 16;
260 else
261 result = DID_ERROR << 16;
262
263 for (i = 0; i < MAXTARGET; i++)
264 HD(cmd)->t_state[cp->cp_channel][i] = RESET;
265 break;
266 case HA_UNX_BUSPHASE:
267 case HA_UNX_BUS_FREE:
268 case HA_BUS_PARITY:
269 case HA_SCSI_HUNG:
270 case HA_UNX_MSGRJCT:
271 case HA_RESET_STUCK:
272 case HA_RSENSE_FAIL:
273 case HA_PARITY_ERR:
274 default:
275 result = DID_ERROR << 16;
276 break;
277 }
278 cmd->result = result | (scsi_stat << 1);
279
280 #if DBG_INTR2
281 if (scsi_stat || result || hba_stat || eata_stat != 0x50
282 || cmd->scsi_done == NULL || cmd->device->id == 7)
283 printk("HBA: %d, channel %d, id: %d, lun %d, pid %ld:\n"
284 "eata_stat %#x, hba_stat %#.2x, scsi_stat %#.2x, "
285 "sense_key: %#x, result: %#.8x\n",
286 x, cmd->device->channel, cmd->device->id, cmd->device->lun,
287 cmd->pid, eata_stat, hba_stat, scsi_stat,
288 cmd->sense_buffer[2] & 0xf, cmd->result);
289 DBG(DBG_INTR&&DBG_DELAY,DEL2(800));
290 #endif
291
292 cp->status = FREE;
293 cmd->scsi_done(cmd);
294 }
295 restore_flags(flags);
296
297 return;
298 }
299
300 inline int eata_send_command(u32 addr, u32 base, u8 command)
301 {
302 long loop = R_LIMIT;
303
304 while (inb(base + HA_RAUXSTAT) & HA_ABUSY)
305 if (--loop == 0)
306 return(FALSE);
307
308
309 outb( addr & 0x000000ff, base + HA_WDMAADDR);
310 outb((addr & 0x0000ff00) >> 8, base + HA_WDMAADDR + 1);
311 outb((addr & 0x00ff0000) >> 16, base + HA_WDMAADDR + 2);
312 outb((addr & 0xff000000) >> 24, base + HA_WDMAADDR + 3);
313 outb(command, base + HA_WCOMMAND);
314 return(TRUE);
315 }
316
317 #if 0
318 inline int eata_send_immediate(u32 addr, u32 base, u8 cmnd, u8 cmnd2, u8 id,
319 u8 lun)
320 {
321 if(addr){
322 outb( addr & 0x000000ff, base + HA_WDMAADDR);
323 outb((addr & 0x0000ff00) >> 8, base + HA_WDMAADDR + 1);
324 outb((addr & 0x00ff0000) >> 16, base + HA_WDMAADDR + 2);
325 outb((addr & 0xff000000) >> 24, base + HA_WDMAADDR + 3);
326 } else {
327 outb(id, base + HA_WSUBCODE);
328 outb(lun, base + HA_WSUBLUN);
329 }
330
331 outb(cmnd2, base + HA_WCOMMAND2);
332 outb(cmnd, base + HA_WCOMMAND);
333 return(TRUE);
334 }
335 #endif
336
337 int eata_queue(Scsi_Cmnd * cmd, void (* done) (Scsi_Cmnd *))
338 {
339 unsigned int i, x, y;
340 u32 flags;
341 hostdata *hd;
342 struct Scsi_Host *sh;
343 struct eata_ccb *cp;
344 struct scatterlist *sl;
345
346 save_flags(flags);
347 cli();
348
349 queue_counter++;
350
351 hd = HD(cmd);
352 sh = cmd->host;
353
354
355 for (y = hd->last_ccb + 1, x = 0; x < sh->can_queue; x++, y++) {
356 if (y >= sh->can_queue)
357 y = 0;
358 if (hd->ccb[y].status == FREE)
359 break;
360 }
361
362 hd->last_ccb = y;
363
364 if (x == sh->can_queue) {
365 DBG(DBG_QUEUE, printk("can_queue %d, x %d, y %d\n",
366 sh->can_queue, x, y));
367
368 panic("eata_dma: run out of queue slots cmdno:%ld intrno: %ld\n",
369 queue_counter, int_counter);
370 }
371
372 cp = &hd->ccb[y];
373
374 memset(cp, 0, sizeof(struct eata_ccb) - sizeof(struct eata_sg_list *));
375
376 cp->status = USED;
377
378 DBG(DBG_QUEUE, printk("eata_queue pid %ld, target: %x, lun: %x, y %d\n",
379 cmd->pid, cmd->target, cmd->lun, y));
380 DBG(DBG_QUEUE && DBG_DELAY, DEL2(250));
381
382 if(hd->do_latency == TRUE) {
383 int x, z;
384 short *sho;
385 long *lon;
386 x = 0;
387 if (cmd->cmnd[0] == WRITE_6 || cmd->cmnd[0] == WRITE_10 ||
388 cmd->cmnd[0] == WRITE_12 || cmd->cmnd[0] == READ_6 ||
389 cmd->cmnd[0] == READ_10 || cmd->cmnd[0] == READ_12) {
390
391 cp->timestamp = jiffies;
392 switch(cmd->cmnd[0]) {
393 case WRITE_6:
394 case READ_6:
395 x = cmd->cmnd[4]/2;
396 break;
397 case WRITE_10:
398 case READ_10:
399 sho = (short *) &cmd->cmnd[7];
400 x = ntohs(*sho)/2;
401 break;
402 case WRITE_12:
403 case READ_12:
404 lon = (long *) &cmd->cmnd[6];
405 x = ntohl(*lon)/2;
406 break;
407 }
408 for(z = 0; z <= 11, x > (1 << z); z++)
409 ;
410 cp->sizeindex = z;
411 if (cmd->cmnd[0] == WRITE_6 || cmd->cmnd[0] == WRITE_10 ||
412 cmd->cmnd[0] == WRITE_12){
413 cp->rw_latency = TRUE;
414 }
415 }
416 }
417 cmd->scsi_done = (void *)done;
418
419 switch (cmd->cmnd[0]) {
420 case CHANGE_DEFINITION: case COMPARE: case COPY:
421 case COPY_VERIFY: case LOG_SELECT: case MODE_SELECT:
422 case MODE_SELECT_10: case SEND_DIAGNOSTIC: case WRITE_BUFFER:
423 case FORMAT_UNIT: case REASSIGN_BLOCKS: case RESERVE:
424 case SEARCH_EQUAL: case SEARCH_HIGH: case SEARCH_LOW:
425 case WRITE_6: case WRITE_10: case WRITE_VERIFY:
426 case UPDATE_BLOCK: case WRITE_LONG: case WRITE_SAME:
427 case SEARCH_HIGH_12: case SEARCH_EQUAL_12: case SEARCH_LOW_12:
428 case WRITE_12: case WRITE_VERIFY_12: case SET_WINDOW:
429 case MEDIUM_SCAN: case SEND_VOLUME_TAG:
430 case 0xea:
431 cp->DataOut = TRUE;
432 break;
433 case TEST_UNIT_READY:
434 default:
435 cp->DataIn = TRUE;
436 }
437
438
439
440
441 if (cmd->target == sh->this_id)
442 cp->Interpret = TRUE;
443
444 if (cmd->use_sg) {
445 cp->scatter = TRUE;
446 if (cp->sg_list == NULL) {
447 cp->sg_list = kmalloc(SG_SIZE_BIG*sizeof(struct eata_sg_list),
448 GFP_ATOMIC | GFP_DMA);
449 }
450 if (cp->sg_list == NULL)
451 panic("eata_dma: Run out of DMA memory for SG lists !\n");
452 cp->cp_dataDMA = htonl(virt_to_bus(cp->sg_list));
453
454 cp->cp_datalen = htonl(cmd->use_sg * sizeof(struct eata_sg_list));
455 sl=(struct scatterlist *)cmd->request_buffer;
456 for(i = 0; i < cmd->use_sg; i++, sl++){
457 cp->sg_list[i].data = htonl(virt_to_bus(sl->address));
458 cp->sg_list[i].len = htonl((u32) sl->length);
459 }
460 } else {
461 cp->scatter = FALSE;
462 cp->cp_datalen = htonl(cmd->request_bufflen);
463 cp->cp_dataDMA = htonl(virt_to_bus(cmd->request_buffer));
464 }
465
466 cp->Auto_Req_Sen = TRUE;
467 cp->cp_reqDMA = htonl(virt_to_bus(cmd->sense_buffer));
468 cp->reqlen = sizeof(cmd->sense_buffer);
469
470 cp->cp_id = cmd->target;
471 cp->cp_channel = cmd->channel;
472 cp->cp_lun = cmd->lun;
473 cp->cp_dispri = TRUE;
474 cp->cp_identify = TRUE;
475 memcpy(cp->cp_cdb, cmd->cmnd, cmd->cmd_len);
476
477 cp->cp_statDMA = htonl(virt_to_bus(&(hd->sp)));
478
479 cp->cp_viraddr = cp;
480 cp->cmd = cmd;
481 cmd->host_scribble = (char *)&hd->ccb[y];
482
483 if(eata_send_command((u32) cp, (u32) sh->base, EATA_CMD_DMA_SEND_CP) == FALSE) {
484 cmd->result = DID_ERROR << 16;
485 printk("eata_queue target %d, pid %ld, HBA busy, returning DID_ERROR,"
486 " done.\n", cmd->target, cmd->pid);
487
488 restore_flags(flags);
489 done(cmd);
490 return(0);
491 }
492 DBG(DBG_QUEUE,printk("Queued base %#.4x pid: %ld target: %x lun: %x "
493 "slot %d irq %d\n", (s32)sh->base, cmd->pid,
494 cmd->target, cmd->lun, y, sh->irq));
495 DBG(DBG_QUEUE && DBG_DELAY, DEL2(200));
496 restore_flags(flags);
497 return(0);
498 }
499
500
501 int eata_abort(Scsi_Cmnd * cmd)
502 {
503 ulong flags;
504 ulong loop = R_LIMIT;
505
506 save_flags(flags);
507 cli();
508
509 DBG(DBG_ABNORM, printk("eata_abort called pid: %ld target: %x lun: %x"
510 " reason %x\n", cmd->pid, cmd->target, cmd->lun,
511 cmd->abort_reason));
512 DBG(DBG_ABNORM && DBG_DELAY, DEL2(500));
513
514
515 while (inb((u32)(cmd->host->base) + HA_RAUXSTAT) & HA_ABUSY)
516 if (--loop == 0) {
517 printk("eata_dma: abort, timeout error.\n");
518 restore_flags(flags);
519 DBG(DBG_ABNORM && DBG_DELAY, DEL2(500));
520 return (SCSI_ABORT_ERROR);
521 }
522 if (CD(cmd)->status == USED) {
523 DBG(DBG_ABNORM, printk("Returning: SCSI_ABORT_BUSY\n"));
524 restore_flags(flags);
525 return (SCSI_ABORT_BUSY);
526 }
527 if (CD(cmd)->status == FREE) {
528 DBG(DBG_ABNORM, printk("Returning: SCSI_ABORT_NOT_RUNNING\n"));
529 restore_flags(flags);
530 return (SCSI_ABORT_NOT_RUNNING);
531 }
532 if (CD(cmd)->status == RESET) {
533 restore_flags(flags);
534 printk("eata_dma: abort, command reset error.\n");
535 DBG(DBG_ABNORM && DBG_DELAY, DEL2(500));
536 return (SCSI_ABORT_ERROR);
537 }
538 if (CD(cmd)->status == LOCKED) {
539 restore_flags(flags);
540 DBG(DBG_ABNORM, printk("eata_dma: abort, queue slot locked.\n"));
541 DBG(DBG_ABNORM && DBG_DELAY, DEL2(500));
542 return (SCSI_ABORT_NOT_RUNNING);
543 }
544 restore_flags(flags);
545 panic("eata_dma: abort: invalid slot status\n");
546 }
547
548 int eata_reset(Scsi_Cmnd * cmd)
549 {
550 ushort x, z;
551 ulong time, limit = 0;
552 ulong loop = R_LIMIT;
553 ulong flags;
554 unchar success = FALSE;
555 Scsi_Cmnd *sp;
556
557 save_flags(flags);
558 cli();
559
560 DBG(DBG_ABNORM, printk("eata_reset called pid:%ld target: %x lun: %x"
561 " reason %x\n", cmd->pid, cmd->target, cmd->lun,
562 cmd->abort_reason));
563
564 if (HD(cmd)->state == RESET) {
565 printk("eata_reset: exit, already in reset.\n");
566 restore_flags(flags);
567 DBG(DBG_ABNORM && DBG_DELAY, DEL2(500));
568 return (SCSI_RESET_ERROR);
569 }
570
571 while (inb((u32)(cmd->host->base) + HA_RAUXSTAT) & HA_ABUSY)
572 if (--loop == 0) {
573 printk("eata_reset: exit, timeout error.\n");
574 restore_flags(flags);
575 DBG(DBG_ABNORM && DBG_DELAY, DEL2(500));
576 return (SCSI_RESET_ERROR);
577 }
578
579 for (x = 0; x < MAXCHANNEL; x++) {
580 for (z = 0; z < MAXTARGET; z++) {
581 HD(cmd)->t_state[x][z] = RESET;
582 HD(cmd)->t_timeout[x][z] = NO_TIMEOUT;
583 }
584 }
585
586 for (x = 0; x < cmd->host->can_queue; x++) {
587 if (HD(cmd)->ccb[x].status == FREE)
588 continue;
589
590 if (HD(cmd)->ccb[x].status == LOCKED) {
591 HD(cmd)->ccb[x].status = FREE;
592 printk("eata_reset: locked slot %d forced free.\n", x);
593 DBG(DBG_ABNORM && DBG_DELAY, DEL2(500));
594 continue;
595 }
596 sp = HD(cmd)->ccb[x].cmd;
597 HD(cmd)->ccb[x].status = RESET;
598 printk("eata_reset: slot %d in reset, pid %ld.\n", x, sp->pid);
599 DBG(DBG_ABNORM && DBG_DELAY, DEL2(500));
600
601 if (sp == NULL)
602 panic("eata_reset: slot %d, sp==NULL.\n", x);
603 DBG(DBG_ABNORM && DBG_DELAY, DEL2(500));
604
605 if (sp == cmd)
606 success = TRUE;
607 }
608
609
610 inb((u32) (cmd->host->base) + HA_RSTATUS);
611 eata_send_command(0, (u32) cmd->host->base, EATA_CMD_RESET);
612
613 DBG(DBG_ABNORM, printk("eata_reset: board reset done, enabling interrupts.\n"));
614 HD(cmd)->state = RESET;
615
616 restore_flags(flags);
617
618 time = jiffies;
619 while (jiffies < (time + (3 * HZ)) || limit++ < 10000000)
620 ;
621
622 save_flags(flags);
623 cli();
624
625 DBG(DBG_ABNORM, printk("eata_reset: interrupts disabled, loops %ld.\n",
626 limit));
627 DBG(DBG_ABNORM && DBG_DELAY, DEL2(500));
628
629 for (x = 0; x < cmd->host->can_queue; x++) {
630
631
632 if (HD(cmd)->ccb[x].status != RESET)
633 continue;
634
635 sp = HD(cmd)->ccb[x].cmd;
636 sp->result = DID_RESET << 16;
637
638
639 HD(cmd)->ccb[x].status = LOCKED;
640
641 printk("eata_reset: slot %d locked, DID_RESET, pid %ld done.\n",
642 x, sp->pid);
643 DBG(DBG_ABNORM && DBG_DELAY, DEL2(500));
644 restore_flags(flags);
645 sp->scsi_done(sp);
646 cli();
647 }
648
649 HD(cmd)->state = FALSE;
650 restore_flags(flags);
651
652 if (success) {
653 DBG(DBG_ABNORM, printk("eata_reset: exit, success.\n"));
654 DBG(DBG_ABNORM && DBG_DELAY, DEL2(500));
655 return (SCSI_RESET_SUCCESS);
656 } else {
657 DBG(DBG_ABNORM, printk("eata_reset: exit, wakeup.\n"));
658 DBG(DBG_ABNORM && DBG_DELAY, DEL2(500));
659 return (SCSI_RESET_PUNT);
660 }
661 }
662
663 char * get_board_data(u32 base, u32 irq, u32 id)
664 {
665 struct eata_ccb *cp;
666 struct eata_sp *sp;
667 static char *buff;
668 ulong i;
669 ulong limit = 0;
670
671 cp = (struct eata_ccb *) scsi_init_malloc(sizeof(struct eata_ccb),
672 GFP_ATOMIC | GFP_DMA);
673 sp = (struct eata_sp *) scsi_init_malloc(sizeof(struct eata_sp),
674 GFP_ATOMIC | GFP_DMA);
675
676 buff = dma_scratch;
677
678 memset(cp, 0, sizeof(struct eata_ccb));
679 memset(sp, 0, sizeof(struct eata_sp));
680 memset(buff, 0, 256);
681
682 cp->DataIn = TRUE;
683 cp->Interpret = TRUE;
684 cp->cp_dispri = TRUE;
685 cp->cp_identify = TRUE;
686
687 cp->cp_datalen = htonl(56);
688 cp->cp_dataDMA = htonl(virt_to_bus(buff));
689 cp->cp_statDMA = htonl(virt_to_bus(sp));
690 cp->cp_viraddr = cp;
691
692 cp->cp_id = id;
693 cp->cp_lun = 0;
694
695 cp->cp_cdb[0] = INQUIRY;
696 cp->cp_cdb[1] = 0;
697 cp->cp_cdb[2] = 0;
698 cp->cp_cdb[3] = 0;
699 cp->cp_cdb[4] = 56;
700 cp->cp_cdb[5] = 0;
701
702 fake_int_base = base;
703 fake_int_result = FALSE;
704 fake_int_happened = FALSE;
705
706 eata_send_command((u32) cp, (u32) base, EATA_CMD_DMA_SEND_CP);
707
708 i = jiffies + (3 * HZ);
709 while (fake_int_happened == FALSE && jiffies <= i)
710 barrier();
711
712 DBG(DBG_INTR3, printk("fake_int_result: %#x hbastat %#x scsistat %#x,"
713 " buff %p sp %p\n",
714 fake_int_result, (u32) (sp->hba_stat ),
715 (u32) sp->scsi_stat, buff, sp));
716
717 scsi_init_free((void *)cp, sizeof(struct eata_ccb));
718 scsi_init_free((void *)sp, sizeof(struct eata_sp));
719
720 if ((fake_int_result & HA_SERROR) || jiffies > i){
721
722 inb((u32) (base) + HA_RSTATUS);
723 eata_send_command(0, base, EATA_CMD_RESET);
724 i = jiffies;
725 while (jiffies < (i + (3 * HZ)) && limit++ < 10000000)
726 barrier();
727 return (NULL);
728 } else
729 return (buff);
730 }
731
732 int check_blink_state(long base)
733 {
734 ushort loops = 10;
735 u32 blinkindicator;
736 u32 state = 0x12345678;
737 u32 oldstate = 0;
738
739 blinkindicator = htonl(0x54504442);
740 while ((loops--) && (state != oldstate)) {
741 oldstate = state;
742 state = inl((uint) base + 1);
743 }
744
745 DBG(DBG_BLINK, printk("Did Blink check. Status: %d\n",
746 (state == oldstate) && (state == blinkindicator)));
747
748 if ((state == oldstate) && (state == blinkindicator))
749 return(TRUE);
750 else
751 return (FALSE);
752 }
753
754 int get_conf_PIO(u32 base, struct get_conf *buf)
755 {
756 ulong loop = R_LIMIT;
757 u16 *p;
758
759 if(check_region(base, 9))
760 return (FALSE);
761
762 memset(buf, 0, sizeof(struct get_conf));
763
764 while (inb(base + HA_RSTATUS) & HA_SBUSY)
765 if (--loop == 0)
766 return (FALSE);
767
768 DBG(DBG_PIO && DBG_PROBE,
769 printk("Issuing PIO READ CONFIG to HBA at %#x\n", base));
770 eata_send_command(0, base, EATA_CMD_PIO_READ_CONFIG);
771
772 loop = R_LIMIT;
773 for (p = (u16 *) buf;
774 (long)p <= ((long)buf + (sizeof(struct get_conf) / 2)); p++) {
775 while (!(inb(base + HA_RSTATUS) & HA_SDRQ))
776 if (--loop == 0)
777 return (FALSE);
778
779 loop = R_LIMIT;
780 *p = inw(base + HA_RDATA);
781 }
782
783 if (!(inb(base + HA_RSTATUS) & HA_SERROR)) {
784 if (htonl(EATA_SIGNATURE) == buf->signature) {
785 DBG(DBG_PIO&&DBG_PROBE, printk("EATA Controller found at %x "
786 "EATA Level: %x\n", (uint) base,
787 (uint) (buf->version)));
788
789 while (inb(base + HA_RSTATUS) & HA_SDRQ)
790 inw(base + HA_RDATA);
791 return (TRUE);
792 }
793 } else {
794 DBG(DBG_PROBE, printk("eata_dma: get_conf_PIO, error during transfer "
795 "for HBA at %lx\n", (long)base));
796 }
797 return (FALSE);
798 }
799
800 void print_config(struct get_conf *gc)
801 {
802 printk("Please check values: (read config data)\n");
803 printk("LEN: %d ver:%d OCS:%d TAR:%d TRNXFR:%d MORES:%d DMAS:%d\n",
804 (u32) ntohl(gc->len), gc->version,
805 gc->OCS_enabled, gc->TAR_support, gc->TRNXFR, gc->MORE_support,
806 gc->DMA_support);
807 printk("DMAV:%d HAAV:%d SCSIID0:%d ID1:%d ID2:%d QUEUE:%d SG:%d SEC:%d\n",
808 gc->DMA_valid, gc->HAA_valid, gc->scsi_id[3], gc->scsi_id[2],
809 gc->scsi_id[1], ntohs(gc->queuesiz), ntohs(gc->SGsiz), gc->SECOND);
810 printk("IRQ:%d IRQT:%d DMAC:%d FORCADR:%d SG_64K:%d SG_UAE:%d MID:%d "
811 "MCH:%d MLUN:%d\n",
812 gc->IRQ, gc->IRQ_TR, (8 - gc->DMA_channel) & 7, gc->FORCADR,
813 gc->SG_64K, gc->SG_UAE, gc->MAX_ID, gc->MAX_CHAN, gc->MAX_LUN);
814 printk("RIDQ:%d PCI:%d EISA:%d\n",
815 gc->ID_qest, gc->is_PCI, gc->is_EISA);
816 DBG(DPT_DEBUG, DELAY(14));
817 }
818
819 short register_HBA(u32 base, struct get_conf *gc, Scsi_Host_Template * tpnt,
820 u8 bustype)
821 {
822 ulong size = 0;
823 unchar dma_channel = 0;
824 char *buff = 0;
825 unchar bugs = 0;
826 struct Scsi_Host *sh;
827 hostdata *hd;
828 int x;
829
830
831 DBG(DBG_REGISTER, print_config(gc));
832
833 if (gc->DMA_support == FALSE) {
834 printk("The EATA HBA at %#.4x does not support DMA.\n"
835 "Please use the EATA-PIO driver.\n", base);
836 return (FALSE);
837 }
838
839 if(gc->HAA_valid == FALSE || ntohl(gc->len) < 0x22)
840 gc->MAX_CHAN = 0;
841
842 if (reg_IRQ[gc->IRQ] == FALSE) {
843 if (!request_irq(gc->IRQ, (void *) eata_fake_int_handler, SA_INTERRUPT,
844 "eata_dma")){
845 reg_IRQ[gc->IRQ]++;
846 if (!gc->IRQ_TR)
847 reg_IRQL[gc->IRQ] = TRUE;
848 } else {
849 printk("Couldn't allocate IRQ %d, Sorry.", gc->IRQ);
850 return (FALSE);
851 }
852 } else {
853 if (reg_IRQL[gc->IRQ] == TRUE) {
854 printk("Can't support more than one HBA on this IRQ,\n"
855 " if the IRQ is edge triggered. Sorry.\n");
856 return (FALSE);
857 } else
858 reg_IRQ[gc->IRQ]++;
859 }
860
861
862 dma_channel = 0xff;
863 if (gc->DMA_valid) {
864 if (request_dma(dma_channel = (8 - gc->DMA_channel) & 7, "eata_dma")) {
865 printk("Unable to allocate DMA channel %d for ISA HBA at %#.4x.\n",
866 dma_channel, base);
867 reg_IRQ[gc->IRQ]--;
868 if (reg_IRQ[gc->IRQ] == 0)
869 free_irq(gc->IRQ);
870 if (gc->IRQ_TR == FALSE)
871 reg_IRQL[gc->IRQ] = FALSE;
872 return (FALSE);
873 }
874 }
875
876 #if !(NEWSTUFF)
877 if (bustype != IS_EISA && bustype != IS_ISA)
878 #endif
879 buff = get_board_data(base, gc->IRQ, gc->scsi_id[3]);
880
881 if (buff == NULL) {
882 #if !(NEWSTUFF)
883 if (bustype == IS_EISA || bustype == IS_ISA) {
884 bugs = bugs || BROKEN_INQUIRY;
885 } else {
886 #endif
887 if (gc->DMA_support == FALSE)
888 printk("HBA at %#.4x doesn't support DMA. Sorry\n", base);
889 else
890 printk("HBA at %#.4x does not react on INQUIRY. Sorry.\n",
891 base);
892 if (gc->DMA_valid)
893 free_dma(dma_channel);
894 reg_IRQ[gc->IRQ]--;
895 if (reg_IRQ[gc->IRQ] == 0)
896 free_irq(gc->IRQ);
897 if (gc->IRQ_TR == FALSE)
898 reg_IRQL[gc->IRQ] = FALSE;
899 return (FALSE);
900 #if !(NEWSTUFF)
901 }
902 #endif
903 }
904
905 if (gc->DMA_support == FALSE && buff != NULL)
906 printk("HBA %.12sat %#.4x doesn't set the DMA_support flag correctly.\n",
907 &buff[16], base);
908
909 request_region(base, 9, "eata_dma");
910
911
912
913
914 if(ntohs(gc->queuesiz) == 0) {
915 gc->queuesiz = ntohs(64);
916 printk("Warning: Queue size has to be corrected. Assuming 64 queueslots\n"
917 " This might be a PM2012B with a defective Firmware\n");
918 }
919
920 size = sizeof(hostdata) + ((sizeof(struct eata_ccb) + sizeof(long))
921 * ntohs(gc->queuesiz));
922
923 DBG(DBG_REGISTER, printk("scsi_register size: %ld\n", size));
924
925 sh = scsi_register(tpnt, size);
926
927 if(sh == NULL) {
928 if (gc->DMA_valid)
929 free_dma(dma_channel);
930
931 reg_IRQ[gc->IRQ]--;
932 if (reg_IRQ[gc->IRQ] == 0)
933 free_irq(gc->IRQ);
934 if (gc->IRQ_TR == FALSE)
935 reg_IRQL[gc->IRQ] = FALSE;
936 return (FALSE);
937 }
938
939 hd = SD(sh);
940
941 memset(hd->ccb, 0, sizeof(struct eata_ccb) * ntohs(gc->queuesiz));
942 memset(hd->reads, 0, sizeof(u32) * 26);
943
944 hd->broken_INQUIRY = (bugs & BROKEN_INQUIRY);
945
946 if(hd->broken_INQUIRY == TRUE) {
947 strcpy(SD(sh)->vendor, "DPT");
948 strcpy(SD(sh)->name, "??????????");
949 strcpy(SD(sh)->revision, "???.?");
950 } else {
951 strncpy(SD(sh)->vendor, &buff[8], 8);
952 SD(sh)->vendor[8] = 0;
953 strncpy(SD(sh)->name, &buff[16], 17);
954 SD(sh)->name[17] = 0;
955 SD(sh)->revision[0] = buff[32];
956 SD(sh)->revision[1] = buff[33];
957 SD(sh)->revision[2] = buff[34];
958 SD(sh)->revision[3] = '.';
959 SD(sh)->revision[4] = buff[35];
960 SD(sh)->revision[5] = 0;
961 }
962
963 switch (ntohl(gc->len)) {
964 case 0x1c:
965 SD(sh)->EATA_revision = 'a';
966 break;
967 case 0x1e:
968 SD(sh)->EATA_revision = 'b';
969 break;
970 case 0x22:
971 SD(sh)->EATA_revision = 'c';
972 break;
973 case 0x24:
974 SD(sh)->EATA_revision = 'z';
975 default:
976 SD(sh)->EATA_revision = '?';
977 }
978
979 if(ntohl(gc->len) >= 0x22) {
980 if (gc->is_PCI == TRUE)
981 hd->bustype = IS_PCI;
982 else if (gc->is_EISA == TRUE)
983 hd->bustype = IS_EISA;
984 else
985 hd->bustype = IS_ISA;
986 } else if(hd->broken_INQUIRY == FALSE) {
987 if (buff[21] == '4')
988 hd->bustype = IS_PCI;
989 else if (buff[21] == '2')
990 hd->bustype = IS_EISA;
991 else
992 hd->bustype = IS_ISA;
993 } else
994 hd->bustype = bustype;
995
996 if(ntohl(gc->len) >= 0x22) {
997 sh->max_id = gc->MAX_ID + 1;
998 sh->max_lun = gc->MAX_LUN + 1;
999 } else {
1000 sh->max_id = 8;
1001 sh->max_lun = 8;
1002 }
1003
1004 hd->channel = gc->MAX_CHAN;
1005 sh->max_channel = gc->MAX_CHAN;
1006 sh->base = (char *) base;
1007 sh->io_port = (u16) base;
1008 sh->n_io_port = 9;
1009 sh->irq = gc->IRQ;
1010 sh->dma_channel = dma_channel;
1011
1012
1013
1014
1015 sh->this_id = gc->scsi_id[3];
1016 sh->can_queue = ntohs(gc->queuesiz);
1017
1018 if (gc->OCS_enabled == TRUE) {
1019 if(hd->bustype != IS_ISA)
1020 sh->cmd_per_lun = sh->can_queue/C_P_L_DIV;
1021 else
1022 sh->cmd_per_lun = 8;
1023
1024 } else
1025 sh->cmd_per_lun = 1;
1026
1027
1028
1029
1030
1031
1032
1033
1034
1035 if (gc->SG_64K == TRUE && ntohs(gc->SGsiz) == 64 && hd->bustype != IS_ISA){
1036 sh->sg_tablesize = SG_SIZE_BIG;
1037 sh->use_clustering = FALSE;
1038 } else {
1039 sh->sg_tablesize = ntohs(gc->SGsiz);
1040 sh->use_clustering = TRUE;
1041 if (sh->sg_tablesize > SG_SIZE || sh->sg_tablesize == 0) {
1042 sh->sg_tablesize = SG_SIZE;
1043 if (ntohs(gc->SGsiz) == 0)
1044 printk("Warning: SG size had to be corrected.\n"
1045 "This might be a PM2012 with a defective Firmware\n");
1046 }
1047 }
1048
1049 if (gc->SECOND)
1050 hd->primary = FALSE;
1051 else
1052 hd->primary = TRUE;
1053
1054 sh->wish_block = FALSE;
1055
1056 if (hd->bustype != IS_ISA) {
1057 sh->unchecked_isa_dma = FALSE;
1058 } else {
1059 sh->unchecked_isa_dma = TRUE;
1060 }
1061
1062 for(x = 0; x <= 11; x++){
1063 hd->writes_lat[x][1] = 0xffffffff;
1064 hd->reads_lat[x][1] = 0xffffffff;
1065 }
1066
1067 hd->next = NULL;
1068 hd->prev = last_HBA;
1069 if(hd->prev != NULL)
1070 SD(hd->prev)->next = sh;
1071 last_HBA = sh;
1072 if (first_HBA == NULL)
1073 first_HBA = sh;
1074 registered_HBAs++;
1075
1076 return (TRUE);
1077 }
1078
1079
1080 void find_EISA(struct get_conf *buf, Scsi_Host_Template * tpnt)
1081 {
1082 u32 base;
1083 int i;
1084
1085 #if CHECKPAL
1086 u8 pal1, pal2, pal3;
1087 #endif
1088
1089 for (i = 0; i < MAXEISA; i++) {
1090 if (EISAbases[i] == TRUE) {
1091
1092 base = 0x1c88 + (i * 0x1000);
1093 #if CHECKPAL
1094 pal1 = inb((u16)base - 8);
1095 pal2 = inb((u16)base - 7);
1096 pal3 = inb((u16)base - 6);
1097
1098 if (((pal1 == 0x12) && (pal2 == 0x14)) ||
1099 ((pal1 == 0x38) && (pal2 == 0xa3) && (pal3 == 0x82)) ||
1100 ((pal1 == 0x06) && (pal2 == 0x94) && (pal3 == 0x24))) {
1101 DBG(DBG_PROBE, printk("EISA EATA id tags found: %x %x %x \n",
1102 (int)pal1, (int)pal2, (int)pal3));
1103 #endif
1104 if (get_conf_PIO(base, buf) == TRUE) {
1105 DBG(DBG_PROBE && DBG_EISA, print_config(buf));
1106 if (buf->IRQ) {
1107 register_HBA(base, buf, tpnt, IS_EISA);
1108 } else
1109 printk("eata_dma: No valid IRQ. HBA removed from list\n");
1110 } else {
1111 if (check_blink_state(base))
1112 printk("HBA is in BLINK state. Consult your HBAs "
1113 " Manual to correct this.\n");
1114 }
1115
1116 EISAbases[i] = 0;
1117 #if CHECKPAL
1118 }
1119 #endif
1120 }
1121 }
1122 return;
1123 }
1124
1125 void find_ISA(struct get_conf *buf, Scsi_Host_Template * tpnt)
1126 {
1127 int i;
1128
1129 for (i = 0; i < MAXISA; i++) {
1130 if (ISAbases[i]) {
1131 if (get_conf_PIO(ISAbases[i],buf) == TRUE){
1132 register_HBA(ISAbases[i], buf, tpnt, IS_ISA);
1133 } else {
1134 if (check_blink_state(ISAbases[i]))
1135 printk("HBA is in BLINK state. Consult your HBAs "
1136 "Manual to correct this.\n");
1137 }
1138 ISAbases[i] = 0;
1139 }
1140 }
1141 return;
1142 }
1143
1144 void find_PCI(struct get_conf *buf, Scsi_Host_Template * tpnt)
1145 {
1146
1147 #ifndef CONFIG_PCI
1148 printk("eata_dma: kernel PCI support not enabled. Skipping scan for PCI HBAs.\n");
1149 #else
1150
1151 u8 pci_bus, pci_device_fn;
1152 static s16 pci_index = 0;
1153 u32 base = 0;
1154 u16 com_adr;
1155 u16 rev_device;
1156 u32 error, i, x;
1157
1158 if (pcibios_present()) {
1159 for (i = 0; i <= MAXPCI; ++i, ++pci_index) {
1160 if (pcibios_find_device(PCI_VENDOR_ID_DPT, PCI_DEVICE_ID_DPT,
1161 pci_index, &pci_bus, &pci_device_fn))
1162 break;
1163 DBG(DBG_PROBE && DBG_PCI,
1164 printk("eata_dma: HBA at bus %d, device %d,"
1165 " function %d, index %d\n", (s32)pci_bus,
1166 (s32)((pci_device_fn & 0xf8) >> 3),
1167 (s32)(pci_device_fn & 7), pci_index));
1168
1169 if (!(error = pcibios_read_config_word(pci_bus, pci_device_fn,
1170 PCI_CLASS_DEVICE, &rev_device))) {
1171 if (rev_device == PCI_CLASS_STORAGE_SCSI) {
1172 if (!(error = pcibios_read_config_word(pci_bus,
1173 pci_device_fn, PCI_COMMAND,
1174 (u16 *) & com_adr))) {
1175 if (!((com_adr & PCI_COMMAND_IO) &&
1176 (com_adr & PCI_COMMAND_MASTER))) {
1177 printk("eata_dma: HBA has IO or BUSMASTER mode disabled\n");
1178 continue;
1179 }
1180 } else
1181 printk("eata_dma: error %x while reading "
1182 "PCI_COMMAND\n", error);
1183 } else
1184 printk("eata_dma: DEVICECLASSID %x didn't match\n",
1185 rev_device);
1186 } else {
1187 printk("eata_dma: error %x while reading PCI_CLASS_BASE\n",
1188 error);
1189 continue;
1190 }
1191
1192 if (!(error = pcibios_read_config_dword(pci_bus, pci_device_fn,
1193 PCI_BASE_ADDRESS_0, (int *) &base))){
1194
1195
1196 if (base & 0x01) {
1197 base &= 0xfffffffe;
1198
1199 if ((inb(base) == 0x12) && (inb(base + 1) == 0x14))
1200 continue;
1201 base += 0x10;
1202 if (base != 0x1f8) {
1203
1204 if (get_conf_PIO(base, buf) == TRUE) {
1205 if (buf->FORCADR)
1206 continue;
1207
1208
1209
1210
1211
1212
1213 register_HBA(base, buf, tpnt, IS_PCI);
1214
1215 if (base < 0x1000) {
1216 for (x = 0; x < MAXISA; ++x) {
1217 if (ISAbases[x] == base) {
1218 ISAbases[x] = 0;
1219 break;
1220 }
1221 }
1222 } else if ((base & 0x0fff) == 0x0c88)
1223 EISAbases[(base >> 12) & 0x0f] = 0;
1224 continue;
1225 } else if (check_blink_state(base) == TRUE) {
1226 printk("eata_dma: HBA is in BLINK state.\n"
1227 "Consult your HBAs Manual to correct this.\n");
1228 }
1229 }
1230 }
1231 } else {
1232 printk("eata_dma: error %x while reading "
1233 "PCI_BASE_ADDRESS_0\n", error);
1234 }
1235 }
1236 } else {
1237 printk("eata_dma: No BIOS32 extensions present. This driver release "
1238 "still depends on it.\n"
1239 " Skipping scan for PCI HBAs. \n");
1240 }
1241 #endif
1242 return;
1243 }
1244
1245 int eata_detect(Scsi_Host_Template * tpnt)
1246 {
1247 struct Scsi_Host *HBA_ptr;
1248 struct get_conf gc;
1249 int i;
1250
1251 DBG((DBG_PROBE && DBG_DELAY) || DPT_DEBUG,
1252 printk("Using lots of delays to let you read the debugging output\n"));
1253
1254 status = scsi_init_malloc(512, GFP_ATOMIC | GFP_DMA);
1255 dma_scratch = scsi_init_malloc(512, GFP_ATOMIC | GFP_DMA);
1256
1257 if(status == NULL || dma_scratch == NULL) {
1258 printk("eata_dma: can't allocate enough memory to probe for hosts !\n");
1259 return(0);
1260 }
1261
1262 find_PCI(&gc, tpnt);
1263
1264 find_EISA(&gc, tpnt);
1265
1266 find_ISA(&gc, tpnt);
1267
1268 for (i = 0; i <= MAXIRQ; i++) {
1269 if (reg_IRQ[i]){
1270 free_irq(i);
1271 request_irq(i, (void *)(eata_int_handler), SA_INTERRUPT, "eata_dma");
1272 }
1273 }
1274 HBA_ptr = first_HBA;
1275
1276 if (registered_HBAs != 0) {
1277 printk("EATA (Extended Attachment) driver version: %d.%d%s\n"
1278 "developed in co-operation with DPT\n"
1279 "(c) 1993-95 Michael Neuffer, neuffer@goofy.zdv.uni-mainz.de\n",
1280 VER_MAJOR, VER_MINOR, VER_SUB);
1281 printk("Registered HBAs:");
1282 printk("\nHBA no. Boardtype: Revis: EATA: Bus: BaseIO: IRQ: DMA: Ch: "
1283 "ID: Pr: QS: SG: CPL:\n");
1284 for (i = 1; i <= registered_HBAs; i++) {
1285 printk("scsi%-2d: %.10s v%s 2.0%c %s %#.4x %2d",
1286 HBA_ptr->host_no, SD(HBA_ptr)->name, SD(HBA_ptr)->revision,
1287 SD(HBA_ptr)->EATA_revision, (SD(HBA_ptr)->bustype == 'P')?
1288 "PCI ":(SD(HBA_ptr)->bustype == 'E')?"EISA":"ISA ",
1289 (u32) HBA_ptr->base, HBA_ptr->irq);
1290 if(HBA_ptr->dma_channel != 0xff)
1291 printk(" %2x ", HBA_ptr->dma_channel);
1292 else
1293 printk(" %s", "BMST");
1294 printk(" %d %d %c %2d %2d %2d\n", SD(HBA_ptr)->channel,
1295 HBA_ptr->this_id, (SD(HBA_ptr)->primary == TRUE)?'Y':'N',
1296 HBA_ptr->can_queue, HBA_ptr->sg_tablesize, HBA_ptr->cmd_per_lun);
1297 HBA_ptr = SD(HBA_ptr)->next;
1298 }
1299 } else {
1300 scsi_init_free((void *)status, 512);
1301 }
1302
1303 scsi_init_free((void *)dma_scratch, 512);
1304
1305 DBG(DPT_DEBUG, DELAY(12));
1306
1307 return(registered_HBAs);
1308 }
1309
1310 #ifdef MODULE
1311
1312 Scsi_Host_Template driver_template = EATA_DMA;
1313 #include "scsi_module.c"
1314 #endif
1315
1316
1317
1318
1319
1320
1321
1322
1323
1324
1325
1326
1327
1328
1329
1330
1331
1332